We have revealed that the dynamic fluctuation in time, i.e., noise, of drain current (Id) is closely related to the static variability. The current conduction mechanism such as diffusion and drift transports is a key to consistently understand the magnitude of not only the noise from a single transistor but also the static variability obtained from a number of transistors. The magnitude of fluctuation in the diffusion regime is larger than that in the drift regime, where the large number of carriers reduces the fluctuation.

Identification of electron trap location in HfO"2/interface-layer (IFL) of poly-Si/TiN/HfO"2/SiO"2 gate-stacked MOSFETs is successfully demonstrated through analysis of low-frequency noise and PBTI characteristics with respect to nitrogen incorporation into the gate dielectrics in fabrication process. It is found that the electron trap existing in the bulk-IFL dominantly degrades low-frequency noise (LFN) and positive bias temperature instability (PBTI). The pre-existing electron trap is considered to be generated by N incorporation into the IFL in the fabrication process of gate-first process.

The impact of nitrogen incorporation into HfO2/SiO2 gate dielectrics in the gate-stack fabrication process on the low-frequency noise of the drain current of polycrystalline silicon (poly-Si)/TiN (10 nm)/HfO2/SiO2 gate-stack metal–oxide–semiconductor field-effect transistors (MOSFETs) is studied, considering the scaling of an equivalent oxide thickness with the reduction in interfacial layer SiO2 thickness and the plasma nitriding of gate dielectrics. The nitriding combined with nitrogen plasma and nitrogen diffusion from a 10-nm-thick TiN layer increases the normalized noise power spectral density owing to carrier mobility fluctuation, and decreases the slope γ of the 1/f γ noise spectrum owing to the increase in the number of trapped carriers at the bulk trap site in the gate dielectric layer. The reduction in SiO2 thickness from 1.5 to 0.8 nm showed less impact on the mentioned phenomena with TiN. These results suggest that nitrogen incorporation into HfO2/SiO2 gate dielectrics in the device fabrication process for poly-Si/metal nitride/HfO2/SiO2 gate stacks requires careful attention to suppress the power density of low-frequency noise.

In this study, we investigated the behavior of the low-frequency noise of n-channel metal–oxide–semiconductor field-effect transistors as a function of gate overdrive from the viewpoints of subthreshold slope and normalized transconductance. We prepared devices with different uniformities of channel impurity, carrier mobility, and the degree of the short-channel effect by halo implantation and changing the substrate impurity concentration and gate length. It was found that the small subthreshold swing value increases the slope of noise intensity in the subthreshold regime, probably resulting from random nature of the diffusion transport. On the other hand, the magnitude of noise intensity in the strong inversion regime is related to the normalized transconductance, where a small number of scattering events in the channel realize low noise intensity.

Using X-ray diffraction (XRD) technique, we have investigated the crystallinity of La- or Y-doped HfO2, formed with a capping process achieved by varying the crystallinity of the base-HfO2. In the capping process, high temperature annealing was performed after the deposition of La-oxide or Y-oxide on the base-HfO2. After the annealing, we found that the crystallinity of the La-doped HfO2 depended on the crystallinity of the base-HfO2, although the Y-doped HfO2 exhibits only a small dependency. To achieve crystalline La-doped HfO2 having higher-k with capping process, the base-HfO2 should be amorphous.

We studied the impact of Yttrium and Lanthanum incorporation into HfO2 on reliability (TDDB, PBTI and 1/f noise). They introduce smaller Weibull β values and early failure in TDDB, with negative shift in PBTI. They are caused by the negatively charged interstitial oxygen defect generated by Yttrium and Lanthanum incorporation. The effect of Lanthanum is larger than that of Yttrium. It can be explained by the larger ion radius and molecular volume of La2O3 than Y2O3. On the other hand, they are effective in noise reduction, as an effect of interface state density reduction. The key point in fabricating low Vth and highly reliable MOSFETs is the technology for suppression of this interstitial oxygen defect generation.

We have studied unusual V th shifts in the positive bias temperature instability (PBTI) and negative bias temperature instability (NBTI) of yttrium-doped HfO2 gate dielectrics. Both positive and negative stress conditions introduce shifts in opposite directions for yttrium-doped HfO2 in the low stress region. That is, a negative shift under a positive bias and a positive shift under a negative bias were observed. This is due to yttrium-related defects, with electron detrapping for PBTI and electron trapping for NBTI. Such defect formation can be suppressed by incorporating nitrogen into HfO2.

We have revealed by the first-principles calculations that the workfunction of silicide is controlled by the high-density dopant existing in the silicide itself, and the selective doping into Si or Ni site is essential to realize such control. In addition, we showed that these doping properties are closely related to fundamental physics of silicides; why NixSiy exists and why AuxSiy not exists in nature. These findings might give a new guideline to design silicide-electrode contacts for future 10nm nano-devices.

Anomalous threshold voltage increase with area scaling of Mg- or La-incorporated high-k gate dielectrics has great impact on scaled devices. This paper reveals that much amount of Mg or La capping effects for V-t reduction was disappeared with the increase of electron mobility in narrow channel nMISFETs. This phenomenon is explained with absorption of Mg and La into STI from bulk high-k layer. The key to suppress the area scaling dependence is pilling Mg or La atoms up near high-k/IFL interface which enable us increase of stable capping effect. Combination of processing for high-k gate dielectrics and device structure with the high-k dielectrics under offset spacers was found to effectively suppress the V-t increase at the 100 nm channel width. As a conclusion, the large capping effect for V-t reduction over 400 mV is achieved in scaled devices using this technique.

We have investigated the controllability of the effective work function (phi m,eff ) of TiN as a work-function-determining metal (WFM) for various gate-electrode structures in HfSiON MOSFETs. phi m,eff was controllable from 4.7 to 4.44 eV by changing the TiN thickness from 30 to 2 nm in poly-Si/TiN gate electrodes, without any distinct increase in EOT. Therefore, thin-TiN and thick-TiN WFMs are preferred for the reduction in threshold voltage in nMOSFETs and pMOSFETs with poly-Si/TiN gate electrodes, respectively. A similar controllability was not observed with W/TiN gate electrodes but was evident with W/TaSiN/TiN gate electrodes. This means that controllability is a characteristic of metal gate electrodes with a structure including a Si-rich layer (such as poly-Si and TaSiN)/TiN. It is considered that Ti suboxides, which increase phi m,eff as a thin insulator with negative fixed charges, or interface dipoles in the TiN/HfSiON interface, are reduced by oxidation of the Si-rich layer, producing the required result of phi m,eff decrease when the TiN thickness becomes as thin as 2 nm.

We have investigated the effect of postdeposition annealing (PDA) of Al2O3-capped HfO2 films on the flatband voltage (V-fb) shift and threshold voltage (V-t) variation in TiN gate p-type metal-insulator-semiconductor field-effect transistors (pMISFETs). We found that optimizing the PDA conditions to diffuse Al2O3 into the HfO2 films is a key factor for controlling V-fb, and high-temperature PDA immediately after Al2O3 deposition induces a positive V-fb Shift. Additional V-t variation was observed when the PDA temperatures after Al2O3 deposition were 850 and 950 degrees C. In contrast, a higher temperature PDA at 1050 degrees C after Al2O3 deposition can suppress V-t variation to almost the same level as that obtained in a HfO2 film without an Al2O3-cap layer, although the equivalent oxide thickness (EOT) increases. We also found that superior device characteristics, such as low V-t, suppression of V-t variation, and suppression of EOT increase, were obtained by performing PDA before Al2O3 deposition. (C) 2009 The Japan Society of Applied Physics

We studied the impact of Yttrium and Lanthanum incorporation into HfO2 on reliability (TDDB, PBTI and 1/f noise). They introduce smaller Weibull beta values and early failure in TDDB, with negative shift in PBTI. They are caused by the negatively charged interstitial oxygen defect generated by Yttrium and Lanthanum incorporation. The effect of Lanthanum is larger than that of Yttrium. It can be explained by the larger ion radius and molecular volume of La2O3 than Y2O3. On the other hand, they are effective in noise reduction, as an effect of interface state density reduction. The key point in fabricating low V-th and highly reliable MOSFETs is the technology for suppression of this interstitial oxygen defect generation.