Several domains of society will be disrupted once millions of high-quality qubits can be brought together to perform fault-tolerant quantum computing (FTQC). All quantum computing hardware available today is many orders of magnitude removed from the requirements for FTQC. The intimidating challenges associated with integrating such complex systems have already been addressed by the semiconductor industry -hence many qubit makers have retrofitted their technology to be CMOS-compatible. This compatibility, however, can have varying degrees ranging from the mere ability to fabricate qubits using a silicon wafer as a substrate, all the way to the co-integration of qubits with high-yield, low-power advanced electronics to control these qubits. Extrapolating the evolution of quantum processors to future systems, semiconductor spin qubits have unique advantages in this respect, making them one of the most serious contenders for large-scale FTQC. In this review, we focus on the overlap between state-of-the-art semiconductor spin qubit systems and CMOS industry Very Large-Scale Integration (VLSI) principles. We identify the main differences in spin qubit operation, material, and system requirements compared to well-established CMOS industry practices. As key players in the field are looking to collaborate with CMOS industry partners, this review serves to accelerate R D towards the industrial scale production of FTQC processors.

In quantum computing, characterizing the full noise profile of qubits can aid in increasing coherence times and fidelities by developing error-mitigating techniques specific to the noise present. This characterization also supports efforts in advancing device fabrication to remove sources of noise. Qubit properties can be subject to non-trivial correlations in space and time, for example, spin qubits in MOS quantum dots are exposed to noise originating from the complex glassy behavior of two-level fluctuator ensembles. Engineering progress in spin qubit experiments generates large amounts of data, necessitating analysis techniques from fields experienced in managing large data sets. Fields such as astrophysics, finance, and climate science use wavelet-based methods to enhance their data analysis. Here, we propose and demonstrate wavelet-based analysis techniques to decompose signals into frequency and time components, enhancing our understanding of noise sources in qubit systems by identifying features at specific times. We apply the analysis to a state-of-the-art two-qubit experiment in a pair of SiMOS quantum dots with feedback applied to relevant operation variables. The observed correlations serve to identify common microscopic causes of noise, such as two-level fluctuators and hyperfine coupled nuclei, as well as to elucidate pathways for multi-qubit operation with more scalable feedback systems.

To push gate performance to levels beyond the thresholds for quantum error correction, it is important to characterize the error sources occurring on quantum gates. However, the characterization of non-Markovian error poses a challenge to current quantum process tomography techniques. Fast Bayesian Tomography (FBT) is a self-consistent gate set tomography protocol that can be bootstrapped from earlier characterization knowledge and be updated in real-time with arbitrary gate sequences. Here we demonstrate how FBT allows for the characterization of key non-Markovian error processes. We introduce two experimental protocols for FBT to diagnose the non-Markovian behavior of two-qubit systems on silicon quantum dots. To increase the efficiency and scalability of the experiment-analysis loop, we develop an online FBT software stack. To reduce experiment cost and analysis time, we also introduce a native readout method and warm boot strategy. Our results demonstrate that FBT is a useful tool for probing non-Markovian errors that can be detrimental to the ultimate realization of fault-tolerant operation on quantum computing.

Achieving high-fidelity entangling operations between qubits consistently is essential for the performance of multi-qubit systems. Solid-state platforms are particularly exposed to errors arising from materials-induced variability between qubits, which leads to performance inconsistencies. Here we study the errors in a spin qubit processor, tying them to their physical origins. We use this knowledge to demonstrate consistent and repeatable operation with above 99% fidelity of two-qubit gates in the technologically important silicon metal-oxide-semiconductor quantum dot platform. Analysis of the physical errors and fidelities in multiple devices over extended periods allows us to ensure that we capture the variation and the most common error types. Physical error sources include the slow nuclear and electrical noise on single qubits and contextual noise that depends on the applied control sequence. Furthermore, we investigate the impact of qubit design, feedback systems and robust gate design to inform the design of future scalable, high-fidelity control strategies. Our results highlight both the capabilities and challenges for the scaling-up of silicon spin-based qubits into full-scale quantum processors. For solid-state qubits, the material environment hosts sources of errors that vary in time and space. This systematic analysis of errors affecting high-fidelity two-qubit gates in silicon can inform the design of large-scale quantum computers.

Spins of electrons in CMOS quantum dots combine exquisite quantum properties and scalable fabrication. In the age of quantum technology, however, the metrics that crowned Si/SiO2 as the microelectronics standard need to be reassessed with respect to their impact upon qubit performance. We chart the spin qubit variability due to the unavoidable atomic-scale roughness of the Si/SiO$_2$ interface, compiling experiments in 12 devices, and developing theoretical tools to analyse these results. Atomistic tight binding and path integral Monte Carlo methods are adapted for describing fluctuations in devices with millions of atoms by directly analysing their wavefunctions and electron paths instead of their energy spectra. We correlate the effect of roughness with the variability in qubit position, deformation, valley splitting, valley phase, spin-orbit coupling and exchange coupling. These variabilities are found to be bounded and lie within the tolerances for scalable architectures for quantum computing as long as robust control methods are incorporated.

A key virtue of spin qubits is their sub-micron footprint, enabling a single silicon chip to host the millions of qubits required to execute useful quantum algorithms with error correction. With each physical qubit needing multiple control lines however, a fundamental barrier to scale is the extreme density of connections that bridge quantum devices to their external control and readout hardware. A promising solution is to co-locate the control system proximal to the qubit platform at milli-kelvin temperatures, wired-up via miniaturized interconnects. Even so, heat and crosstalk from closely integrated control have potential to degrade qubit performance, particularly for two-qubit entangling gates based on exchange coupling that are sensitive to electrical noise. Here, we benchmark silicon MOS-style electron spin qubits controlled via heterogeneously-integrated cryo-CMOS circuits with a low enough power density to enable scale-up. Demonstrating that cryo-CMOS can efficiently enable universal logic operations for spin qubits, we go on to show that mill-kelvin control has little impact on the performance of single- and two-qubit gates. Given the complexity of our milli-kelvin CMOS platform, with some 100-thousand transistors, these results open the prospect of scalable control based on the tight packaging of spin qubits with a chiplet style control architecture.

High fidelity qubit readout is critical in order to obtain the thresholds needed to implement quantum error correction protocols and achieve fault-tolerant quantum computing. Large-scale silicon qubit devices will have densely-packed arrays of quantum dots with multiple charge sensors that are, on average, farther away from the quantum dots, entailing a reduction in readout fidelities. Here, we present a readout technique that enhances the readout fidelity in a linear SiMOS 4-dot array by amplifying correlations between a pair of single-electron transistors, known as a twin SET. By recording and subsequently correlating the twin SET traces as we modulate the dot detuning across a charge transition, we demonstrate a reduction in the charge readout infidelity by over one order of magnitude compared to traditional readout methods. We also study the spin-to-charge conversion errors introduced by the modulation technique, and conclude that faster modulation frequencies avoid relaxation-induced errors without introducing significant spin flip errors, favouring the use of the technique at short integration times. This method not only allows for faster and higher fidelity qubit measurements, but it also enhances the signal corresponding to charge transitions that take place farther away from the sensors, enabling a way to circumvent the reduction in readout fidelities in large arrays of qubits.

Recently, several groups have demonstrated two-qubit gate fidelities in semiconductor spin qubit systems above 99%. Achieving this regime of fault-tolerant compatible high fidelities is nontrivial and requires exquisite stability and precise control over the different qubit parameters over an extended period of time. This motivates the search for the efficient calibration of qubit control parameters against different sources of micro- and macroscopic noise and methods for noise analysis. Here, we present several single- and two-qubit parameter feedback protocols, optimized for and implemented in the state-of-the-art fast field-programmable gate array hardware. Furthermore, we present a wavelet-based analysis on feedback data collected over a ∼9 h time frame to gain insight into the different sources of noise in the system. Scalable feedback is an outstanding challenge and the presented implementation and analysis gives insight into the benefits and drawbacks of qubit parameter feedback, as feedback related overhead increases. This work demonstrates a pathway toward robust qubit parameter feedback and systematic noise analysis, crucial for mitigation strategies toward systematic high-fidelity qubit operation compatible with quantum error correction protocols.

The encoding of qubits in semiconductor spin carriers has been recognized as a promising approach to a commercial quantum computer that can be lithographically produced and integrated at scale 1 – 10 . However, the operation of the large number of qubits required for advantageous quantum applications 11 – 13 will produce a thermal load exceeding the available cooling power of cryostats at millikelvin temperatures. As the scale-up accelerates, it becomes imperative to establish fault-tolerant operation above 1 K, at which the cooling power is orders of magnitude higher 14 – 18 . Here we tune up and operate spin qubits in silicon above 1 K, with fidelities in the range required for fault-tolerant operations at these temperatures 19 – 21 . We design an algorithmic initialization protocol to prepare a pure two-qubit state even when the thermal energy is substantially above the qubit energies and incorporate radiofrequency readout to achieve fidelities up to 99.34% for both readout and initialization. We also demonstrate single-qubit Clifford gate fidelities up to 99.85% and a two-qubit gate fidelity of 98.92%. These advances overcome the fundamental limitation that the thermal energy must be well below the qubit energies for the high-fidelity operation to be possible, surmounting a main obstacle in the pathway to scalable and fault-tolerant quantum computation.

Quantum processors based on integrated nanoscale silicon spin qubits are a promising platform for highly scalable quantum computation. Current CMOS spin qubit processors consist of dense gate arrays to define the quantum dots, making them susceptible to crosstalk from capacitive coupling between a dot and its neighbouring gates. Small but sizeable spin-orbit interactions can transfer this electrostatic crosstalk to the spin g-factors, creating a dependence of the Larmor frequency on the electric field created by gate electrodes positioned even tens of nanometers apart. By studying the Stark shift from tens of spin qubits measured in nine different CMOS devices, we developed a theoretical frawework that explains how electric fields couple to the spin of the electrons in increasingly complex arrays, including those electric fluctuations that limit qubit dephasing times $T_2^*$. The results will aid in the design of robust strategies to scale CMOS quantum technology.

One of the key pathways towards scalability of spin-based quantum computing systems lies in achieving long-range interactions between electrons and increasing their inter-connectivity. Coherent spin transport is one of the most promising strategies to achieve this architectural advantage. Experimental results have previously demonstrated high fidelity transportation of spin qubits between two quantum dots in silicon and identified possible sources of error. In this theoretical study, we investigate these errors and analyze the impact of tunnel coupling, magnetic field and spin-orbit effects on the spin transfer process. The interplay between these effects gives rise to double dot configurations that include regimes of enhanced decoherence that should be avoided for quantum information processing. These conclusions permit us to extrapolate previous experimental conclusions and rationalize the future design of large scale quantum processors.

In a full-scale quantum computer with a fault-tolerant architecture, having scalable, long-range interaction between qubits is expected to be a highly valuable resource. One promising method of achieving this is through the light-matter interaction between spins in semiconductors and photons in superconducting cavities. This paper examines the theory of both transverse and longitudinal spin-photon coupling and their applications in the silicon metal-oxide-semiconductor (SiMOS) platform. We propose a method of coupling which uses the intrinsic spin-orbit interaction arising from orbital degeneracies in SiMOS qubits. Using theoretical analysis and experimental data, we show that the strong coupling regime is achievable in the transverse scheme. We also evaluate the feasibility of a longitudinal coupling driven by an AC modulation on the qubit. These coupling methods eschew the requirement for an external micromagnet, enhancing prospects for scalability and integration into a large-scale quantum computer.

Recently, several groups have demonstrated two-qubit gate fidelities in semiconductor spin qubit systems above 99%. Achieving this regime of fault-tolerant compatible high fidelities is nontrivial and requires exquisite stability and precise control over the different qubit parameters over an extended period of time. This can be done by efficiently calibrating qubit control parameters against different sources of micro- and macroscopic noise. Here, we present several single- and two-qubit parameter feedback protocols, optimised for and implemented in state-of-the-art fast FPGA hardware. Furthermore, we use wavelet-based analysis on the collected feedback data to gain insight into the different sources of noise in the system. Scalable feedback is an outstanding challenge and the presented implementation and analysis gives insight into the benefits and drawbacks of qubit parameter feedback, as feedback related overhead increases. This work demonstrates a pathway towards robust qubit parameter feedback and systematic noise analysis, crucial for mitigation strategies towards systematic high-fidelity qubit operation compatible with quantum error correction protocols.

Achieving high-fidelity entangling operations between qubits consistently is essential for the performance of multi-qubit systems and is a crucial factor in achieving fault-tolerant quantum processors. Solid-state platforms are particularly exposed to errors due to materials-induced variability between qubits, which leads to performance inconsistencies. Here we study the errors in a spin qubit processor, tying them to their physical origins. We leverage this knowledge to demonstrate consistent and repeatable operation with above 99% fidelity of two-qubit gates in the technologically important silicon metal-oxide-semiconductor (SiMOS) quantum dot platform. We undertake a detailed study of these operations by analysing the physical errors and fidelities in multiple devices through numerous trials and extended periods to ensure that we capture the variation and the most common error types. Physical error sources include the slow nuclear and electrical noise on single qubits and contextual noise. The identification of the noise sources can be used to maintain performance within tolerance as well as inform future device fabrication. Furthermore, we investigate the impact of qubit design, feedback systems, and robust gates on implementing scalable, high-fidelity control strategies. These results are achieved by using three different characterization methods, we measure entangling gate fidelities ranging from 96.8% to 99.8%. Our analysis tools identify the causes of qubit degradation and offer ways understand their physical mechanisms. These results highlight both the capabilities and challenges for the scaling up of silicon spin-based qubits into full-scale quantum processors.

Once called a ‘classically non-describable two-valuedness’ by Pauli, the electron spin forms a qubit that is naturally robust to electric fluctuations. Paradoxically, a common control strategy is the integration of micromagnets to enhance the coupling between spins and electric fields, which, in turn, hampers noise immunity and adds architectural complexity. Here we exploit a switchable interaction between spins and orbital motion of electrons in silicon quantum dots, without a micromagnet. The weak effects of relativistic spin–orbit interaction in silicon are enhanced, leading to a speed up in Rabi frequency by a factor of up to 650 by controlling the energy quantization of electrons in the nanostructure. Fast electrical control is demonstrated in multiple devices and electronic configurations. Using the electrical drive, we achieve a coherence time T 2,Hahn ≈ 50 μs, fast single-qubit gates with T π/2 = 3 ns and gate fidelities of 99.93%, probed by randomized benchmarking. High-performance all-electrical control improves the prospects for scalable silicon quantum computing.

The encoding of qubits in semiconductor spin carriers has been recognised as a promising approach to a commercial quantum computer that can be lithographically produced and integrated at scale. However, the operation of the large number of qubits required for advantageous quantum applications will produce a thermal load exceeding the available cooling power of cryostats at millikelvin temperatures. As the scale-up accelerates, it becomes imperative to establish fault-tolerant operation above 1 kelvin, where the cooling power is orders of magnitude higher. Here, we tune up and operate spin qubits in silicon above 1 kelvin, with fidelities in the range required for fault-tolerant operation at such temperatures. We design an algorithmic initialisation protocol to prepare a pure two-qubit state even when the thermal energy is substantially above the qubit energies, and incorporate radio-frequency readout to achieve fidelities up to 99.34 per cent for both readout and initialisation. Importantly, we demonstrate a single-qubit Clifford gate fidelity of 99.85 per cent, and a two-qubit gate fidelity of 98.92 per cent. These advances overcome the fundamental limitation that the thermal energy must be well below the qubit energies for high-fidelity operation to be possible, surmounting a major obstacle in the pathway to scalable and fault-tolerant quantum computation.

The small size and excellent integrability of silicon metal-oxide-semiconductor (SiMOS) quantum dot spin qubits make them an attractive system for mass-manufacturable, scaled-up quantum processors. Furthermore, classical control electronics can be integrated on-chip, in-between the qubits, if an architecture with sparse arrays of qubits is chosen. In such an architecture qubits are either transported across the chip via shuttling or coupled via mediating quantum systems over short-to-intermediate distances. This paper investigates the charge and spin characteristics of an elongated quantum dot-a so-called jellybean quantum dot-for the prospects of acting as a qubit-qubit coupler. Charge transport, charge sensing, and magneto-spectroscopy measurements are performed on a SiMOS quantum dot device at mK temperature and compared to Hartree-Fock multi-electron simulations. At low electron occupancies where disorder effects and strong electron-electron interaction dominate over the electrostatic confinement potential, the data reveals the formation of three coupled dots, akin to a tunable, artificial molecule. One dot is formed centrally under the gate and two are formed at the edges. At high electron occupancies, these dots merge into one large dot with well-defined spin states, verifying that jellybean dots have the potential to be used as qubit couplers in future quantum computing architectures.

A fault-tolerant quantum processor may be configured using stationary qubits interacting only with their nearest neighbours, but at the cost of significant overheads in physical qubits per logical qubit. Such overheads could be reduced by coherently transporting qubits across the chip, allowing connectivity beyond immediate neighbours. Here we demonstrate high-fidelity coherent transport of an electron spin qubit between quantum dots in isotopically-enriched silicon. We observe qubit precession in the inter-site tunnelling regime and assess the impact of qubit transport using Ramsey interferometry and quantum state tomography techniques. We report a polarization transfer fidelity of 99.97% and an average coherent transfer fidelity of 99.4%. Our results provide key elements for high-fidelity, on-chip quantum information distribution, as long envisaged, reinforcing the scaling prospects of silicon-based spin qubits.

The advanced nanoscale integration available in CMOS technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot formation and spin blockade in CMOS foundry-compatible devices are encouraging, but results are yet to match the control of individual electrons demonstrated in university-fabricated multigate designs. We show that quantum dots formed in a CMOS nanowire device can be measured with a remote single electron transistor (SET) formed in an adjacent nanowire, via floating coupling gates. By biasing the SET nanowire with respect to the nanowire hosting the quantum dots, we controllably form ancillary quantum dots under the floating gates, thus enabling control of all quantum dots in a 2 × 2 array, and charge sensing down to the last electron in each dot. We use effective mass theory to investigate the ideal geometrical parameters in order to achieve interdot tunnel rates required for spin-based quantum computation.

Single-electron spin qubits employ magnetic fields on the order of 1 Tesla or above to enable quantum state readout via spin-dependent-tunnelling. This requires demanding microwave engineering for coherent spin resonance control, which limits the prospects for large scale multi-qubit systems. Alternatively, singlet-triplet readout enables high-fidelity spin-state measurements in much lower magnetic fields, without the need for reservoirs. Here, we demonstrate low-field operation of metal-oxide-silicon quantum dot qubits by combining coherent single-spin control with high-fidelity, single-shot, Pauli-spin-blockade-based ST readout. We discover that the qubits decohere faster at low magnetic fields with T_2^ Rabi =18.6 μs and T_2^* =1.4 μs at 150 mT. Their coherence is limited by spin flips of residual 29 Si nuclei in the isotopically enriched 28 Si host material, which occur more frequently at lower fields. Our finding indicates that new trade-offs will be required to ensure the frequency stabilization of spin qubits, and highlights the importance of isotopic enrichment of device substrates for the realization of a scalable silicon-based quantum processor.