The characteristics of β -Ga 2 O 3 /Al 2 O 3 /Pt capacitors fabricated via the dummy-SiO 2 ( d-SiO 2 ) process at 800 °C under O 2 (D-O 2 ), N 2 (D-N 2 ), and 3% H 2 (D-H 2 ) atmospheres were investigated. The surface of Ga 2 O 3 after the d-SiO 2 process was as smooth as that after the sulfuric acid-hydrogen peroxide mixture treatment (Control). The flatband voltage ( V fb ) hysteresis decreased as follows: Control (0.76 V) > D-H 2 (0.56 V) > D-N 2 (0.43 V) > D-O 2 (0.37 V). The interface state density of the D-O 2 capacitor was significantly reduced to 6 × 10 11 cm −2 eV −1 at −0.4 eV from conduction band. The V fb shift caused by the electron traps according to the near-interface trap model under positive bias stress substantially improved for the capacitors fabricated by the d-SiO 2 process. The poor characteristics of the Control capacitor are due to the presence of the unstable layer on the Ga 2 O 3 surface. The improved electrical characteristic of the d-SiO 2 capacitors is due to the modified Ga 2 O 3 surface, which eliminated the unstable Ga 2 O 3 layer. This is the result of hydrogen contained within the dummy SiO 2 layer supporting the removal of Ga 2 O 3 . The difference in the decomposition reaction of Ga 2 O 3 due to the atmosphere gas of the d-SiO 2 process leads to differences in electrical properties.

The characteristics of beta-Ga2O3/Al2O3/Pt capacitors fabricated via the dummy-SiO2 (d-SiO2) process at 800 degrees C under O-2 (D-O-2), N-2 (D-N-2), and 3% H-2 (D-H-2) atmospheres were investigated. The surface of Ga2O3 after the d-SiO2 process was as smooth as that after the sulfuric acid-hydrogen peroxide mixture treatment (Control). The flatband voltage (V-fb) hysteresis decreased as follows: Control (0.76 V) > D-H-2 (0.56 V) > D-N-2 (0.43 V) > D-O-2 (0.37 V). The interface state density of the D-O-2 capacitor was significantly reduced to 6 & times; 10(11 )cm(-2)eV(-1) at -0.4 eV from conduction band. The V-fb shift caused by the electron traps according to the near-interface trap model under positive bias stress substantially improved for the capacitors fabricated by the d-SiO2 process. The poor characteristics of the Control capacitor are due to the presence of the unstable layer on the Ga2O3 surface. The improved electrical characteristic of the d-SiO2 capacitors is due to the modified Ga2O3 surface, which eliminated the unstable Ga2O3 layer. This is the result of hydrogen contained within the dummy SiO2 layer supporting the removal of Ga2O3. The difference in the decomposition reaction of Ga2O3 due to the atmosphere gas of the d-SiO2 process leads to differences in electrical properties.

Controlling the dielectric/semiconductor interfaces is essential for the development of semiconductor power devices. Gallium nitride (GaN) has attracted significant attention as a next-generation semiconductor owing to its superior properties; however, controlling the dielectric/GaN interface remains a critical challenge, unlike silicon (Si). In this study, we observed native oxides formed on both the c-face and m-face GaN surfaces after simple air exposure using scanning transmission electron microscopy. Oxygen diffusion into the Si crystal was significantly suppressed by the formation of a SiOx layer; on the other hand, gradual oxygen diffusion (Ga–N–O layer) with a depth of ∼2.0 nm into the GaN crystal was observed. Remarkably, a 1.5 times larger amount of oxygen was incorporated in the m-face GaN than in the c-face GaN. These findings provide key insights into the control of dielectric/GaN interfaces and may facilitate the development of GaN-based power devices.

We previously reported a powerful method to improve dielectric/GaN interface properties: the dummy SiO2 process [Y. Irokawa et al., ECS J. Solid State Sci. Technol. 13, 085003 (2024)]. Here, GaN metal-oxide-semiconductor (MOS) interfaces prepared with this process were investigated using a sub-bandgap photo-assisted capacitance-voltage technique. GaN MOS interfaces were previously revealed to have deep states, and the dummy process was expected to reduce the number of deep states through its interface modification process. However, the deep state densities in Al2O3/GaN MOS interfaces after the dummy process did not substantially change compared with those in devices fabricated without the dummy process. Meanwhile, we recently observed oxygen atoms in positions proximate to nitrogen sites in MOS interface regions, with the GaN crystal maintaining the same structure [J. Uzuhashi et al. ECS J. Solid State Sci. Technol. 14, 085001 (2025)]. We therefore performed first-principles calculations and found that, under certain circumstances, a pair of oxygen atoms replacing nitrogen atoms in GaN created deep states in the bandgap, with slight displacements, similar to DX centers; this substitution could be one of the origins of deep states in GaN MOS interfaces.

The boron-doped diamond (B-diamond) metal-oxide–semiconductor field–effect transistors (MOSFETs) are fabricated and characterized at operating temperatures up to 400°C. The SiO2 serves as the gate oxide insulator, while the Ti/Pt bilayer is employed as the gate contact metal. As the operating temperature rises from room temperature (RT) to 400°C, the absolute drain current maximum for the B-diamond MOSFET increases from 3.9 μA mm−1 to 177.4 μA mm−1. Conversely, the on-resistance decreases significantly from 1469.8 kΩ mm to 16.5 kΩ mm. The on/off ratio for the MOSFET at RT is 1.9 × 105, which increases to over 5.0 × 106 at temperatures exceeding 100°C. The threshold voltage exhibits a decreasing trend, though it deviates from this trend at 300°C. The subthreshold voltage and extrinsic transconductance maximum show increasing trends from 113 mV dec−1 to 299 mV dec−1 and from 0.9 μS mm−1 to 23.1 μS mm−1, respectively. The interfacial trapped charge density is found to be stable in the range of 8.0 × 1011–2.3 × 1012 eV−1 cm−2.

We previously reported that a dummy-SiO 2 process improved the dielectric/GaN interface properties [Y. Irokawa et al., ECS J. Solid State Sci. Technol. 13 , 085003 (2024)]; however, the improvement mechanism has remained unclear. In this study, the atomic-scale structural changes at Al 2 O 3 /GaN interfaces prepared with the dummy-SiO 2 process are investigated through aberration-corrected scanning transmission electron microscopy with energy-dispersive X-ray spectroscopy. The results reveal that disordered GaN(O) polarity in the interfacial layer in a sample prepared by the standard process was restored to some extent after the dummy-SiO 2 process, which likely led to the improved interface electrical properties.

Relative permittivity and dielectric losses (loss tangents) of a 2 inch polycrystalline diamond wafer are measured over frequency range of 10–330 GHz. Loss tangent values as low as 2 × 10 −6 –3.5 × 10 −5 are obtained across the entire range and are found to decrease with increasing the frequency in the 220–330 GHz band, likely due to conductivity originating from non-diamond phases. Diamond-based materials are promising candidates for 6G communication technologies.

Next‐generation thermometry requires ultrahigh temperature sensitivity, precision, and microscale or nanoscale spatial resolution for bio‐calorimetry, optoelectronic sensing, quantum science, energy storage, and thermal management of electronic devices. Current thermometry approaches based on thermocouple, resistive, and optical mechanisms suffer from various problems such as large volume, low resolution, high noise level, and narrow temperature range. Microelectromechanical system (MEMS) resonators hold great potential as thermometry due to the small size, batch fabrication, and facile integration with electrical circuits. However, mainstream silicon MEMS thermometry struggles with the trade‐off between responsivity, temperature resolution, and sensitivity. In this work, we utilize the highest crystal quality single‐crystal diamond and multi‐mode resonance for MEMS cantilever thermometry to address these challenges. The resulting diamond MEMS thermometry exhibits unparalleled performance, with an ultra‐high sensitivity of ≈22 nK Hz−1/2 , a high temperature resolution of 100 µK, and a wide‐temperature range from 6.5 to 380 K. The groundbreaking sensing performance highlights the versatility and transformative potential of diamond MEMS resonator as the next‐generation platform for ultrahigh‐sensitivity and high‐resolution temperature sensing in microscale or nanoscale space.

Deep ultraviolet (DUV) photodetectors (PDs) based on ultra-wide bandgap semiconductor diamond-based have attracted extensive attention due to the immunity to solar light on the earth and thermal stability in extremely harsh environments. However, the preparation of a high-quality and high-purity single-crystal diamond epilayer remains a major obstacle to achieve high photo-response performance. Here, we demonstrate that diamond PDs with tunable photoresponse properties can be obtained on type-Ib diamonds through simple annealing in ambient H2 and a surface ozone treatment process. The surface holes and the nitrogen defects inside the type-Ib diamond work together to regulate the overall photoresponse performance. The responsivity of the PDs can be adjusted from 84.3 A W-1 to 2.65 x 104 A W-1, and the response time can be modulated from 42.5 s to less than 240 ms. The achievement of photo response performance modulation of PDs originates from the cooperative effect of deep natural nitrogen defects and surface states. Thus, our findings provide an alternative method and facile strategy for the tailoring of PDs' performance, which can meet different application requirements.

Various oxide insulators are formed on surface-channeled hydrogen-terminated diamond epitaxial layer (H-diamond) for metal-oxide-semiconductor (MOS) capacitors. The leakage current properties of the MOS capacitors and the dielectric constants of the oxide insulators are illustrated. As the dielectric constant increases, there is a decrease in the leakage current density. Additionally, the electrical properties of MOS field-effect transistors with different oxide insulators are summarized.

Boron-doped diamond (B-diamond) metal–oxide–semiconductor field-effect transistors (MOSFETs) are fabricated on a 150 nm-thick epitaxial layer. The threshold voltage of the B-diamond MOSFET is measured at −8.0 V, indicating a normally-off behavior. Due to the high activation energy for the boron dopants and the relatively thin epitaxial layer, a limited number of holes are formed in the B-diamond and potentially trapped within the Al2O3/B-diamond interface, leading to the normally-off behavior observed in the B-diamond MOSFET. The absolute breakdown voltage for the B-diamond MOSFET is found to exceed 1.7 kV. When divided by the gate-to-drain electrode length of 11.3 μm, the breakdown field is calculated to be 1.52 MV/cm, which is more than two times larger than that of the previous B-diamond MOSFETs.

Diamond, with its ultra-wide bandgap energy, has emerged as an extreme semiconductor due to its extraordinary electronic and thermal properties. The hydrogen-terminated diamond surface has attracted extensive attention due to its unique p-type surface conductivity. However, the fundamental nature of this p-type conductivity remains incompletely understood using existing surface analysis techniques. In this study, we investigate the dynamic thermal desorption of surface adsorbates on hydrogen-terminated diamond using single-crystal diamond microelectromechanical systems resonators, avoiding charging-related issues. By analyzing variations in resonance performance and surface conductivity, we uncover several key findings: (i) The desorption of surface adsorbates reaches saturation at approximately 873 K. (ii) The desorbed mass per unit area is around 2.3 fg/μm2, corresponding to an equivalent thickness of approximately 1 nm. (iii) The surface conductivity of hydrogen-terminated diamond can be fully restored even after annealing at 873 K, indicating the thermal stability of C–H bonds. This work offers an alternative insight into the surface properties of hydrogen-terminated diamond, accelerating the development of highly reliable diamond-based electronic devices.

In this study, a three-step surface treatment, composed of SiO2 deposition, subsequent annealing, and SiO2 removal, is adopted for the fabrication of c- and m-plane n-type GaN/Al2O3 MOS structures, and the impact of the proposed process on electrical properties and its crystal face dependence are systematically investigated. While no significant changes are observed after the proposed surface treatment for m-face GaN, an identical process causes changes in the properties of c-face GaN MOS structures: an about 0.2V lower flat-band voltage (VFB) and an about 0.2eV higher conduction band offset, associated with a change in the thickness or crystalline quality of a gallium oxide (GaOx) layer on the c-face GaN surface. The modified energy band alignment leads to a reduced gate leakage current, reducing the VFB drift after high-field positive bias stress (4.5MV/cm) almost by half only for c-face GaN MOS structures. The fact that even an identical process has a crystal face-dependent impact on the properties of GaN MOS structures is important in developing the fabrication process of GaN planar and trench MOSFETs.

Surface states of O-terminated diamond determine the electronic properties of devices. The in-situ realization of the surface properties in atomic scale relies on ultra-high vacuum and sophisticated techniques. Here, we propose the utilization of diamond microelectromechanical system (MEMS) to reveal the surface adsorption/desorption of oxygen (O)-terminated diamond. Our strategy is to measure the resonance frequency shift of diamond cantilevers by in-situ heating and cooling the cantilevers. Based on the frequency shift, the mass and thickness of the adsorption layer of O-terminated diamond was disclosed to be 0.0015 pg/mu m(2) and similar to 0.4 nm, providing a new insight into semiconductor electronics.

The precise characterization of bulk properties of thin homoepitaxial diamond layers with micrometer thickness is difficult due to the interference from the substrate. In this work, we utilized smart-cut method to fabricate single-crystal diamond (SCD) cantilevers or plates and transferred them to a foreign substrate (SiO2/Si). The mechanical resonance of the SCD cantilevers was characterized to confirm that the ion-implantation-induced damaged layer was nearly removed under the cantilever. Raman, photoluminescence (PL), and cathodoluminescence (CL) measurements were conducted on the transferred SCD cantilevers/plates and homoepitaxial layers on the substrate with and without ion implantation. As a result, it was found that both of the Raman spectral properties of the SCD layer on the ion-implanted regions and the freestanding SCD plates/cantilevers successfully avoid interference from the substrate. PL analysis showed no emission peaks attributable to nitrogen and other defects from the epilayers. Additionally, CL analysis from the freestanding cantilevers/plates disclosed the exciton emission at around 236 nm at room temperature. These results suggest the high crystal quality of the SCD cantilevers for MEMS applications.

My research progress to date is reviewed by focusing on III-nitride and diamond semiconductors within the scope of my limited experience. I have developed high-quality AlxGa1-xN epitaxial layers, Ohmic contact materials for GaN and diamond, and diamond optical and electronic devices. While my research themes have changed at each university and national laboratory, I have been involved in semiconductor crystal growth, electrode formation, processing, and device development. I believe that my broad experience in materials research will lead to new discoveries in a variety of semiconductor fields.

Various β-Ga 2 O 3 -based power devices have been widely investigated because β-Ga 2 O 3 has a large bandgap of ~4.9 eV and high breakdown electric field of 8 MVcm -1 [1-3]. It is well understood to be important to reduce the number of electrical defects at the Ga 2 O 3 /dielectric interface for n-β-Ga 2 O 3 /dielectric/metal capacitor. However. it was unclear which process in the fabrication of β-Ga 2 O 3 capacitors caused these electrical defects. For example, surface cleaning of the β-Ga 2 O 3 substrate, an Al 2 O 3 film deposition as a dielectric by the atomic layer deposition (ALD) method, and high-temperature annealing (HTA) are considered. On the other hand, for GaN power device, we reported that Ga 2 O 3 interfacial layer was generally grown at GaN/SiO 2 interface and affected to electrical properties. And we recently proposed dummy SiO 2 technique ( d-SiO 2 ) to improve the quality of the Ga 2 O 3 layer on the GaN surface [4]. In this study, we tried to modify the Ga 2 O 3 /Al 2 O 3 interface using the surface cleaning of β-Ga 2 O 3 substrate, HTA at various annealing temperatures in O 2 ambient, and d-SiO 2 . We also discuss about influence of Ga 2 O 3 /Al 2 O 3 interface on characteristic including physical and electrical properties for Ga 2 O 3 capacitors. In the Ga 2 O 3 surface cleaning process, the characteristics of β-Ga 2 O 3 /Al 2 O 3 /Pt capacitors fabricated by using with and without BHF treatment after Aceton and SPM treatment were firstly compared. No difference was observed in the surface roughness of the Ga 2 O 3 substrate. Positive flatband voltage (V fb ) shift increased with increasing the BHF treatment time under positive bias stress (PBS). Based on these experimental data, the capacitor was generally fabricated using the standard process including the SPM treatment and maximum fabrication temperature at 300 °C (Standard). Next, after annealing β-Ga 2 O 3 substrates at 800-1000 °C in O 2 , the Al 2 O 3 capacitors were also prepared (HTA-capacitor). The large V fb hysteresis of the HTA-capacitors increased from 1.6 to 1.9V at V-V fb = 4.0V as annealing temperature increased while the Standard capacitor maintained V fb hysteresis of 0.73V. It is thought that the number of trapped/detrapped electrons increased. Finally, characteristics of the capacitors fabricated by d-SiO 2 were examined. After cleaning β-Ga 2 O 3 substrate using SPM solution, a dummy SiO 2 (5 nm) layer was deposited on β-Ga 2 O 3 via plasma-enhanced ALD at 300 °C. Post annealing was carried out at 800-1000 °C in O 2 . Here, we confirmed that Ga diffused into SiO 2 layer regardless of annealing temperature by SIMS analysis, indicating that Ga-O decompose to Ga atoms at Ga 2 O 3 surface. A dummy SiO 2 layer was removed using HF solution. Next, a 10-nm-thick Al 2 O 3 dielectric was deposited on modified-Ga 2 O 3 substrate via ALD at 300 °C, Pt gate electrode and Ti/Pt ohmic contact were formed. Finally, Post metallization annealing was performed at 300 °C (d-capacitor). The V fb hysteresis of the d-capacitors significantly reduced to 0.4V at V-V fb = 4.0V regardless of annealing temperature while the V fb hysteresis of the Standard capacitor exhibited 0.73V, indicating that the modified Ga 2 O 3 surface was able to decrease the number of trapped/detrapped electrons. To study reliability, the bias V-Vfb was applied to 2.0V under PBS. The V fb shifted toward positive direction as the stress time increased from 0 to 300s, indicating the presence of some electron trapping sites at β-Ga 2 O 3 /Al 2 O 3 interface of the capacitors. The d-capacitors exhibited significantly smaller V fb shift value compared to the Standard and HTA-capacitors. We conclude that a stable Ga 2 O 3 surface was formed by d-SiO 2 and could be obtained a small V fb hysteresis and superior reliability under PBS for β-Ga 2 O 3 /Al 2 O 3 capacitor. This research was supported by the Ministry of Education, Culture, Sports, Science and Technology, Japan (MEXT), through its "Creation of Innovative Core Technology for Power Electronics" Program Grant Number JPJ009777 and ARIM (JPMXP1223NM5088). Reference [1] M. Higashiwaki et al., Appl. Phys. Lett. 100, 013504 (2012). [2] K. Zeng et al., IEEE Electron Device Lett. 39, 1385 (2018). [3] H. H. Tippins, Phys. Rev. 140, A316 (1965). [4] Y. Irokawa t al., ECS J. Solid State Sci. Technol. 13, 085003 (2024).

Diamond has been demonstrated as an exceptional semiconductor for microelectromechanical system (MEMS) sensors, offering high sensitivity and reliability due to its ultra-wide bandgap energy, superior mechanical properties, and high thermal conductivity. For MEMS resonator-type sensors that rely on frequency shift detection, such as mass sensors, the overall performance, including the sensitivity, speed, resolution, and noise level, is collectively determined by the stability of the resonance frequency. To improve the sensing performance, geometry optimization and nonlinear operation methods have been used, but these methods lead to increased fabrication complexity or increased energy dissipation. In this work, we propose the utilization of high-order resonance modes to enhance the resonance frequency stability of single-crystal diamond (SCD) MEMS resonators, achieving a significant improvement in mass resolution to as low as 0.15 atto-grams at room temperature. This approach offers a streamlined and competitive strategy for advancing the sensing capabilities of MEMS sensors.

Single-crystal diamond (SCD) microelectromechanical systems (MEMS) resonators with lower energy dissipation and higher quality (Q) factors have always been pursued for the development of high-sensitivity and high signal-to-noise ratio (SNR) MEMS sensors. The intrinsic loss such as the crystal quality and extrinsic loss of clamping loss have been examined to improve the Q factors of SCD MEMS resonators. Nevertheless, the surface termination induced energy dissipation has rarely been known due to the lack of high crystal quality diamond resonators and in-situ characterization. Here we examine the effect of oxygen-termination on the surface energy dissipation of SCD cantilevers by in-situ heating these cantilevers in a high vacuum chamber. After thermal treatment of the cantilevers at 933 K, the Q factor of the cantilever is improved from 2.8x105 to 3.3x105 (i.e. the 120 μm-long). The resonance frequency increase confirms the desorption of surface adsorbates. Compared to silicon, on which a native solid-state oxide exists, the surface oxygen-termination induced loss in diamond MEMS is much smaller. The non-existence of native oxides on diamond surface is an obvious merit toward ultra-high Q factor MEMS resonators.

To achieve ultra-high gain deep-ultraviolet (DUV) detectors based on ultra-wide bandgap semiconductors comparable with those of bulky photomultiplier tubes (PMTs), avalanche photodiodes have usually been adopted. However, the high-operation voltage (similar to 100 V) is not compatible with monolithic integration. Herein, it is demonstrated that the ultra-high gain DUV photodetectors (PDs) with low operation voltages (<5 V) can be achieved by using the synergistic effect of surface states and deep defects in a type-Ib single-crystal diamond (SCD) substrate. The overall photoresponse, such as the sensitivity, dark current, spectral selectivity, and response speed, of the diamond DUV-PDs can be simply tailored by the surface hydrogen or oxygen termination of the SCD substrate. The DUV responsivity and external quantum efficiency are more than 2.5 x 10(4)A/W and 1.4 x 10(7)%, respectively, at 220 nm-wavelength light, comparable with those of PMTs. The DUV/visible light rejection ratio (R-220 (nm)/R-400 (nm)) is as high as 6.7 x 10(5). The depletion of the 2D hole gas by deep nitrogen defect provides a low dark current and the filling of the ionized nitrogen upon DUV illumination induces a huge photocurrent. The synergistic effect of the surface states and the bulk deep defects opens the avenue for the development of DUV detectors compatible with integrated circuits.