A comparison of heavy-ion and proton-induced single event effect sensitivities has been made using the Xilinx Virtex-II field programmable gate array (FPGA). Recently fabricated test samples are selected for observations of single event upset and single event functional interrupt. A complex relationship appears to exist between the heavy ion and proton sensitivities due to effects such as multiple-bit upsets and elastic nuclear scattering.

Ultracapacitors are promising components for energy storage, power backup and delivery systems. Our study examines the possible effects associated with gamma and proton irradiation in selected samples up to 1200 farad.

Static random access memory (SRAM) upset rates in field programmable gate arrays (FPGAs) from the Xilinx Virtex 2 family have been tested for radiation effects on configuration memory, block RAM and the power-on-reset (POR) and SelectMAP single event functional interrupts (SEFIs). Dynamic testing has shown the effectiveness and value of Triple Module Redundancy (TMR) and partial reconfiguration when used in conjunction. Continuing dynamic testing for more complex designs and other Virtex 2 capabilities (i.e., I/O standards, digital clock managers (DCM), etc.) is scheduled.

The speed, I/O count, and reconfigurability of SRAM-based FPGAs make them attractive for flight applications. However, critical designs require effective upset. Measurements of the effectiveness of configuration control and TMR during heavy-ion irradiation are reported. IN TRODUC TlON The increasingly advanced technologies of fieldprogrammable-gate arrays (FPGAs) in the commercial sector has resulted in higher speed and lower core voltages, improving both integration and allowing for better power consumption. In addition, the decreasing costs and development time needed to implement FPGAs compared to designs with discrete logic devices has made programmable logic devices favorable in space and avionic applications as well. They offer flexibility for changing requirements, in-system and on-orbit programmability as well as potential recovery of in-flight failures. The Xilinx Virtex II is a re-configurable SWM-based FPGA that also has the ability to conduct partial configuration or, write to the configuration memory post-configuration while in operation. However, while SRAM-based memory in the FPGA is useful for reconfiguration, the static memory elements and combinatorial logic paths are susceptible to upset from heavy-ion particles in interplanetary space. The Virtex I1 has been selected for the present study because several variations of the Virtex FPGA are currently or expect to be implemented in various missions. Many studies have been carried out on SRAMbased FPGAs [I]-[4]. They have also shown that with proper mitigation, SEU induced failures can be properly controlled [5]. Static test results on the configuration memory of the Virtex II XC2V1000 along with projected upset rates have been reported at MAPLD, 2002 [6]. These results are used as a comparison and baseline for data collected from two recent mitigated dynamic tests. A future test with an in-depth triple modular redundancy design will be conducted by the Xilinx Consortium, comprised of members from Xilinx, Aerospace Corp., Sandia National Labs, SEAKR Engineering and JPL. Final results will be analyzed and considered for implementation in future space based applications. EXPERIMENTAL D ETAlLS The device chosen for this study is the Virtex I1 XC2V1000. The device was procured in a commercial 256-pin wire-bond standard ball gate array (BGA) package. It is fabricated on a 0.15pm / 0.12pm CMOS &layer metal process and includes 40 block RAMS, 432 maximum I/Os, and 4.1M configuration bits. The XC2V1000 is ideal for SEU characterization as it is the only member of the Virtex II family that has a face-up die, suitable for heavy ion penetration. --__--The research in this paper was carried out at the Jet Propulsion Laboratory, California Institute of Technology, under contract with the National Aeronautics and Space Administration (NASA), under the NASA Electronic Parts and Packaging Program, Code AE Following the static tests on the configuration memory, two basic dynamic tests have been performed to study the behavior of the configuration memory cells while undergoing irradiation with heavy ions. The test vehicle and methodology of the two experiments are identical. Both continuously check for errors but the latter test includes a mechanism to correct the errors as they are detected. The design configured into the DUT is a shift register utilizing a “checkerboard” type pattern. The Virtex II XC2V1000 is chemically etched to expose the die and is situated on a Xilinx development board (Fig. 1). Alongside the XC2V1000 is another FPGA, the XCVlOO, an on-board service FPGA used to count SEUs and send them to the user interface. Errors in the configuration memory are detected and counted through the use of readback, a feature of Xilinx FPGAs that allow users to read from the memory post-configuration. The number of counts is then sent to a user interface titled Configuration Monitor; a custom Visual Basic program used to configure the DUT as well as record and display the configuration memory upsets as they occur. Once errors are detected, the second test proceeds to correct the upsets through partial re-configuration. This process, also known as “scrub”, will cause the configuration memory to be partially re-configured by reloading only the crucial segment of the configuration bitstream [7]. A custom C++ software application was also available at the end of each beam run to read back the number of errors that accumulated in the configuration logic block (CLB) frames, block RAM cells and configuration control registers. The custom software is named FlVlT for Fault Injection Verification Tool and communicates with the device-under-test via the SelectMap or JTAG interface. By combining the efforts and knowledge gained through these initial experiments, the next test will apply mitigation schemes such as triple module redundancy to determine the effectiveness and usage in space. Fig 1. Diagram of dynamic test setup. Configuration

We present results of continuing efforts to evaluate total dose bias dependency and ELDRS effects in bipolar linear microcircuits. Several devices were evaluated, each exhibiting moderate to significant bias and/or dose rate dependency.

SRAM-based reconfigurable programmable logic is widely used in commercial applications and occasionally used in space flight applications because of susceptibility to single-event upset (SEU). Upset detection and mitigation schemes have been tested on the Xilinx Virtex II X-2V1000 in heavy-ion and proton irradiation to control the accumulation of SEUs and to mitigate their effects on the intended operation. Non-intrusive upset detection and partial reconfiguration in combination with TMR can repair the design to maintain state information. In-beam results on a simple test design demonstrate the effectiveness of these methods when used together.

The XQR18V04 was evaluated for single event upset rates using proton and heavy ions. The PROM was demonstrated to be immune to latch-up, as well as to static upset in the flash memory cells, to an LET > 125 MeV/mg/cmz (effective). The PROM was also tested in a dynamic mode, which revealed three distinct error modes: Read Bit Errors, Address Errors, and a Single Event Functional Interrupt (SEW which affected the data output drivers. Saturation cross-sections, and onset thresholds, for these errorinodes were measured at the heavy ion facility at Texas A&M University, and the proton facility at UC Davis. Additional testing was performed at UC Davis and the Cobalt 60 source at McClellan Air Force Base to examine the effect to TID life as a function of power biasing. The PROM demonstrated a 100% improvement in total TID life with an 84% percent decrease in device usage.

GaAs micro-electromechanical RF relays fabricated by surface micromachining techniques were characterized for their response to total ionizing dose. Microrelays with two different geometries were studied. For one geometry, changes in switch actuation voltage at moderate dose levels were observed. For an alternative geometry, no change in actuation voltage was observed. A mechanism for dielectric charge trapping and its effect on the electrostatic force is proposed.

Radiation tests of Interpoint DC-DC converters, guaranteed by the manufacturer to 100 krad(Si), showed catastrophic failures at total dose levels as low as 4 krad(Si). Special diagnostic tests showed that failures were caused by an internal CMOS MOSFET driver chip being used in an application that differed from earlier radiation tests of the component. This paper discusses radiation testing, failure modes, and the method used to overcome this problem weeks prior to launch of two space systems.

Total dose tests of several bipolar linear devices show sensitivity to both dose rate and bias during exposure. All devices exhibited enhanced low dose rate sensitivity (ELDRS). An accelerated ELDRS test method for three different devices demonstrates results similar to tests at low dose rate. Behavior and critical parameters from these tests are compared and discussed.