This viewgraph presentation reviews the basics of single event upset mitigation, triple-module redundancy (TMR), new "fitting" equation for TMR, and examples of application to real data.

Fault-injection experiments on Virtex-II FPGAs quantify failure and degradation modes in I/O channels incorporating triple modular redundancy (TMR). With increasing frequency (to 100 MHz), full TMR under both I/O standards investigated shows more configuration bits have a measurable performance effect.

Heavy-ion irradiation and fault injection experiments were conducted to evaluate the upset sensitivity of the Xilinx Virtex-II field programmable gate arrays (FPGAs) input/output block (IOB). Full triple module redundancy (TMR) of the IOBs, in combination with regular configuration scrubbing, proved to be a quite effective upset mitigation method.

Static random access memory (SRAM) upset rates in field programmable gate arrays (FPGAs) from the Xilinx Virtex 2 family have been tested for radiation effects on configuration memory, block RAM and the power-on-reset (POR) and SelectMAP single event functional interrupts (SEFIs). Dynamic testing has shown the effectiveness and value of Triple Module Redundancy (TMR) and partial reconfiguration when used in conjunction. Continuing dynamic testing for more complex designs and other Virtex 2 capabilities (i.e., I/O standards, digital clock managers (DCM), etc.) is scheduled.

A recent failure of Galileo's magnetic recorder was attributed to LED degradation. Annealing the culprit OP133 proved successful: irreplaceable data, taken during the encounter with Jupiter's previously unvisited moon Amalthea, was recovered. Annealing test data for both proton and electron displacement damage combined with a simple device temperature model explains some details of the failure and the partial recovery of recorder motor function.

SRAM-based reconfigurable programmable logic is widely used in commercial applications and occasionally used in space flight applications because of susceptibility to single-event upset (SEU). Upset detection and mitigation schemes have been tested on the Xilinx Virtex II X-2V1000 in heavy-ion and proton irradiation to control the accumulation of SEUs and to mitigate their effects on the intended operation. Non-intrusive upset detection and partial reconfiguration in combination with TMR can repair the design to maintain state information. In-beam results on a simple test design demonstrate the effectiveness of these methods when used together.

Single-event upset effects from heavy ions are measured. for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes and core voltages. Multiple-bit upsets in registers and D-cache were measured and compared with single-bit upsets. Also, the scaling,of the cross section with reduction of feature size for SOI microprocessors is discussed.

A new dosimetry method using an array of MOS transistors is described for a measuring dose absorbed from ionizing radiation. The method uses direct measurement of the number of cells that change state as a function of applied-operating bias to a SRAM as a function of absorbed dose. Because the input and output of a SRAM are digital, the measurement of dose is easily accessible by a remote processing system. The devices show minimal response to total ionizing dose, but individual SRAM cells show strong microdose effects.

Excessive source-pin leakage current was found to cause the Galileo spacecraft gyroscope slew sensor to report incorrect spacecraft slew and thereby cause the computer to command inappropriate slewing. At normal bias, ground tests had found similar leakage to occur at dose levels similar to in-space levels. Controlled bias versus dose is used on-orbit in order to induce radiation-annealing and minimize growth of the leakage current in a DG181 JFET device. The growth of leakage current is minimized by turning the JFET power voltage off while it is in the radiation belts, thus, allowing for operation of the gyroscope attitude control system (ACS) when it is outside the radiation belts. During several 10- to 30-krad passes through the radiation belts, the leakage-associated damage was seen to slightly recover while power was turned off, but dramatically increase while turned on. The data provide perspective on the relations between ground test/design and optimization of performance in radiation and it suggests ways that procedures for ground testing could be improved.

Radiation tests of Interpoint DC-DC converters, guaranteed by the manufacturer to 100 krad(Si), showed catastrophic failures at total dose levels as low as 4 krad(Si). Special diagnostic tests showed that failures were caused by an internal CMOS MOSFET driver chip being used in an application that differed from earlier radiation tests of the component. This paper discusses radiation testing, failure modes, and the method used to overcome this problem weeks prior to launch of two space systems.

Upset results for backside irradiated PowerPC750s (thin epi) and SDRAMs (deep charge collection from diffusion) illustrate the validity of single event test data when irradiating through a layer of silicon substrate. However, heavy-ion LET assignments require accurate material and thickness determination. Taking irradiating through materials further, the Texas A&M cyclotron uses adjustable degraders to offer a continuous range of heavy ion LETs as well as an optional in-air test fixture.

Proton and heavy-ion single-event upset susceptibility has been measured for the Motorola PowerPC7400. The results show that this advanced device has low upset susceptibility, despite the scaling and design advances.

Results from fault injection experiments on a modern complex processor, the PPC7400, are combined with static register ground testing to predict single-event upset rates of several benchmark application programs. These results compare favorably with in-beam measurements on the same programs.

This paper documents radiation effects observed in selected spacecraft at the system and subsystem levels, and where possible, relates them to predicted radiation effects in parts. Comparisons are also made as functions of design paradigm, assurance philosophy, and the vintage and complexity of the parts and the system.

Proton and heavy ion upset susceptibility has been measured individually for six types of storage elements in an advanced commercial processor, the PowerPC750, from two manufacturers: Motorola and IBM. Data on interfering program malfunctions was also collected. Compared to earlier PPC603e results, the upset susceptibility has decreased somewhat.