A 1/f noise model is developed for reverse biased diodes based on McWhorter’s concept of charge tunneling into semiconductor states at passivation layer interfaces [A. L. McWhorter, in Semiconductor Surface Physics, edited by R. H. Kingston (University of Pennsylvania Press, Philadelphia, 1957), pp. 207–228]. The charge modulates the width of semiconductor surface charge layers on either side of the junction, resulting in fluctuations in dark current from these volumes due to the net difference in depletion and diffusion current generation rates per unit volume in the semiconductor. The 1/f spectrum associated with the fluctuating surface charge translates into a 1/f spectrum in thermally generated diode dark current. The model is applied to midwavelength infrared HgCdTe N+/P diode architectures.

The utilization of the non-equilibrium photodiode concept for high operating temperature (HOT) FPAs is discussed, both generically, and with regard to the specific example of MWIR HgCdTe. The issues of dark current, surface passivation, and 1/f noise are considered for three different architectures, namely N+/N-/P+, N+/P-/P+, and nBn. These architectures are examined with regard to possible FPA performance limitations, and potential difficulty in reduction to practice. Performance data obtained at DRS for the N+/N-/P+ and N+/P-/P+ HgCdTe architectures will be presented.

DRS is a major supplier of the 25μm pixel pitch 640x480 and 320x240 infrared uncooled focal plane arrays (UFPAs) and camera products for commercial and military markets. The state-of-the-art 25μm pixel focal plane arrays currently in production provide excellent performance for soldier thermal weapon sights (TWS), vehicle driver vision enhancers (DVE), and aerial surveillance and industrial thermograph applications. To further improve sensor resolution and reduce the sensor system size, weight and cost, it is highly desired to reduce the UFPA pixel size. However, the 17μm pixel FPA presents significant design and fabrication challenges as compared with 25μm pixel FPAs. The design objectives, engineering trade-offs, and performance goals will be discussed. This paper presents an overview of the 17μm microblometer uncooled focal plane arrays and sensor electronics production and development activities at DRS. The 17 μm pixel performance data from several initial fabrication lots will be summarized. Relevant 25μm pixel performance data are provided for comparison. Thermal images and video from the 17μm pixel 640x480 UFPA will also be presented.

Electron injection avalanche photodiodes in short-wave infrared (SWIR) to long-wave infrared (LWIR) HgCdTe show gain and excess noise properties indicative of a single ionizing carrier gain process. The result is an electron avalanche photodiode (EAPD) with “ideal” APD characteristics including near noiseless gain. This paper reports results obtained on long-, mid-, and short-wave cutoff infrared Hg1−xCdxTe EAPDs (10 µm, 5 µm, and 2.2 µm) that use a cylindrical “p-around-n” front side illuminated n+/n-/p geometry that favors electron injection into the gain region. These devices are characterized by a uniform, exponential, gain voltage characteristic that is consistent with a hole-to-electron ionization coefficient ratio, k=αh/αe, of zero. Gains of greater than 1,000 have been measured in MWIR EAPDS without any sign of avalanche breakdown. Excess noise measurements on midwave infrared (MWIR) and SWIR EAPDs show a gain independent excess noise factor at high gains that has a limiting value less than 2. At 77 K, 4.3-µm cutoff devices show excess noise factors of close to unity out to gains of 1,000. A noise equivalent input of 7.5 photons at a 10-ns pulsed signal gain of 964 measured on an MWIR APD at 77 K provides an indication of the capability of this new device. The excess noise factor at room temperature on SWIR EAPDs, while still consistent with the k=0 operation, approaches a gain independent limiting value of just under 2 because of electron-phonon interactions expected at room temperature. The k=0 operation is explained by the band structure of the HgCdTe. Monte Carlo modeling based on the band structure and scattering models for HgCdTe predict the measured gain and excess noise behavior.

1/f noise in HgCdTe photodiodes has been attributed to a variety of sources, most of which are associated with some form of excess current. At DRS, we have measured the 1/f noise in vertically integrated (VIP) and high-density vertically integrated photodiodes (HDVIP), over a wide range of compositions and temperature, for strictly well-behaved diffusion current limited operation. It is found that (1) the 1/f noise current is directly dependent on dark current density; (2) material composition and temperature are irrelevant, except in as much as they determine the magnitude of the current density; (3) in high-quality diodes, the 1/f noise is independent of background flux; and (4) surface passivation is relevant. These observations have been compared to the 1/f noise theory of Schiebel, which uses McWhorter’s fluctuation of the surface charge tunneling model to modulate diode diffusion current. Agreement is obtained with Schiebel’s theory for realistic surface trap densities in the 10 12 /cm 2 range, which will obviously be characteristic of the passivation used. The relevance of this work relative to high operating temperature phtodiodes is discussed.

Optical beam induced current (OBIC) imaging has been used to measure the diffusion length of HgCdTe avalanche photodiodes (APDs) having a cylindrical structure. We show that the effective diffusion length extracted from current profiles is dependent on the electrode size and shape and the distance between electrode and excitation spot. To obtain the bulk diffusion length, a two-dimensional diffusion model was developed. The simulations provide good fits to experiment and indicate a bulk diffusion length of 70μm at room temperature.

Arsenic is known to be an amphoteric impurity that may occupy either sublattice in HgCdTe depending upon sample annealing. As an acceptor in low concentrations, it offers several features that are attractive for the fabrication of certain n + -on-p detector diode structures. The epitaxial growth of arsenic-doped HgCdTe from a Te-rich melt can fulfill the requirements for application in a variety of devices where low vacancy concentrations and low defect densities are critical requirements in minimizing dark currents. These devices may include the high operating temperature (HOT) detectors operated in a strong nonequilibrium and reverse bias mode to suppress the Auger-generated dark currents. For the materials’ growth process to be effective, the segregation coefficient determining the incorporation of arsenic from the Te-rich melt needs to be established. This coefficient was measured during these investigations and was observed to vary with arsenic concentration. Within the range of interest, this parameter varied between 8×10 −6 and 1×10 −4 . These extremely small values limit the doping that can be achieved to <5×10 16 cm −3 in the grown epifilm. Furthermore, the large addition of arsenic to the melt, necessitated by the extremely small segregation coefficients, leads to a condition where the concentration of arsenic in the liquid-phase epitaxy (LPE) nutrient melt exceeds that of cadmium. The melt chemistry, phase diagram, and epigrowth process fundamentally change as a result. This new epigrowth process was developed and tuned during these investigations. For acceptor levels at 1×10 15 cm −3 and lower, the growth of arsenic-doped HgCdTe from a Te-rich LPE melt has been determined to be an extremely reproducible, powerful, and controllable technique.

Monte Carlo simulations of Hg0.7Cd0.3Te avalanche photodiodes are presented. The simulated very low excess noise and exponential gain curve are consistent with those that have been experimentally observed and are consistent with the speculated large ratio of electron and hole impact ionization rates. The simulations suggest that there is a large difference between the scattering rates of electrons and holes, a direct consequence of the band structure. A resonance behavior in the excess noise factor at gain values near 2, 4, 8, and 16 is also revealed in the simulations. This effect is explained by comparing to the gain and noise of a photomultiplier tube.

Arsenic is an amphoteric impurity in Hg1−xCdxTe. Under tellurium-rich conditions, it tends to occupy metal-sublattice sites and act as a donor; while under mercury-rich conditions, it tends to occupy the tellurium sublattice and act as an acceptor. In this process, mercury from the ambient, first, displaces an arsenic atom (donor) occupying a metal-sublattice site. This arsenic atom, in turn, displaces a tellurium atom, taking residence on the tellurium sublattice (acceptor). A second mercury atom combines with this excess tellurium atom at a surface or other crystalline discontinuity. A quantitative knowledge of the equilibrium reaction is important both to understand point defects and doping in HgCdTe. An investigation of this equilibrium under selected mercury pressures spanning the entire range from the tellurium-saturated phase limit to the mercury-saturated phase limit reveals that a majority of the arsenic remains on the sites in the tellurium sublattice even under tellurium-saturated conditions for arsenic concentrations less than 2×1016 cm−3. With increasing mercury pressure, the relative population of the arsenic atoms on sites in the tellurium sublattice monotonically increases, reaching 100% for the mercury-saturated limit.

This paper reports results obtained on mid-wave IR x equals 0.3 Hg1-xCdxTe avalanche photodiodes (APDs) that utilize a cylindrical 'p-around-n' front side illuminated n+/n-/p geometry. This 'p-around-n' geometry favors electron avalanche gain. These devices are characterized by a uniform, exponential, gain voltage characteristic that is consistent with a hole to electron ionization ratio, k equals (alpha) h/(alpha) e, of zero. At 6 bias and 77 K, gains are typically near 50, and gains of over 100 have been measured at higher biases. Response times have been modeled and measured on these devices. The modeling indicates that the geometry and dimensions of the diode control the diffusion limited device bandwidth. Rise times of less than 0.35 nsec should be possible according to this analysis. TO dat 10 percent to 90 percent rise times as low as 1 nsec have been measured. The gain is approximately noiseless up to gains of over fifty which is consistent with insignificant hole ionization. The noiseless gain behavior reported here is inconsistent with the original theory of McIntyre that predicts an excess noise factor of 2 for the k equals 0 case. The explanation for these results will require application of the modified 'history dependent' theory for excess noise later proposed by McIntyre.

Piezoelectric effect in long-wavelength infrared (LWIR) HgCdTe has been studied using metal-insulator-semiconductor (MIS) and p-n homojunction devices. A cantilever beam technique was used to measure the shift in flatband voltage in the MIS devices as a function of applied strain, from which piezoelectric constant was derived. This is the first time such a value has been reported in the literature. Subsequent calculation showed that the thermal stress from cryogenic cool (from 300 to 77K) of hybridized infrared devices fabricated on (111) HgCdTe surfaces induced a piezoelectric field of∼1840 V/cm. This field is present in the space charge regions in the semiconductor where there is no free carrier. It reinforces the built-field in an n-on-p diode fabricated on the (111)A HgCdTe surface. Thus, the diode is more prone to the thermal stress than one fabricated on the (lll)B surface. Electrical measurement of reverse-bias dark currents in HgCdTe photodiodes under applied compressive and tensile stress confirmed the existence of a strain-induced field in the junction.

Thin CdTe films were deposited by hot-wall epitaxy (HWE) on (111) HgCdTe and CdZnTe substrates at temperatures from about 140 to 335°C. X-ray rocking curves were used to show that crystal quality of the CdTe (111)B films improved as substrate temperature increased from 140 to about 250°C. Rocking curve values for full width at half maximum (FWHM) decreased from 2–4 degrees at 140–150°C to less than 100 arc-s at 250°C, and a FWHM of 59 arc-s was the lowest value observed near 250°C. The FWHM of the HWE CdTe was found to be insensitive to growth rate below about 400Å/min, but increased to four degrees at 1250Å/min. X-ray diffraction confirmed that films grown on the B-face at higher temperatures were epitaxial, but contained a significant volume fraction, 35% to 50%, of rotational in-plane twins. Electron microscopy confirmed a coarse twin density, and photoluminescence spectra showed an absence of excitonic emission in the HWE films. Simultaneous growth on two (111) HgCdTe substrates with different surface polarities between 230°C and 335°C showed that deposition rate on the A-face decreased relative to that on the B-face as temperature increased. Films grown on the B-face exhibited better surface morphologies than those grown on the A-face.

The device characteristics and circuit performance of self-aligned GaAs E/D-MESFETs have been compared. The fabrication process for both devices is discussed. Electrical measurements across a 2-in wafer showed that an average self-aligned 40- mu m-wide, 1- mu m-long enhancement device has transconductance of 275+or-17 mS/mm, an intrinsic K-value of 16.3+or-2.7 mS/V, a series resistance of 0.88+or-0.1 Omega -mm, and a threshold deviation of 28 mV. Corresponding data for the non-self-aligned devices were 191+or-19 mS/mm, 10.3+or-1.4 mS/V, 1.2+or-0.2 Omega -mm, and 45 mV, respectively. An ECL-compatible 1-kb static RAM and a 4-kb static RAM were fabricated using both self-aligned and non-self-aligned processes for comparison. Using the self-aligned process, the power consumption of the 1-kb SRAM was 230 mW, compared to 530 mW for the non-self-aligned SRAM, while access times remained the same. Typical access times for self-aligned 4-b SRAM devices ranged from a minimum of 2.8 ns to a maximum of 3.8 ns. This 1-ns range is considerably less than that of a typical non-self-aligned device with 2.5 ns of access time scatter. >

The device characteristics and circuit performance of a self-aligned and a non-self-aligned GaAs E/D-MESFETs have been compared. The fabrication process for the self-aligned MESFETs was similar to the SAINT process [1], with modifications made to enhance yield and to facilitate double-level-metal interconnection. The non-self-aligned MESFETs were fabricated with the conventional recessed-gate process. Electrical measurements across a 2-inch wafer showed that an average self-aligned, 40-µm-wide, 1-μm-long enhancement device has a transconductance of 275 ± 17 mS/mm, a K-value of 16.3 ± 2.7 mS/V, a series resistance of 0.88 ± 0.1 ohm-mm, and a threshold deviation of 28 mV. Corresponding data for the non- self-aligned devices were 191 ± 19 mS/mm, 10.3 ± 1.4 mS/V, 1.2 ± 0.2 ohm-mm, and 45 mV, respectively. A low-power-design ECL-compatible 1-kbit static RAM was fabricated. By using the self-aligned process and a higher depletion threshold, power of the SRAM was reduced from 530 mW for the non-self-aligned SRAM to 220 mW while access times remained the same.

Hg1-xCdxTe liquid phase epitaxial (LPE) layers were grown from well-stirred large (100 g) Te-rich Hg-Cd-Te solutions by the dipping method. Supercooling below the liquidus temperature in Te-rich solutions was studied by differential thermal analysis (DTA) and film growth results. Although supercooling of 20 to more than 100° C was routinely measured in small (2 g) sample melts, supercooling in larger melts (>100 g) was erratic and smaller. Factors affecting the degree of supercooling were identified and a Hg-reflux was found to be a major cause of erratic melt behavior. The LPE reactor was modified to correct the Hg-reflux action and a visual technique was developed for in situ determination of the liquidus temperature. A limited amount of supercooling was found in the melt after reactor modification but it was difficult to maintain for extended durations before spontaneous nucleation occurred. Consequently, programmed cooling rather than isothermal LPE was employed to grow many of the films reported here. Hg1−xCdxTe epitaxial layers ofx = 0.2 to 0.25 were grown on (111)B oriented CdTe substrates by cooling the melts only 1–2° C below the previously measured crystallization temperature. The small amount of cooling minimized composition variation with film thickness. Excellent surface morphology was obtained when slow cooling rates of 0.02–0.05° C/ min were used. Cooling rates greater than 0.2° C/min created rough, pitted surface. Precise substrate orientation was important in reducing surface terracing. Composition and thickness uniformities of the epitaxial films were excellent as a result of substrate rotation. Run-to-run reproducibility of film composition was ±0.01 inx. Hall measurements showed carrier concentrations in the range 2–20 × 1014 cm−3 with photoconductive lifetimes of 0.5–3.0 dms forx = 0.20 to 0.25.