In this article, the threshold voltage ( Vth) characteristic of beta -Gallium Oxide ( beta -Ga2O3) based enhancement mode (E-mode) heterojunction gate field effect transistor (FET) is investigated. A self-aligned gate Ga2O3/NiO x heterojunction FET (SHJ-FET) and a conventional gate Ga2O3/NiOx heterojunction FET (CHJ-FET) are fabricated to research the variation of threshold voltage with the length of NiOx . It is found that the Vth of SHJ-FET and CHJ-FET are about 0.6 and 2.4 V, respectively. Moreover, the power figure of merit (PFOM) values of SHJ-FET and CHJ-FET are 0.37 and 0.35 GW/cm(2), respectively. Due to the larger L-NiOx/L-G ratio, the Vth of CHJ-FET is more positive. Then, a physical threshold voltage model of beta -Ga2O3-based heterojunction gate FETs is built, and the Vth is extracted by varying the geometries of the heterojunction gate. Finally, the correctness of the physical model is verified by fitting the threshold voltage of the actual device with the simulation results. Furthermore, the physics mechanism of the influence of the L-NiOx/L-G , as well as the position of NiOx on the off-state electric field distribution of the device, has also been studied.

This letter reports the fabrication and characterization of beta-Ga2O3 metal/ferroelectric/insulator/semiconductor (MFIS) capacitors employing 3 types of HfO2-ZrO2 superlattice (SL) ferroelectric gate dielectrics: SL5, SL10, and SL15, constructed by alternating 5,10, and 15 ALD cycles of HfO2 and ZrO2, respectively, with conventional Hf0.5Zr0.5O2 (HZO) as a reference. Following rapid thermal annealing (RTA) at 550 degrees C for 30 s, all dielectrics are confirmed to exhibit the orthorhombic (111) phase by grazing-incidence x-ray diffraction (GIXRD). Electrical measurements reveal that the SL5 structure achieves an outstanding reduction in leakage current, decreasing from 0.936 A cm(-2) (HZO) to 0.004 A cm(-2) at 3 V, and exhibits the highest remanent polarization (2P(r) = 29.3 mu C cm(-2)), compared to 27.3 mu C cm(-2) (HZO), 22.4 mu C cm(-2) (SL10), and 17 mu C cm(-2) (SL15). Moreover, the SL5 capacitor demonstrates excellent reliability, maintaining robust endurance up to 1 x 10(11) cycles at room temperature and 1 x 10(10) cycles at 150 degrees C without degradation and stable retention over 1 x 10(4) s. Importantly, interface state analysis reveals that after annealing, SL5 maintains the lowest and most stable interface trap density within the energy range of 0.25-0.45 eV. The trap state density (6.39 x 10(12)-7.11 x 10(12) cm(-2) eV(-1)) is significantly lower than that of HZO in the same energy range. These results highlight the advantages of superlattice-engineered ferroelectric gate dielectrics for achieving high-quality interfaces, low leakage current, and stable ferroelectric performance, providing a promising route toward high-performance, enhancement-mode beta-Ga2O3 MOSFET devices for next-generation power electronics.

This paper studied the low-resistance ohmic contacts on InAlN/GaN with metal--organic chemical vapor deposition (MOCVD) regrowth technique. The 150-nm regrown n+-InGaN exhibits a low sheet resistance of 31 Ω/□, resulting in an extremely low contact resistance of 0.102 Ω⋅mm between n+-InGaN and InAlN/GaN channels. Mask-free regrowth process was also used to significantly improve the sheet resistance of InAlN/GaN with MOCVD regrown ohmic contacts. Then, the diffusion mechanism between n+-InGaN and InAlN during regrowth process was investigated with electrical and structural characterizations, which could benefit the further process optimization.

Negative gate voltage bias step-stress experiments were implemented to research the degradation mechanisms in AlGaN/GaN HEMTs. Although the stress gate current increases sharply above a "critical voltage" for the devices with large gate-to-source distance, no such voltage could be found when the gate-to-source distance is small. It is postulated that surface leakage current becomes prominent when the gate and source of the device come near, thus the degradation of gate leakage caused by the inverse piezoelectric effect is shield.

In this paper, we report excellent power and radio frequency (RF) performances of GaN HEMTs grown on free-standing GaN substrate using a unified Fe/C co-doped GaN buffer. With gate-drain distance ($L_{\mathrm{gd}}$) of 6.35 $\mu$m, the device presented a low specific on-resistance ($R_{\mathrm{on}_{-}\mathrm{sp}}$) of 0.66 m$\Omega\cdot\mathrm{cm}^{2}$ and a high breakdown voltage ($V_{\mathrm{BR}}$) of 710 V. Record Johnson’s figure-of-merit (JFOM) of 16.25 THz$\cdot$V and $f_{\max}$. VBR of 38.34 THz$\cdot$V were achieved among GaN HEMTs. Load-pull measurements reveal a state-of-the-art power density of 10.2 W/mm for GaN-on-GaN HEMTs. Moreover, the GaN-on-GaN HEMTs in this work show excellent reliability and stable Schottky characteristics after the reverse gate step stress. This technology provides a unified design of material and process for GaN power and RF devices with high performance, promoting the integration of GaN-based devices on the same platform.

A large gate metal height technique is proposed to enhance breakdown voltage in GaN channel and AlGaN channelhigh-electron-mobility-transistors (HEMTs). For GaN channel HEMTs with gate–drain spacing LGD=2.5 μm, the break-down voltage VBR increases from 518 V to 582 V by increasing gate metal height h from 0.2 μm to 0.4 μm. For GaN channel HEMTs with LGD =7 μm, VBR increases from 953 V to 1310 V by increasing h from 0.8 μm to 1.6 μm. The breakdown voltage enhancement results from the increase of the gate sidewall capacitance and depletion region extension. For Al0.4Ga0.6N channel HEMT with LGD =7 μm, VBR increases from 1535 V to 1763 V by increasing h from 0.8 μmto 1.6 μm, resulting in a high average breakdown electric field of 2.51 MV/cm. Simulation and analysis indicate that the high gate metal height is an effective method to enhance breakdown voltage in GaN-based HEMTs, and this method can be utilized in all the lateral semiconductor devices.

In this paper, the interface states of the AlGaN/GaN metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs) with an Al2O3 gate dielectric are systematically evaluated. By frequency-dependent capacitance and conductance measurements, trap density and time constant at Al2O3/AlGaN and AlGaN/GaN interface are determined. The experimental results reveal that the density of trap states and the activation energy at the Al2O3/AlGaN interface are much higher than at the AlGaN/GaN interface. The photo-assisted capacitance-voltage measurements are performed to characterize the deep-level traps located near mid-gap at the Al2O3/AlGaN interface, which indicates that a density of deep-level traps is lower than the density of the shallow-level states.

Flash-like Al2O3/AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) were fabricated using a charge trapping technique. These MISHEMTs showed a large threshold voltage (V-th) shift of 9.35 V after applying a 10-V program voltage (V-P), resulting in a normally-off device with a high V-th of 2.6 V and a high maximum drain current (I-dmax) of 0.9 A/mm. The Vth dependence on V-P was analyzed and V-th was above 0 V for V-P = 8 V. Photo-assisted C-V measurements revealed that the traps contributing to the large V-th shift had a density of 2.18 x 10(13) cm(-2) and the activation energy for the photo-assisted de-trapping process ranged from 2.67 to 3.06 eV. These traps were attributed to border or oxide defects. The retention level of the device was up to 102 s after applying 10-V V-P. These results indicate that the charge trapping method with a single Al2O3 dielectric is a promising way to achieve normally-off devices with both high Vth and high I-dmax.

In this paper, the interface and bulk charges in AlGaN/GaN metal–insulator–semiconductor (MIS) heterostructures with AlN, Al 2 O 3 , and Al 2 O 3 /AlN laminated dielectrics were studied. In situ plasma pretreatment resulted negligible interface trap states and voltage hysteresis. The fixed charge density at Al 2 O 3 /AlN (or Al 2 O 3 /barrier) interface was estimated to be 1.66 × 10 13 cm −2 by using flat-band voltage shift, and the oxide bulk charge concentration was 2.86 × 10 17 cm −3 . The interface charge density at other interfaces were at the order of 10 11 cm −2 . Simulation results using the above charge density/concentration indicated that Al 2 O 3 /AlN interface fixed charges dominated the dielectric-related voltage shift in AlGaN/GaN MIS heterostructures, which caused a large voltage shift of −3 V with 10 nm Al 2 O 3 thickness, while the flat-band voltage variety resulting from other types of charges was within 0.1 V.

The effects of gate length LG on breakdown voltage VBR are investigated in AlGaN/GaN high-electron-mobility transistors (HEMTs) with LG = 1 μm∼ 20 μm. With the increase of LG, VBR is first increased, and then saturated at LG = 3 μm. For the HEMT with LG = 1 μm, breakdown voltage VBR is 117 V, and it can be enhanced to 148 V for the HEMT with LG = 3 μm. The gate length of 3 μm can alleviate the buffer-leakage-induced impact ionization compared with the gate length of 1 μm, and the suppression of the impact ionization is the reason for improving the breakdown voltage. A similar suppression of the impact ionization exists in the HEMTs with LG > 3 μm. As a result, there is no obvious difference in breakdown voltage among the HEMTs with LG = 3 μm∼20 μm, and their breakdown voltages are in a range of 140 V–156 V.

Deep level transient spectroscopy（DLTS） as a method to investigate deep traps in AlGaN/GaN heterostructure or high electron mobility transistors（HEMTs） has been widely utilized.The DLTS measurements under different bias conditions are carried out in this paper.Two hole-like traps with active energies of E v + 0.47 eV,and E v + 0.10 eV are observed,which are related to surface states.The electron traps with active energies of E c -0.56 eV are located in the channel,those with E c -0.33 eV and E c -0.88 eV are located in the AlGaN layer.The presence of surface states has a strong influence on the detection of electron traps,especially when the electron traps are low in density.The DLTS signal peak height of the electron trap is reduced and even disappears due to the presence of plentiful surface state.

The degradation mechanism of enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs) fabricated by fluorine plasma ion implantation technology is one major concern of HEMT's reliability. It is observed that the threshold voltage shows a significant negative shift during the typical long-term on-state gate overdrive stress. The degradation does not originate from the presence of as-grown traps in the AlGaN barrier layer or the generated traps during fluorine ion implantation process. By comparing the relationships between the shift of threshold voltage and the cumulative injected electrons under different stress conditions, a good agreement is observed. It provides direct experimental evidence to support the impact ionization physical model, in which the degradation of E-mode HEMTs under gate overdrive stress can be explained by the ionization of fluorine ions in the AlGaN barrier layer by electrons injected from 2DEG channel. Furthermore, our results show that there are few new traps generated in the AlGaN barrier layer during the gate overdrive stress, and the ionized fluorine ions cannot recapture the electrons.

The parameters of open-gate structures treated with different etching time were monitored during the gate recess process, and their impacts on the threshold voltage (Vth) of final fabricated AlGaN/GaN high electron mobility transistors (HEMTs) based on open-gate structures were discussed in this paper. It is found that Vth can exceed 0 V when channel resistance in the recessed region (Ron-open) increases over ∼275 Ω mm, maximum current (IDmax) decreases below ∼29 mA/mm, or recessed barrier thickness (tRB) is below ∼7.5 nm. In addition, tRB obtained by atomic force microscopy measurements and C-V measurements are also compared. Finally, theoretical common criteria based on the experimental results of this work for tRB and Ron-open were established to evaluate the Vth of a regular normally-off AlGaN/GaN HEMTs. The results indicate that these parameters of open-gate structure can be utilized to achieve normally-off HEMTs with controllable Vth.

By comparing the Schottky diodes of different area and perimeter, reverse gate leakage current of AlGaN/GaN high mobility transistors (HEMT) at gate bias beyond threshold voltage is studied. It is revealed that reverse current consists of area-related and perimeter-related current. An analytical model of electric field calculation is proposed to obtain the average electric field around the gate edge at high revers bias and estimate the effective range of edge leakage current. When the reverse bias increases, the increment of electric field is around the gate edge of a distance of ΔL, and perimeter-related gate edge current keeps increasing. By using the calculated electric field and the temperature-dependent current-voltage measurements, the edge gate leakage current mechanism is found to be Fowler-Nordheim tunneling at gate bias bellows -15V caused by the lateral extended depletion region induced barrier thinning. Effective range of edge current of Schottky diodes is about hundred to several hundred nano-meters, and is different in different shapes of Schottky diodes.

In this paper, the off-state breakdown characteristics of two different AlGaN/GaN high electron mobility transistors (HEMTs), featuring a 50-nm and a 150-nm GaN thick channel layer, respectively, are compared. The HEMT with a thick channel exhibits a little larger pinch-off drain current but significantly enhanced off-state breakdown voltage (BVoff). Device simulation indicates that thickening the channel increases the drain-induced barrier lowering (DIBL) but reduces the lateral electric field in the channel and buffer underneath the gate. The increase of BVoff in the thick channel device is due to the reduction of the electric field. These results demonstrate that it is necessary to select an appropriate channel thickness to balance DIBL and BVoff in AlGaN/GaN HEMTs.

In this paper, we demonstrated AlGaN/GaN metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs) with AlN gate dielectric grown by plasmaenhanced atomic layer deposition (PEALD). The high-quality interface of AlN/AlGaN/GaN MIS-HEMTs resulted in a very small threshold voltage (Vth) hysteresis and dispersion. Simultaneously, the MIS-HEMTs exhibited a high-peak transconductance of 289 mS/mm and a small Vth shift of 0.8 V, while those for Al 2 O 3 /AlGaN/GaN metal-oxide-semiconductor HEMTs were 203 mS/mm and 5.2 V, respectively. Furthermore, analysis indicated that PEALD-grown AlN significantly reduced the interface charges at dielectric/III-N interface (from 1.2 × 10 13 to 8 × 10 12 cm -2 eV -1 for interface traps, and from 1.01 × 10 13 to 3.1 × 10 11 cm -2 for fixed charges) and improved channel transport properties (the full-width at half-maximum of channel transconductance increased from 0.9 to 2.7 V), compared with ALD-grown Al 2 O 3 , which could explain the differences of device characteristics.

This paper gives a detailed analysis of the time-dependent degradation of the threshold voltage in AlGaN/GaN high electron mobility transistors (HEMTs) submitted to off-state stress. The threshold voltage shows a positive shift in the early stress, then turns to a negative shift. The negative shift of the threshold voltage seems to have a long recovery time. A model related with the balance of electron trapping and detrapping induced by shallow donors and deep acceptors is proposed to explain this degradation mode.

The behavior of Schottky contacts in AlGaN/GaN high electron mobility transistors（HEMTs） is investigated by temperature-dependent current–voltage（T –I–V） measurements from 300 K to 473 K. The ideality factor and barrier height determined based on the thermionic emission（TE） theory are found to be strong functions of temperature, while present a great deviation from the theoretical value, which can be expounded by the barrier height inhomogeneities. In order to determine the forward current transport mechanisms, the experimental data are analyzed using numerical fitting method,considering the temperature-dependent series resistance. It is observed that the current flow at room temperature can be attributed to the tunneling mechanism, while thermionic emission current gains a growing proportion with an increase in temperature. Finally, the effective barrier height is derived based on the extracted thermionic emission component, and an evaluation of the density of dislocations is made from the I–V characteristics, giving a value of 1.49 × 107cm-2.

Forward gate-bias stress experiments are performed to investigate the variation of trap states under Schottky contact in GaN-based high electron mobility transistors. Traps with activation energy E-T ranging from 0.22 eV to 0.31 eV are detected at the gate-semiconductor interface by dynamic conductance technique. Trap density decreases prominently after stressing, particularly for traps with E-T>0.24 eV. X-ray photoelectron spectroscopy measurements reveal a weaker Ga-O peak on the stressed semiconductor surface. It is postulated that oxygen is stripped by Ni to form NiO upon electrical stress, contributing to the decrease in O-N donor sates under the gate contact. (C) 2014 AIP Publishing LLC.