As emerging nonvolatile memory, resistive random-access memory (RRAM) holds great promise as a cryogenic memory solution for quantum computing systems. Although device-level cryogenic performance has been previously investigated, the scalability of these observations to RRAM array remains unaddressed. In this work, we report for the first time the comprehensive electrical characterization of a 1024-device HfO2-based RRAM array from 300 K room temperature to 4 K Helium temperature. Forming voltages increase significantly, with mean value rising from 3.91 V at 300 K to 7.11 V at 4 K, while set and reset voltages exhibit minor increase with average set voltage from 1.30 V at 300 K to 1.46 V at 4 K and average reset voltage from 1.75 V at 300 K to 1.86 V at 4 K. Endurance test demonstrates robust performance over 1 M cycle without degradation at 300, 77, and 4 K, respectively. Most notably, retention and relaxation characteristics are dramatically enhanced at 77 and 4 K. The devices also exhibited strong immunity against read disturb across the investigated temperatures. These findings establish HfO2-based RRAM array as high-performance cryogenic nonvolatile memory, and pave the way for practical integration of RRAM array in cryogenic quantum computing circuits.

The development of artificial synapses capable of emulating biological synaptic functions is crucial for advancing neuromorphic computing. Here, we present a solution-processed microcrystal indium gallium zinc oxide (m-IGZO)-based optoelectronic synaptic device that demonstrates remarkable capabilities in mimicking both short-term and long-term memory behaviors. By precisely tuning the molar ratios of In, Ga, and Zn in the m-IGZO composition, we achieve devices with distinct optoelectronic properties, enabling applications in visual perception and memory. The In-rich (In up arrow) devices exhibit superior synaptic plasticity, with controllable current modulation under ultraviolet (UV) light stimulation, while Ga-rich (Ga up arrow) devices show rapid response times, making them ideal for UV detection and communication. We further demonstrate the integration of these devices into a 3 x 3 array, successfully emulating human visual memory and perception. This work highlights the potential of solution-processed m-IGZO devices for low-cost, large-area neuromorphic computing and artificial visual systems.

We developed a physics-based compact model for ferroelectric/antiferroelectric (AFE) mixed-phase capacitors. The nucleation-limited switching (NLS) model is utilized to model polarization reversal dynamics for the ferroelectric phase, whereas the Pauli-Master equation, based on Kittel's two-sublattice theory, is utilized for the AFE phase. We derive the electrostatic field in the film, precisely accounting for various extrinsic factors such as the finite screening lengths of metallic electrodes, the presence of dielectric interlayers, and charge trapping at the interfaces and borders. Consequently, the reliability model is constructed within a unified formalism by incorporating trapped charges, dielectric interlayers, and the decomposition process of ferroelectric phase nuclei. Therefore, this model illustrates essential characteristics of ferroelectric/AFE mixed-phase capacitors, encompassing the wake-up effect, accumulation effect, temperature dependence of polarization reversal, geometry dimension scalability, variability between devices, and reliability characteristics such as the fatigue effect, imprint effect, and degradation of retention properties. Furthermore, by using experimental data acquired from capacitors composed of HZO with a thickness of 8 nm, we validate the model, which exhibits a good fit with the experimental results. As a result, this model enables the efficient implementation of circuit simulations that incorporate ferroelectric nonvolatile memory.

Fully analogue neural computation requires hardware that can implement both linear and nonlinear transformations without digital assistance. While analogue in-memory computing efficiently realizes matrix-vector multiplication, the absence of learnable analogue nonlinearities remains a central bottleneck. Here we introduce KANalogue, a fully analogue realization of Kolmogorov-Arnold Networks (KANs) that instantiates univariate basis functions directly using negative-differential-resistance (NDR) devices. By mapping the intrinsic current-voltage characteristics of NDR devices to learnable coordinate-wise nonlinear functions, KANalogue embeds function approximation into device physics while preserving a fully analogue signal path. Using cold-metal tunnel diodes as a representative platform, we construct diverse nonlinear bases and combine them through crossbar-based analogue summation. Experiments on MNIST, FashionMNIST, and CIFAR-10 demonstrate that KANalogue achieves competitive accuracy with substantially fewer parameters and higher crossbar node efficiency than analogue MLPs, while approaching the performance of digital KANs under strict hardware constraints. The framework is not limited to a specific device technology and naturally generalizes to a broad class of NDR devices. These results establish a device-grounded route toward scalable, energy-efficient, fully analogue neural networks.

The relaxation effect in analog resistive random access memory (RRAM) poses a significant challenge in the implementation of neuromorphic systems, as it leads to a loss of accuracy in computing. However, due to the inherent interdependence of various fluctuations and underlying mechanisms, the relaxation effect is still challenging. In this study, we have developed a high-quality adaptive relaxation signal analysis method by analyzing the read current during the relaxation process. This method enables the identification of all conductivity demarcation points in relaxation and categorizes them into different types of fluctuations. Importantly, we have investigated distinct fluctuations in relaxation and their corresponding mechanisms, which is a comprehensive analysis of fluctuations in the relaxation effect. We propose an optimization strategy based on our understanding of these mechanisms: increasing the pulsewidth. This strategy aims to mitigate relaxation effects and reduce the relative accuracy loss of convolutional neural networks (CNNs).

With the rich internal ion dynamics, memristor-based neuromorphic computing emerges as a non-von Neumann computing paradigm to mimic biological neural networks and achieve high energy efficiency. However, to implement large-scale memristive neural networks, the reliability issue of memristive devices, including artificial synapse, dendrite, and soma, should be properly addressed. In this paper, recent works investigating the physical mechanisms and optimizations of memristive device reliability are presented. In particular, the relaxation effect of $\boldsymbol{\text{HfO}_{\mathrm{x}}}$ -based artificial synapse is alleviated by using a ternary oxide as the thermal enhance layer, the device yield of $\boldsymbol{\text{TiO}_{\mathrm{x}^{-}}}$ based artificial dendrite is improved by proper material selection and interface engineering, and the device variability of $\boldsymbol{\text{NbO}_{\mathrm{x}}}$ -based artificial soma is reduced by nitrogen doping. Furthermore, a bio-inspired dendritic neural network with these three fundamental memristive devices is constructed and simulated to analyze the influence of device reliability. Using these optimized devices, the classification accuracy of the street-view house number dataset can be improved by up to $\sim$ 60%. The quantitative requirements of device reliability metrics are also provided as a guideline for future neuromorphic system design and implementation.

The thermal stability of analog resistive random access memory (RRAM) poses limitations on the accuracy of neuromorphic computing. In this work, we investigated the temperature-dependent conductance drift of $HfO_{x}$-based analog RRAM, which is characterized by the statistical distribution of the temperature coefficient. Additionally, we explore the impact of the programming process on the temperature coefficient. To evaluate the accuracy of MNIST tasks under different programming processes, a convolutional neural network based on the RRAM model is utilized.

Computing-in-memory (CIM) with analog resistive random access memory (RRAM) has recently shown great potential in building energy-efficient hardware for artificial intelligence (AI). However, the relaxation effect of analog RRAM featuring post-programming conductance drift has become a key performance-limiting factor. In this work, a comprehensive study of the relaxation effect is presented from the analysis of its causes to the strategy for device optimization as well as the impact on CIM applications. An application-oriented quantitative indicator (relative deviation [RD]) is proposed to fairly evaluate the relaxation effect of different devices. In particular, the influence of oxygen content in different thermal enhanced layers (TELs) on the relaxation and maximum conductance value ${G}_{max}$ of analog RRAM is studied. A theory of ternary oxide TEL is proposed to mitigate relaxation while maintaining low ${G}_{max}$ , which is experimentally validated by TaTiOx as TEL. Furthermore, neural network simulation is carried out to analyze the requirement for RRAM relaxation for CIM applications. This work provides a useful strategy for device optimization to suppress the relaxation effect by engineering the TEL.

Mott memristors have been considered as a promising candidate to implement artificial neurons for neuromorphic computing thanks to their low-power consumption and superior scalability. However, the large variability and poor reliability hinder their large-scale applications. The complex working mechanism associated with the thermoelectric coupling in the correlated oxides such as niobium oxide (NbOx) has led to the lack of a physics-based model to guide device optimizations. In this work, we present a microscopic model of NbOx-based Mott memristor and investigate the evolution of atomic configuration via a real-time scale kinetic Monte-Carlo simulation involving multiple physical processes. We elucidate the relationship between the I-V characteristics and the oxygen stoichiometry. We further reveal that the low-yield issue originates from the oxidation of NbO2 phase in air and the poor reliability correlates with the migration of oxygen vacancies. We hence propose to improve the device performance by introducing a Si3N4 passivation layer and N doping. The optimized devices exhibit excellent endurance of more than 108 cycles with significantly reduced variability and low operation voltage. Both oscillation neuron and leaky integrate and fire (LIF) neuron are experimentally implemented using the optimized Mott device, which could serve as a highly reliable artificial neuron with low variability and excellent endurance for large-scale neuromorphic computing systems.

Calculation of chip-scale temperature distribution with considering the device behaviors and integration structure is a challenging modeling task. In this paper, we demonstrated the first multi-scale thermal simulation for RRAM-based computing-in-memory chips. To achieve this, we developed a thermal modeling framework, from RRAM device to two level of circuits, 3D integration architecture, and chip package. We assess the temperature distributions under different technology nodes, different cooling methods, and different operation conditions. Furthermore, with the embedded compact model of RRAM, the thermal effects on the computing accuracy of deep neural network computing is evaluated. Some useful design guidelines are provided based on the simulation results.

A physically unclonable function (PUF) is a creditable and lightweight solution to the mistrust in billions of Internet of Things devices. Because of this remarkable importance, PUF need to be immune to multifarious attack means. Making the PUF concealable is considered an effective countermeasure but it is not feasible for existing PUF designs. The bottleneck is finding a reproducible randomness source that supports repeatable concealment and accurate recovery of the PUF data. In this work, we experimentally demonstrate a concealable PUF at the chip level with an integrated memristor array and peripherals. The correlated filamentary switching characteristic of the hafnium oxide (HfOx)-based memristor is used to achieve PUF concealment/recovery with SET/RESET operations efficiently. PUF recovery with a zero-bit error rate and remarkable attack resistance are achieved simultaneously with negligible circuit overhead. This concealable PUF provides a promising opportunity to build memristive hardware systems with effective security in the near future.

A real-time-scale 3D Kinetic Monte Carlo (KMC) simulation method is developed for hafnium oxide (HfOx) based RRAM in 1T1R cell. The introduction of the series transistor enables the description of voltage division behavior in realistic RRAM operation. The simulation can well reflect the forming, set and reset process, which can be helpful for future optimization of RRAM for storage and computing applications.

This work comprehensively investigates the influence of gate metal work function and its grain size variations as well as channel shape on the electrical characteristics of junctionless field-effect transistors (FETs) through 3D TCAD simulations. It is found that, for a certain gate length, the smaller the gate metal grain size, the more compact the distribution of the threshold voltage. Two different channel shapes concerning ellipse and cuboid are further analyzed.

For computing-in-memory applications implemented by ferroelectric tunnel junction (FTJ), a multi-pulse FTJ switching model is required. Here, based on the single-pulse nucleation-limited switching (NLS) model, a multi-pulse model capable of calculating the change of ferroelectric polarization under a series of arbitrary waveform pulses at different frequencies is proposed, which shows good agreement with literature-reported experimental results. In addition, the multi-pulse model was adopted in the simulation of an FTJ-based neural network, where it was found that the programming scheme with increasing pulse amplitude could achieve higher recognition accuracy and better FTJ conductance fluctuation tolerance than those with identical pulse or increasing pulse width. This work provides a useful model for further optimization and application of FTJ in neuromorphic computing.

Developing analog RRAM model for studying the effects of nonideal characteristic on neural network is necessary. In this work, we developed an analog RRAM compact model considering the nonideal characteristic of temperature coefficient, I-V nonlinearity, variability, and programing nonlinearity, which is well consistent with data measured from RRAM array. Then we evaluated the accuracy of MNIST task using RRAM model based multilayer perceptron. Especially, the effects of temperature coefficient on the computing task is studied.

A physics-based compact model of reliability degradation in analog resistive random access memory (RRAM) is developed. The model captures the stochastic degradation behaviors of retention, bit yield, and endurance during analog resistive switching. The model is verified with statistical data measured from analog RRAM arrays. Based on this compact model, a device-to-system simulation framework for the computation-in-memory (CIM) system is developed. This simulation framework is a silicon-verified versatile simulator that supports both inference and training, and fully considers the device nonideal effects and circuit constraints. Based on the reliability evaluation results, optimization guidelines to suppress the impact of device reliability degradation are proposed. This work provides a useful device-system codesign tool for developing large-scale CIM systems with high performance.

Analog RRAM is considered as a promising emerging device for the future computation-in-memory system. However, the relaxation effect shows significant impact on system performance. It causes high accuracy loss for inference application. In this work, we have statistically studied the relaxation effect of analog RRAM. Based on the statistical measurement results, a compact model for relaxation is established. The simulation results can match experiment results well for different conductance levels at different relaxation time. Furthermore, a device-level to system-level simulation framework is proposed. The simulation framework supports both inference and on-chip training, and the compact relaxation model is embedded to the framework to benchmark the CIM system. Finally, a suppression method is further provided for relaxation effect from system level.

Memristor with topotactic phase transition demonstrates controllable analog switching and implements neural network pruning.

为了抑制选通-阻变（1S1R）交叉结构阵列在写操作过程中存在的选通器耐受性退化,对施加不同脉冲幅值和宽度的写入电压时HfO 2 /Ag纳米点阈值开关选通器件的耐受性退化情况进行了测试和分子动力学模拟。结果表明,随着写入电压幅值和脉冲宽度的增加,选通器耐受性下降。基于此结果,提出一种将选通器开启过程和阻变存储器写过程分开操作的1S1R阵列两步写入方法来降低写过程中选通器上的分压,抑制选通器耐受性的退化。仿真和测试结果表明,相较于一步写操作方法,采用两步写入方法后,选通器件耐受性提高了一个数量级。此外,采用两步写入方法后,阵列能耗可降低58%以上,有利于大规模阵列的应用。