Two-dimensional (2D) semiconductors have been widely explored for next-generation electronics, with rapid progress in both large-area synthesis and device integration. However, bridging these advances toward practical semiconductor processing requires batch-level uniformity and wafer-to-wafer reproducibility under a low thermal budget compatible with back-end-of-line (BEOL) integration, which remain insufficiently addressed. Here, we demonstrate a BEOL-compatible, batch-type synthesis of layered 2D-SnS2 at 350 °C and its scalable transistor integration. The sulfurization-based low-temperature conversion technique yields 2H-stacked multilayer SnS2 with a bandgap of ∼2.3 eV and a high work function of ∼5.9 eV. Wafer- and batch-level uniformity are systematically evaluated by Raman spectroscopy and atomic force microscopy (AFM), showing tightly distributed A1g peak positions and minimal thickness variation over 4-inch full wafers (400 measurement points) and across multiple wafers processed in the same run. Statistical analysis of 200 transistors fabricated across ten wafers reveals tightly distributed switching characteristics, with a batch-averaged on/off ratio of (2.95 ± 0.94) × 105, a threshold voltage of 5.22 ± 0.64 V, and an extrinsic field-effect mobility of 0.0367 ± 0.0045 cm2 V-1 s-1. This work provides a practical pathway toward BEOL-compatible low-thermal budget batch processing and transistor integration of 2D semiconductors.

Ferroelectric NAND (FeNAND) devices utilizing ferroelectric hafnia thin films have emerged as promising candidates for future V-NAND applications. Hybrid memories integrating conventional charge trap layers into FeNAND structures have been extensively explored for their enhanced electrical performance. However, crystallization issues in the ferroelectric layer remain a critical barrier, despite achieving sufficient memory windows. Here, we present a FeNAND hybrid memory incorporating a multifunctional 2D-WS2 layer to simultaneously improve performance and reliability. Positioned adjacent to the ferroelectric Hf1-xZrxO2 (HZO) layer, the 2D-WS2 layer facilitates high-quality crystallization of the HZO, thereby enhancing and stabilizing its ferroelectricity. In addition, it serves as an efficient charge trap layer, resulting in a substantially increased memory window and improved retention. The 2D-WS2 layer was deposited via atmospheric-pressure plasma-enhanced chemical vapor deposition and characterized through structural analysis. Polarization measurements revealed more than a 2-fold enhancement, and electrical characterization of FeNAND devices with an IGZO channel demonstrated a significantly enlarged memory window of 7.24 V. The hybrid memory also exhibited multilevel cell operation enabled by the combined modulation of polarization and trapped charge. Furthermore, it achieved outstanding endurance beyond 108 cycles and stable retention, surpassing the conventional reliability limits of FeNAND architectures. Uniformity improvements were verified through a phase distribution model and hybrid memory operation simulations. This work offers a practical pathway toward realizing viable HZO-based FeNAND technology for future V-NAND applications.

We report improved performance in tellurium (Te) homojunction field-effect transistor by combining metallic Te source and drain electrodes with a semiconducting Te channel deposited by RF sputtering. The electrical properties of the Te films were precisely controlled by varying the thickness. The structural and electrical properties of the homojunction-layered transistor were systematically investigated with respect to those of a reference device with Au/Cr electrodes. The Te homojunction device exhibited enhanced electrical performance, showing higher drive current, improved mu FE, reduced contact resistance, and higher electrical durability. Reduced energy barrier height and lowered band offset in the Te homojunction transistor led to the significant improvement in its contact properties, which is strongly supported by temperature variable I-V based Schottky barrier height extraction and Kelvin probe force microscopy based contact potential difference measurement. Teswitching devices with few interfacial defect states provide a promising strategy for strategically integrating electronic circuitry.

Memtransistors have recently attracted attention as promising synaptic devices owing to their precise conductance tunability and heterosynaptic functionality, which can enhance the energy efficiency and integration density of neuromorphic systems. However, previous memtransistors have had difficulty controlling the lateral resistive switching characteristics and reproducibility to achieve a high yield and electrical durability. In this study, highly stable chip-scale Te memtransistor switching based on Schottky barrier height modulation from field-induced oxygen vacancy migration in TeO2-x was demonstrated. The thickness of the radiofrequency (RF)-sputtered polycrystalline Te is a critical parameter in modulating the resistive behavior with gating tunability because the percentage of TeO2-x in the Te film can be precisely controlled by its thickness. The Te memtransistor device can emulate heterosynaptic plasticity through voltage stimuli to the drain and gate terminals. The statistical distribution of the synaptic plasticity indicated that 62 devices were functional across an 8 × 8 memtransistor array in a single chip, providing a high yield of >96.9%. Additionally, the device exhibited high linearity and low asymmetry during potentiation/depression endurance cycling over 10 000 pulses. Furthermore, high pattern-recognition accuracy (∼94.2%) for handwritten numbers in a simulation task validated this promising method for the synaptic components of neuromorphic circuits. This study contributes significantly to the design diversity and large-scale integration of neuromorphic systems.

Flexible near-infrared (NIR) photodetectors are promising for optical communication, imaging, and wearable sensing, yet simultaneously achieving high responsivity, low dark current, and mechanical robustness remains challenging. Here, we report a flexible n-type hydrogenated amorphous silicon/tellurium (n-a-Si:H/Te) heterojunction photodiode enabled by systematic control of the phosphine-to-silane dilution ratio and the introduction of a front-surface-field (FSF) layer. At the optimized phosphine dilution (P ratio = 25%), the n-a-Si:H film exhibits reduced defect density and improved structural ordering, forming an electronically coherent heterojunction with crystalline Te. The resulting device shows pronounced diode rectification and a strong photoresponse at 1050 nm, driven by efficient Te absorption and built-in-field-assisted carrier separation. Furthermore, inserting a 10-nm-thick heavily doped n-a-Si:H FSF layer between the transparent conductive oxide and the active layer enhances band bending and suppresses interfacial recombination, leading to 5.1- and 2.6-fold improvements in responsivity and detectivity, respectively. External quantum efficiency analysis confirms that the performance enhancement originates from electrical field modulation rather than optical effects. The FSF-engineered device exhibits broadband operation (400-1600 nm) and maintains over 90% of its initial responsivity after 4000 bending cycles, demonstrating a robust strategy for high-performance flexible NIR optoelectronics.

The sensitive and selective detection of ammonia (NH3) gas at sub-ppm level and room temperature has attracted significant attention due to its promising applications in environment monitoring and medical diagnosis. Furthermore, these applications require flexible and wearable functionalities for both potential and practical use. Here, we report an NH3 gas sensor based on a porous copper bromide (CuBr) film, converted from the twodimensional (2D) copper nanosheets (Cu NSs). The porous CuBr film as a sensing material is prepared by an all-solution and vacuum-free process at low temperature, enabling device fabrication on a plastic substrate. The optimized gas sensor, achieved by controlling the morphology and surface coverage of the porous CuBr film, exhibits a sensitive and selective NH3 gas response at sub-ppm levels and room temperature. The mechanical bending test over 1000 bending cycles at a bending radius (r) of 2 mm reveals the feasibility of flexible and wearable applications.

Resistive switching devices utilizing metal halide materials hold great promise for flexible resistive randomaccess memory (RRAM) due to their low fabrication costs and low processing temperatures. However, the commercialization of these materials is hindered by issues related to phase instability and stoichiometric complexity. In this study, we demonstrate a binary metal halide-based resistive switching memory using copper bromide (CuBr) as the active component and that showed remarkable stability and reliability. The Au/CuBr/Au memristor exhibited a stable on/off ratio of 5 x 10 1 during low-voltage operation between 1.4 V to -1.6 V, a significant achievement for data storage devices. Detailed analysis using X-ray photoemission spectroscopy (XPS) provided insights into the chemical states and electronic structures of the CuBr layer, revealing that the resistive switching mechanism is driven by the formation of a metallic copper ion-based conductive filament (CF). This CF formation explains the area-dependent resistances and temperature-dependent resistances and is further supported by impedance spectroscopy. The devices also displayed exceptional switching stability, maintaining data integrity for more than 300 days at room temperature under ambient conditions. The device also exhibited impressive endurance, withstanding more than 1.2 x 104 cycles, highlighting its potential for long-term operational stability. Additionally, the air stability of the CuBr memristors and their low-temperature solution processing make them suitable for practical memory applications. In conclusion, this research provides a robust solution to the challenges faced by halide perovskite-based memristors, offering a highly stable, ambientcondition-resistant, and low-cost memory device. The work lays the foundation for next-generation memory devices that are both durable and environmentally adaptable, contributing significantly to the advancement of memory storage technologies.

Ferroelectric synaptic transistors have gained significant attention for neuromorphic applications owing to their low power consumption and high‐speed modulation. However, charge trapping in ferroelectric films introduces nonlinearity, instability, and poor reproducibility during synaptic weight updates. A buried gate‐structured InGaZnO synaptic transistor with an Al 2 O 3 /HfO 2 dielectric stack is demonstrated in this study to achieve unprecedented conductance modulation by leveraging the frequency‐dependent coupling between ferroelectric polarization and charge trapping. The versatile conductance‐tuning capability of double switching modes enables even single‐polarity voltage‐driven potentiation and depression while simultaneously achieving highly linear conductance modulation. The diffusion of Al atoms into the HfO 2 layer promotes additional oxygen vacancies, which contribute to the emergence of deep‐level trap states. These defects also facilitate noncentrosymmetric crystal‐phase stabilization through spontaneous symmetry breaking, thereby inducing ferroelectricity, which is corroborated by density‐functional‐theory simulations and piezoelectric‐force‐microscopy measurements. By fully utilizing dual‐mode operation, the device achieves highly linear conductance updates with a minimum nonlinearity of 0.47 and enables potentiation and depression under a pulse‐train configuration with a single voltage polarity. The system attains a high pattern‐recognition accuracy of 97.03% for handwritten digit classification. This dual‐mode operation strategy provides a compelling pathway for simplifying the architecture of integrated neuromorphic circuits and enhancing their computational efficiency.

Hafnium-based (Hf0.5Zr0.5O2, HZO) ferroelectrics exhibit robust polarization switching even in ultrathin films and are compatible with atomic layer deposition (ALD), making them promising for two-terminal (2-T) non-volatile memory devices. However, their practical use remains limited by low ON/OFF ratios, high leakage currents, and poor endurance. Herein, A high-performance ferroelectric diode (FE-diode) based on a W/MoS2/HZO/TiN stack is demostrated, fabricated entirely below 400 °C for back-end-of-line (BEOL) compatibility. Two strategies are employed: 1) optimization of the HZO thickness and 2) insertion of a 2D MoS2 buffer layer at the top electrode/ferroelectric interface. Increasing the HZO thickness from 3 to 8 nm changed the dominant conduction mechanism from direct tunneling to Schottky emission, enabling polarization-driven barrier modulation. The MoS2 buffer, synthesized via low-temperature (<300  °C) atmospheric pressure plasma-enhanced CVD, minimized interfacial defects and improved device stability. As a result, the FE-diode exhibited a high current density of 50 A cm- 2 (read at 3 V), an electroresistance ratio exceeding 2  ×  106, endurance over 1010 cycles, and stable memory retention of 10 years at room temperature. A 1 K (32  ×  32) memory array is also demonstrated, confirming excellent scalability and the strong potential of this FE-diode design for next-generation integrated memory applications.

In this study, the first sub-60 mV dec-1 super-steep subthreshold swing (SS) of graphene/InGaZnO (IGZO) cold-source field-effect transistor (CSFET) arrays is demonstrated. The linear density of states of the Dirac-cone-type graphene suppresses the Boltzmann thermal tail near the graphene/IGZO interface which in turn causes super-exponentially decaying electron density with increasing energy, leading to an extremely low off current and SS value. In particular, by introducing an HfO2 high-k dielectric with a low body factor, the surface potential is effectively modulated, further reducing SS by ≈46.4 mV dec-1. Furthermore, highly uniform sub-60 mV dec-1 SS with a yield of ≈89.1% is achieved in the IGZO CSFET 8 × 8 array devices, with a record SS value of 23.66 mV dec-1 compared to previously reported oxide-semiconductor transistors. The proposed IGZO CSFET device is expected to drive significant advancements in high-speed and ultralow-power electronic circuits.

Dense video captioning involves detecting and describing events that represent a video story in untrimmed videos using sentences. This task holds great promise for various video analytics-related applications. However, the nondeterministic nature of dense video captioning poses challenges in generating realistic events and captions. Recently, with the advent of large-scale video datasets, pretraining approaches have emerged. Nevertheless, these methods still require strict supervision and often lack accurate localization or are tightly coupled with localization and captioning. To address these challenges, this paper introduces ADVC, a novel approach for dense video captioning that combines unsupervised pre-training and adversarial adaptation. ADVC learns from readily available unlabeled videos and text corpora at scale, thereby reducing the need for strict supervision. It achieves realistic outcomes by directly learning the distribution of human-annotated events and captions through adversarial adaptation. Adversarial adaptation allows for the decoupling of localization and captioning subtasks while effectively considering their interdependence. We evaluate the performance of ADVC using multiple benchmark datasets to showcase the efficacy of our unsupervised pre-training and adversarial adaptation approach.

Ammonia (NH3) is a fundamental chemical building block with toxicity and corrosiveness. The detection of small amount of NH3 is one of the most challenging issues for various applications. In this study, we demonstrate a flexible NH3 gas sensor based on copper bromide (CuBr) film, which is prepared by using low-temperature and vacuum-free processes. The device showed not only sensitive and selective NH3 gas sensing properties, but also good mechanical flexibility without significant degradation during the bending test, suggesting the potential as flexible and wearable applications.

In this study, we propose a high-performance and reliable ferroelectric capacitor based on HfxZr1-xO2 (HZO) integrated with an ultrathin multifunctional 2D-WS2 layer. The WS2 layer, positioned at the interface between the bottom electrode and HZO, serves a multiple function. First, the WS2 acts as a protective layer, effectively suppressing the formation of interfacial defects, such as oxygen vacancies and dead layers during the device fabrication process. Second, this layer functions as a seed layer, promoting the growth of vertically aligned HZO domain structures and enhancing the ferroelectric crystallinity of HZO. This approach addresses key limitations in conventional HZO, including interfacial instability, random domain distribution, and inconsistent switching behavior. Our experimental results reveal significant improvements in ferroelectric performance, achieving stable endurance exceeding 10(12) cycles while maintaining a high remanent polarization (2P(r) > 50 mu C/cm(2)). Additionally, long-term retention performance is expected to exceed ten years at 85 C-degrees. Furthermore, the integration of a WS2 interface layer demonstrates excellent device-to-device uniformity and consistency, even in nanoscale HZO device structures. This work provides new insights into the development of high-performance ferroelectric nonvolatile memory technology by highlighting the multiple advantages of the WS2 layer, which enhances interface stability and facilitates vertical domain alignment.

Reliable modulation of artificial synapse device is crucial for the implementation of neuromorphic computing systems. Herein, we first demonstrated the reliable Ge-based memcapacitor which is enabled by Al2O3/Ge interface engineering based on CF4 plasma treatment. Capacitance measurements show improved linearity and cycle-to-cycle variations in CF4 plasma-treated memcapacitor, proving reliable synaptic modulation. The improvement in the synaptic behavior of the CF4 plasma-treated memcapacitor is attributed to the reduction in Al2O3/Ge interface defect states by F-passivation on Ge surface. Low interface trap density, extracted using the high-low capacitance-voltage technique, and a relatively low contact potential difference, measured by Kelvin probe force microscopy, verify the reversible charge trapping and de-trapping via precisely controlled defect states within a narrow depletion region. This study highlights the potential of CF4 plasma treatment as a successful strategy for enhancing the reliability of memcapacitors, paving the way for advanced neuromorphic computing technologies.

Short wavelength infrared (SWIR, 1-2.5 μm) photodetection plays a critical role in various applications, including night vision, remote sensing and optical communication. Conventional SWIR photodetectors, such as InGaAs and HgCdTe-based devices, face several challenges related to high fabrication costs, heterogeneous integration limitations of silicon Read-Out Integrated Circuit and environmental concerns. This study propose a Te0.7Se0.3 alloy thin film-based dual-gate phototransistor with a high-performance and cost-effective alternative for SWIR photodetection with spectral range of 1300 nm. By employing Te-Se alloy thin film as an active channel material, the both SWIR absorption and low off current state of thin film transistor (TFT) were successfully achieved. Furthermore, the dual-gate TFT device architecture, featuring a top electrode of Indium Tin Oxide with excellent SWIR transmittance (~ 77%) enhances charge carrier separation via an intrinsic built-in field. The proposed device exhibits an excellent SWIR detection performance, demonstrating a responsivity of 559.3 A/W at 1300 nm wavelength range.

Near-Infrared (NIR) self-powered photodetectors have emerged as a significant innovation in sensor technology due to their high penetration depth and near-infrared absorption, which allows for various applications such as medical diagnostics, remote sensing, and security systems. A tellurium (Te) has gained attention as a promising NIR absorption material due to its complementary metal-oxide semiconductor (CMOS) compatibility, a tunable narrow bandgap and high carrier mobility, making it suitable for highly sensitive and fast NIR photodetector applications. In this study, we demonstrate a NIR photodetector based on a robust Te/Si heterojunction, employing a radio-frequency (RF) sputtered Te thin film and subsequent annealing process. Thanks to heterojunction constructed by Te and Si, the photo-carriers are effectively segregated. As, a result, the NIR photodetector showed a high responsivity of 0.62 A/W, an excellent specific detectivity up to 1.04 x 1011 Jones under NIR illumination. The experimental results indicate that the Te/Si heterojunction-based photodetector is give a potential as a future NIR photodetector for advanced optoelectronic applications.

In this study, the crystal characteristics of commercial AlN powders with sizes of "um" and "nm" were selected through XRD analysis and then sintered at different temperatures through an induction heating furnace to investigate the optimized sintering temperature and physical properties. The sintering temperature was 1,500, 1,700, and 1,900 C in the N atmosphere, and the optimized sintering temperature conditions were established for the sintered AlN pellets using SEM, XRD, and Raman analysis. Additionally, impedance analysis was performed to confirm the electrical properties of the optimized AlN pellet without sintering additives.

Ion-based electrochemical random-access memory (ECRAM) is proposed for synaptic applications owing to its promising characteristics that have the potential to accelerate data processing through neuromorphic systems. However, attaining ideal synaptic functionalities and constructing high-density vertical synapse arrays are challenging due to issues related to uncontrolled ion migration and constraints in 3D multi-stacking. Here, a breakthrough using 3D stackable Li ion-based vertical-sensing ECRAM (VS-ECRAM) is presented with an ion-permeable ultrathin WS2 electrode synthesized through low-temperature (200 C-degrees) atmospheric-pressure plasma-enhanced chemical vapor deposition (AP-PECVD). The direct AP-PECVD of the WOx channel layer induces WS2 formation in the surface region, which exhibits sufficient electrical conductivity to function as an electrode. By utilizing the WS2 electrode as an ion-barrier layer in the VS-ECRAM synapse, excellent weight update linearity and cycling variability are achieved due to the finely controlled ion migration. Furthermore, a two-layer stacked 3D VS-ECRAM is successfully fabricated through the vertical WS2 formation, and independent weight updates without any disturbance are confirmed. Finally, a high pattern recognition accuracy of 95.22% is obtained using a multi-layer perceptron-based neural network. Therefore, the proposed 3D stackable WS2-based VS-ECRAM exhibits a strong potential for application in high-density neuromorphic devices with excellent synaptic performances.