An advanced Intel 3 FinFET technology is presented that has been optimized to provide 10% logic scaling, a full node of performance improvement and improved reliability compared to Intel 4. Through transistor enhancements, interconnect optimization, and design co-optimizations, up to 18% performance gain at iso-power is achieved over Intel 4. Intel 3 additionally enables a 210nm high-density standard cell, 1.2V-native I/O transistors, deep N-well isolation, and long-channel analog devices to provide full-featured technology design capabilities.

The 22FFL technology developed for operation to 3.3V is used to investigate process and design considerations required to extend technology capability to 12 V applications. A prototype chip was carefully designed in close consideration with the technology reliability requirements of the lower voltage components to demonstrate product-level reliability capabilities. The reliability of components such as transistors, well junctions, back-end dielectrics and MIMCAPs is thoroughly characterized and proven robust throughout a 10-year lifetime. The results demonstrate a reliable technology capability that is compliant with industrial standards to enable high-voltage design requirements.

This paper describes the transistor reliability of Intel's 22FFL FinFET technology, which includes an extensive variety of device offerings to enable high performance and low power design options. Detailed evaluations of BTI, TDDB, self-heating, and HCI are included to demonstrate the impact from the various device's pitch, channel length, and threshold voltage. Process integration details are included to highlight the interaction with reliability mechanisms. In addition, modeling results are shown to be well matched to silicon on both discrete devices and benchmark circuits.

A FinFET technology named 22FFL has been developed that combines high-performance, ultra-low power logic and RF transistors as well as single-pattern backend flow for the first time. High performance transistors exhibit 57%/87% higher NMOS/PMOS drive current compared to the previously reported 22nm technology [1]. New ultra-low power logic devices are introduced that reduce bit cell leakage by 28x compared to a regular SRAM cell enabling a new 6T low-leakage SRAM with bit cell leakage of sub 1pA/cell. An RF device with optimized layout has been developed and shows excellent f T /f MAX of (230GHz/284GHz) and (238GHz/242GHz) for NMOS and PMOS respectively.