Nanophotonics exploits the best of photonics and nanotechnology which has transformed optics in recent years by allowing subwavelength structures to enhance light-matter interactions. Despite these breakthroughs, design, fabrication, and characterization of such exotic devices have remained through iterative processes which are often computationally costly, memory-intensive, and time-consuming. In contrast, deep learning approaches have recently shown excellent performance as practical computational tools, providing an alternate avenue for speeding up such nanophotonics simulations. This study presents a DNN framework for transmission, reflection, and absorption spectra predictions by grasping the hidden correlation between the independent nanostructure properties and their corresponding optical responses. The proposed DNN framework is shown to require a sufficient amount of training data to achieve an accurate approximation of the optical performance derived from computational models. The fully trained framework can outperform a traditional EM solution using on the COMSOL Multiphysics approach in terms of computational cost by three orders of magnitude. Furthermore, employing deep learning methodologies, the proposed DNN framework makes an effort to optimise design elements that influence the geometrical dimensions of the nanostructure, offering insight into the universal transmission, reflection, and absorption spectra predictions at the nanoscale. This paradigm improves the viability of complicated nanostructure design and analysis, and it has a lot of potential applications involving exotic light-matter interactions between nanostructures and electromagnetic fields. In terms of computational times, the designed algorithm is more than 700 times faster as compared to conventional FEM method (when manual meshing is used). Hence, this approach paves the way for fast yet universal methods for the characterization and analysis of the optical response of nanophotonic systems.

PowerVia increases the efficiency of power delivery by adding back-side interconnects [1]. It also improves performance by relaxing the minimum front-side interconnect pitch and by optimizing them for signaling. Research to further improve performance and density synergistically with PowerVia includes back-side device contacts and device stacking. In this paper, we present an experimental demonstration of a novel cell architecture with back-side device contacts and back side power delivery. Keywords: back-side power delivery, back-side contacts, BSCON.

The recent report of a high-yielding process with Back-Side Power Delivery (BSPD) using PowerVia, the benefits obtained on an Intel E-core implementation, and the imminent deployment of PowerVia in High- Volume Manufacturing (HVM), are driving a rapid expansion of R&D across the Si Industry to enable future deployments of this seminal innovation. One such example is the recent experimental demonstration of back-side contacts (BSCONs), which bring about performance and scaling benefits. In this paper, we will identify and discuss potential directions beyond PowerVia, and the key process advances required to enable them. Three key R&D thrusts will be discussed: (i) scaling of the BSPD, (ii) introduction of new functionality on the back-side interconnects stack beyond power delivery, and (iii) efficient device stacking.

The Artificial Neural Network (ANN) has become an attractive approach in Machine Learning (ML) to analyze a complex data-driven problem. Due to its time efficient findings, it has became popular in many scientific fields such as physics, optics, and material science. This paper presents a new approach to design and optimize the electromagnetic plasmonic nanostructures using a computationally efficient method based on the ANN. In this work, the nanostructures have been simulated by using a Finite Element Method (FEM), then Artificial Intelligence (AI) is used for making predictions of associated sensitivity (S), Full Width Half Maximum (FWHM), Figure of Merit (FOM), and Plasmonic Wavelength (PW) for different paired nanostructures. At first, the computational model is developed by using a Finite Element Method (FEM) to prepare the dataset. The input parameters were considered as the Major axis, a, the Minor axis, b, and the separation gap, g, which have been used to calculate the corresponding sensitivity (nm/RIU), FWHM (nm), FOM, and plasmonic wavelength (nm) to prepare the dataset. Secondly, the neural network has been designed where the number of hidden layers and neurons were optimized as part of a comprehensive analysis to improve the efficiency of ML model. After successfully optimizing the neural network, this model is used to make predictions for specific inputs and its corresponding outputs. This article also compares the error between the predicted and simulated results. This approach outperforms the direct numerical simulation methods for predicting output for various input device parameters.

A photonic crystal fiber (PCF) structure which offers exceptional research prospects to design sensors is eccentrically found applicable in wide variety of fields and thus have prompted a lot of interest among researchers. However, intending to determine PCF design configuration producing desired optical response for worthwhile application forcefully necessitates investigating vast search space with suitable topological structure variants. Moreover, the existing Finite Element Method (FEM) based numerical simulation software demands intensively long computation time for each set of design parameters with quite several repetitions and is a challenging task with reduced computational complexity. In this regard, use of Deep Neural Networks (DNN) paves way to predict the outcome in less time. One of the most significant challenges encountered while training a neural network is to generate an extensive data set. With the motive of compensating for the same issue, we propose the use of Autoencoder (AE) network to achieve data augmentation. In this research, a pioneering approach to predict optical parameters of PCF based temperature sensor using AE and DNN is presented. The proposed model is designed to make appropriate predictions of optical properties even for unknown design space parameters. The comparative metric analysis explores the efficient performance of the model with high values of R-squared ( $r^{2}$ ) score and less computation time in contrast to simulation run-time of FEM. Moreover, the proposed DNN model along with AE is proved to show very low collective mean squared error (MSE) in contrast to DNN without AE.

The 22FFL technology developed for operation to 3.3V is used to investigate process and design considerations required to extend technology capability to 12 V applications. A prototype chip was carefully designed in close consideration with the technology reliability requirements of the lower voltage components to demonstrate product-level reliability capabilities. The reliability of components such as transistors, well junctions, back-end dielectrics and MIMCAPs is thoroughly characterized and proven robust throughout a 10-year lifetime. The results demonstrate a reliable technology capability that is compliant with industrial standards to enable high-voltage design requirements.

This work presents silicon reliability characterization of Intel’s Foveros three-dimensional (3D) logic-on-logic stacking technology implemented on the 22FFL process node. Simulations and data demonstrate mechanical strain safe zones around Through Silicon Vias (TSVs). Evaluations of TSV impact on transistor, interconnect, and defect reliability are reported with a Si technology focus. TSV and bump architectures pass thermomechanical assessments on the final optimized process flow. Foveros 3D stacking technology is shown to exhibit robust silicon reliability.

We provide a comprehensive overview of the reliability characteristics of Intel’s 10+ logic technology. This is a 10 nm technology featuring the third generation of Intel’s FinFETs, seventh generation of strained silicon, fifth generation of high-k metal gate, multi-Vt options, contact over active gate, single-gate isolation, 14 metal layers, low-k inter-layer dielectric, multi-plate metal-insulator-metal capacitors, two thick-metal routing layers for low-resistance power routing, and lead-free packaging. The technology meets all relevant reliability metrics for certification.

Photonic crystal fibers (PCFs) are the specialized optical waveguides that led to many interesting applications ranging from nonlinear optical signal processing to high-power fiber amplifiers. In this paper, machine learning techniques are used to compute various optical properties including effective index, effective mode area, dispersion and confinement loss for a solid-core PCF. These machine learning algorithms based on artificial neural networks are able to make accurate predictions of above-mentioned optical properties for usual parameter space of wavelength ranging from 0.5-1.8 µm, pitch from 0.8-2.0 µm, diameter by pitch from 0.6-0.9 and number of rings as 4 or 5 in a silica solid-core PCF. We demonstrate the use of simple and fast-training feed-forward artificial neural networks that predicts the output for unknown device parameters faster than conventional numerical simulation techniques. Computation runtimes required with neural networks (for training and testing) and Lumerical MODE solutions are also compared.

Machine learning is an application of artificial intelligence that focuses on the development of computer algorithms which learn automatically by extracting patterns from the data provided. Machine learning techniques can be efficiently used for a problem with a large number of parameters to be optimized and also where it is infeasible to develop an algorithm of specific instructions for performing the task. Here, we combine the finite element simulations and machine learning techniques for the prediction of mode effective indices, power confinement, and coupling length of different integrated photonics devices. Initially, we prepare a dataset using COMSOL Multiphysics and then this data is used for training while optimizing various parameters of the machine learning model. Waveguide width, height, operating wavelength, and other device dimensions are varied to record different modal solution parameters. A detailed study has been carried out for a slot waveguide structure to evaluate different machine learning model parameters including number of layers, number of nodes, choice of activation functions, and others. After training, this model is used to predict the outputs for new input device specifications. This method predicts the output for different device parameters faster than direct numerical simulation techniques. Absolute percentage error of less than 5% in predicting an output has been obtained for slot, strip, and directional waveguide coupler designs. This study paves the step towards using machine learning based optimization techniques for integrated silicon photonics devices.

A novel technique is proposed to increase the effective index difference (An d ) between higher order modes of a multimode step-index fiber. Multimode fibers provide a higher effective area and their higher order modes are also resistant to area reduction due to bending. However, the larger effective area comes with an increased number of modes which are more prone to mode coupling and mode mixing. The modal stability is directly related to the effective index difference between the mode of propagation and its neighboring modes. We have shown here that the modal stability between LP06 mode and its neighboring antisymmetric LP15 and LP16 modes can be increased more than 54% by the introduction of air-holes array along the circumference of the fiber. We have also shown variation in the effective index difference with possible fabrication tolerances that may occur in air-holes size and change in their locations. Furthermore, the technique presented here can also be applied to increase the stability of other higher modes of a multimode fiber.

Graphene is a promising ultra-thin barrier against undesired mass transport, however, the high deposition temperatures or the defect inducing post-deposition transfer processes limit its widespread applicability. Herein we report on the successful blocking of copper (Cu) ion diffusion by large area multi-layer graphene (MLG) membranes deposited directly on silicon oxide (SiO2) via low temperature plasma-enhanced chemical vapor deposition. The barrier strength of MLG is compared to evaporated tantalum (Ta) by applying positive bias-temperature stress (BTS) to Cu/barrier/SiO2/Si test structures. After constant BTS of 4 × 106 V cm-1 at 400 K for 50 min, the MLG barrier device exhibits a negligible flat band voltage shift in capacitance-voltage measurements and no discernible current peak in triangular voltage scans, whereas the Ta barrier allows significant Cu ion transport. Highly limited Cu ion diffusion through MLG suggests that lower energy diffusion paths, like grain boundaries and defects of individual graphene layers, do not align in the direction of an applied stress field. In general, the presented low-temperature direct growth MLG membranes can block undesirable diffusion in many applications, and are especially suitable as Cu diffusion barriers in integrated circuit chips, photovoltaic cells and flexible electronic devices.

Sub-1 nm Cu difïusion barriers are realized by using transferred CVD-grown hexagonal boron nitride (h-BN) and directly deposited molybdenum disulfide (MoS 2 ), for the first time. Based on time-dependent dielectric breakdown measurements, the diffusion barrier properties of these 2D materials are explored to address the barrier/liner scaling challenge for the ultra-scaled interconnect technology. The predicted lifetime of devices with directly deposited 2D barriers can achieve 3 orders of magnitude improvement compared to control devices.

Due to the small skin depth in metals at optical frequencies, their plasmonic response is strongly dictated by their surface properties. Copper (Cu) is one of the standard materials of choice for plasmonic applications, because of its high conductivity and CMOS compatibility. However, being a chemically active material, it gets easily oxidized when left in ambient environment, causing an inevitable degradation in its plasmonic resonance. Here, for the first time, we report a strong enhancement in the optical relaxation time in Cu by direct growth of few-layer graphene that is shown to act as an excellent passivation layer protecting Cu surface from any deterioration. Spectroscopic ellipsometry measurements reveal a 40–50% reduction in the total scattering rate in Cu itself, which is attributed to an improvement in its surface properties. We also study the impact of graphene quality and show that high quality graphene leads to an even larger improvement in electron scattering rate. These findings are expected to provide a big push towards graphene-protected Cu plasmonics.

We present a fabrication method to achieve a graphene stack metamaterial, a periodic array of unit cells composed of graphene and a thin insulating spacer, that allows accumulation of the strong absorption from individual graphene sheets and low reflectivity from the stack. The complex sheet conductivity of graphene from experimental data models the measured power transmitted as a function of wavelength and number of periods in the stack. Simulated results based on the extracted graphene complex sheet conductivity for thicker stacks suggest that the graphene stack reflectivity and the per-unit-length absorption can be controlled to exceed the performance of competing light absorbers. Furthermore, the electrical properties of graphene coupled with the stack absorption characteristics provide for applications in optoelectronic devices.

Highly conductive copper nanowires (CuNWs) are essential for efficient data transfer and heat conduction in wide ranging applications like high-performance semiconductor chips and transparent conductors. However, size scaling of CuNWs causes severe reduction in electrical and thermal conductivity due to substantial inelastic surface scattering of electrons. Here we report a novel scalable technique for low-temperature deposition of graphene around CuNWs and observe strong enhancement of electrical and thermal conductivity for graphene-encapsulated CuNWs compared to uncoated CuNWs. Fitting the experimental data with the theoretical model for conductivity of CuNWs reveals significant reduction in surface scattering of electrons at the oxide-free CuNW surfaces, translating into 15% faster data transfer and 27% lower peak temperature compared to the same CuNW without the graphene coating. Our results provide compelling evidence for improved speed and thermal management by adapting the Cu-graphene hybrid technology in future ultrascaled silicon chips and air-stable flexible electronic applications.

Conventional Chemical Vapor Deposition (CVD) techniques require the use of a catalyst surface and high temperature of growth (∼1000°C) to grow graphene, which renders the process incompatible with arbitrary substrates. While post-synthesis transfer of graphene onto required substrates is widely used, it causes undesirable effects such as wrinkles/folds/cracks and unintentional doping. Here, we report low-temperature growth of graphene at 650°C on non-catalytic SiO2 and quartz substrates using a one-step, rapid Plasma Enhanced Chemical Vapor Deposition (PECVD) process. We simultaneously study PECVD graphene growth on a traditional catalytic material such as copper and show that the growth substrate does not play any role in the dissociation of hydrocarbon precursor during PECVD, thus eliminating the possibility of a catalytic effect. Using several characterization techniques, we observe an increasing rate of growth from SiO2 to quartz to copper, which can be attributed to different adsorption and diffusion energies of plasma radicals on these substrates. As opposed to thermal CVD growth on copper, which is self-limiting, the PECVD method developed here is scalable in terms of number of layers, allowing its adept integration in commercial devices.

We present the fabrication and characterization of a graphene stack that can function as the darkest material and serve as the basis for a new class of sensitive, high-speed photodetectors. (C) 2013 Optical Society of America

An efficient broadband out-coupler on silicon-on-insulator (SOI) with high-index contrast grating (HCG) is proposed. The presence of a silicon-air (high-index contrast) grating on the top silicon layer in SOI allows a strong interaction between the guided mode and the grating. The broadband design of the out-coupler is presented by optimising the various grating parameters. The design analysis and simulation of such an out-coupler is performed with finite difference method. Coupling efficiency of 54% is achieved over an ultra-wide wavelength range from 1500nm to 1650nm.