With the introduction of the NXE:3100 NA=0.25 exposure system a big step has been made to get EUV lithography ready for High Volume Manufacturing. Over the last year, 6 exposure systems have been shipped to various customers around the world, active in Logic, DRAM, MPU and Flash memory, covering all major segments in the semi-conductor industry. The integration and qualification of these systems have provided a great learning, identifying the benefits of EUV over ArF immersion and the critical parameters of the exposure tool and how to operate it. In this paper we will focus specifically on the imaging performance of the NXE:3100 EUV scanner. Having been operational for more than a year a wide range of features were evaluated for lithographic performance across the field and across wafer. CD results of 32nm contact holes, 27nm isolated and dense lines, 27nm two-bar, 22nm dense L/S with Dipole, as well as several device features will be discussed and benchmarked against the current ArF immersion performance. A budget verification will be presented showing CD and contrast budgets for a selection of lithographic features. The contribution of the resist process and the mask will be discussed as well. The litho performance optimization will be highlighted with the 27nm twobar and isolated lines features that are sensitive to the illuminator pupil shape and projection lens aberrations. We will estimate the amount of resist induced contrast loss for 27 and 22nm L/S based on measurements of Exposure Latitude and the contributors from the exposure system. We will further present on the impact of variations in the mask blank and patterned mask on imaging, with several new contributors to take into account compared to traditional transmission masks. Finally, the combined results will be projected to the NXE:3300 NA=0.33 exposure system to give an outlook for its imaging performance capabilities.

Extreme ultraviolet lithography (EUVL) sources emit a broad spectrum of wavelengths ranging from EUV to DUV and beyond. If the deep ultraviolet (DUV) reaches the wafer it will affect imaging performance by exposing the photoresist. Hence it is critical to determine the amount of DUV out of band (OoB) present in a EUVL tool, as well as its effect on the printed features on the wafer.In this study we investigate the effect of DUV OoB in EUVL. A model is developed in order to be able to quantify the DUV/EUV ratio at wafer level and all the required input parameters are estimated in the range from 140 to 400nm, as well as for the EUV at 13.5nm. The transmission of the optical system was estimated based on the optical design and reflectivity measurements of the mirrors. The mask reflectivity for multilayer (ML) and absorber was measured at wavelengths down to 140 nm and for EUV. The sensitivity to EUV and DUV for a variety of resist platforms was measured at 13.5 nm, 157 nm, 193 nm, 248 nm and 365 nm. The source spectra were also measured. By using these inputs, it was possible to estimate the DUV/EUV ratio for two different ASML tool configurations, the EUV Alpha Demo Tool and the NXE:3100. Both NXE:3100 with LPP (laser produced plasma) source and Alpha Demo Tool with DPP (discharge produced plasma) source show less than 1% DUV/EUV ratio in resist.The modeling predictions were compared to experimental results. A methodology is introduced to measure the DUV/EUV ratio at wafer level in situ. With this aim, an aluminum coated mask was fabricated and its reflectivity was qualified in both EUV and DUV wavelength range. By comparing the dose to clear exposures of a reflective blank and of the aluminum mask, it is possible to quantify the DUV/EUV ratio. The experimental results are in order of magnitude agreement with modeling predictions. The proposed experimental approach can be used to benchmark the DUV sensitivity of different resist platforms and may be used to monitor DUV OoB.

Extreme ultraviolet lithography (EUVL) is the leading candidate for lithography beyond the 22 nm half-pitch device manufacturing node. These geometries impose tighter requirements for standard critical dimension metrology and call for new strategies able to quantify and monitor extreme ultraviolet (EUV) specific parameters. In this paper, the approaches to measure two key EUV imaging parameters, namely flare and out-of-band (OoB) radiation, are discussed. EUV sources are known to emit a broad spectrum of wavelengths ranging from EUV to deep ultraviolet (DUV) and beyond. As the DUV can contribute to the photoresist exposure and degrade imaging performance, it is critical to accurately determine the amount of DUV OoB in EUVL exposure tools at the wafer level. In this paper, a methodology using an aluminum-coated reticle to measure the DUV/EUV ratio in resist is discussed. Such a mask is able to provide quantitative in situ information on the scanner DUV content thanks to its ability to transmit DUV and absorb EUV. The experimental OoB results for two EUVL tools are reported and compared with modeling predictions. Flare in EUVL is caused by light scattered by the surface roughness of the optical elements and has a larger impact as compared to optical lithography. As a consequence, a precise and accurate flare metrology is essential to guarantee a proper qualification of the effect, as well as to implement an effective compensation strategy. However, the flare level estimate has been historically based on operator and tool-dependent procedures that are unable to meet the requirements for accuracy and precision dictated by EUVL. A robust in-line approach to flare metrology is developed and qualified. As in the case of OoB, experimental flare results for two EUVL tools are reported. The experimental data are compared to full-chip simulations using the point spread function of the tool’s optical system.

reduce the k1 factor in Rayleigh's resolution equation. Double dipole lithography (DDL) is one of the candidates for a low-k1 imaging technique and it is a viable solution for 65- and 45-nm technology nodes. Because DDL takes has the advantage of extreme off-axis illumination of the dipole, the printing capability of small features as well as their through-pitch common process window can be enhanced. However, as a dipole illuminator gains the benefits of high contrast only for structures perpendicular to the dipole orientation, the original mask layout must be converted into horizontal and vertical components and printed in a double exposure. Throughput will be sacrificed due to the multiple exposures. Nevertheless, DDL mask manufacture is relatively simple compared to the production of the more complicated phase shift mask (PSM) and chromeless phase lithography (CPL). As regards an overlay issued from the separate image composition, several papers have shown the minor effect on pattern fidelity using the current ArF scanner.To split the design layout according to the pattern orientation, the double exposure scheme needs an automatic layout conversion algorithm. To integrate the H V conversion with model- and/or rule-based optical proximity corrections (OPCs), several approaches for pattern decomposition associated with OPC treatment have been suggested. In this paper we will go over the development of model- and rule-based OPC treatment and will focus on current technology for accurate model-based OPC development with empirical model calibration. Using the technique the lithographic performances such as pattern fidelity, process window as well as overlay error sensitivity will be demonstrated. We focus on a 65-nm technology node with k1 near 0.31. Based on the success of tool development and verification, the DDL with full-chip OPC-treated decomposition will become a mature low-k1 imaging solution.

Double Dipole Lithography (DDL(TM)) is one of the candidates for extending optical lithography into the k(1) = 0.30 regime. In 2001 the first experimental 2D elbow structures were reported [1]. In 2002 a rule based decomposition [2] and a model assisted decomposition method [3] were presented. In 2003 a new, model based decomposition step has been presented [4].Now we present the results of applying this model based decomposition by discussing the first experimental results on a 0.75 NA ArF scanner printing 70 run lines at various pitches (160 run and larger, i.e. k(1) = 0.31 and up).We provide an assessment of the current state of maturity of the DDL technology for the low-k(1) regime (0.3..0.4). This is based upon CD uniformity, 2D pattern fidelity and through pitch process latitude behavior.

Double Dipole Lithography (DDL(TM)) has been demonstrated to be capable of imaging complex 2D patterns for full-chip application [1,2,3]. Due to inherently high aerial image contrast, we have found that there is strong potential for this technology to meet manufacturing line width roughness (LWR) and critical dimension uniformity (CDU) requirements for the 65nm node using ArF binary chrome masks or 6% attenuated phase shift mask (AttPSM). For patterning at k(1) less than 0.35, DDL is a Resolution Enhancement Technology (RET) that offers an acceptable process window without resorting to costly hard phase shift masks. To use DDL for printing actual IC device patterns, the original design data must be converted into "vertical (V)" and "horizontal (H)" masks for the respective X and Y dipole exposures. An improved model-based DDL mask data processing steps has been demonstrated that it is possible to convert complex logic and memory data to X-Y dipole exposure compatible layout. Due to the double exposure, stray light must be well controlled to ensure uniform printing across the entire chip. One solution to minimize stray light is to apply large patches of chrome in open field areas to reduce the background transmission during exposure. Unfortunately, this is not feasible for most poly gate masks using a positive resist process. In this work, we report an improved model based DDL layout conversion methodology for full-chip application. A new generation of DDL technology reticle set was developed to verify the performance. Background light shielding is a critical part of the DDL. We report an innovative shielding scheme to minimize the negative impact of stray light for the critical features during double exposures.

Double dipole lithography (DDL, DDL is a trademark of ASML Masktools.) is a viable imaging solution for the 65-nm and 45-nm technology nodes, when using ArF exposure tools. By taking advantage of the extreme off-axis illumination of the dipole, the demonstrated, small critical dimension (CD) can be resolved with a good process window. In this case k1 will be 0.31 when applying formula k1 = (minimum half pitch) × (wavelength, λ)/(numerical aperture, NA), the Rayleigh's resolution equation with minimum half pitch of 80 nm as well as wavelength and NA of 193 nm and 0.75, respectively. The detailed CD measurement data and process window analysis can be seen. The ability of the dipole to resolve this CD, however, applies only to structures that are perpendicular to the orientation of the dipole; i.e., the x-dipole (or horizontal dipole) resolves small, vertical lines and spaces [S. Hsu, N. Corcoran, M. Eurlings, W. Knose, T. Laidig, K. E. Wampler, S. Roy, X. Shi, M. Hsu, J. F. Chen, J. Finders, R. J. Socha and M. Dusa: SPIE 4691 (2002), 476]. The use of the pattern decomposition [S. Hsu, N. Corcoran, M. Eurlings, W. Knose, T. Laidig, K. E. Wampler, S. Roy, X. Shi, M. Hsu, J. F. Chen, J. Finders, R. J. Socha and M. Dusa: SPIE 4691 (2002) 476, S. Hsu, J. F. Chen, N. Cororan, W. Knose, D. J. Van Den Broeke, T. Laidig, K. E. Wampler, X. Shi, M. Hsu, M. Eurlings, J. Finders, T. B. Chiou, R. J. Socha, W. Conley, Y. W. Hsieh, S. Tuan and F. Hsieh: SPIE 5040 (2003) 215] and double exposure of the x-dipole and the y-dipole respectively, make it possible to image an arbitrary device pattern. DDL allows integrated circuit (IC) manufacturers to maintain their roadmaps for shrinking device technology, while extending the use of ArF technology. Compared with other low-k1 imaging solutions, DDL has the advantage of using standard mask technologies, such as binary masks or 6% attenuated phase shift masks (PSMs). Because of the lower cost and faster turn-around time of these masks, DDL has the potential to become the imaging solution of choice for small-volume IC products, such as many application specific IC devices (ASICs). The imaging performance of DDL and the pattern decomposition algorithm are discussed elsewhere [M. Eurlings, E. van Setten, J. A. Torres, M. Dusa, R. Socha, L. Capodieci and J. Finders: SPIE 4404 (2001) 266, S. Hsu, N. Corcoran, M. Eurlings, W. Knose, T. Laidig, K. E. Wampler, S. Roy, X. Shi, M. Hsu, J. F. Chen, J. Finders, R. J. Socha and M. Dusa: SPIE 4691 (2002) 476, S. Hsu, J. F. Chen, N. Cororan, W. Knose, D. J. Van Den Broeke, T. Laidig, K. E. Wampler, X. Shi, M. Hsu, M. Eurlings, J. Finders, T. B. Chiou, R. J. Socha, W. Conley, Y. W. Hsieh, S. Tuan and F. Hsieh: SPIE 5040 (2003) 215]. In this paper, we investigate the CD and overlay (OL) errors caused by exposure tools, such as the illuminator imperfections, for example; these errors include the error caused by the pole intensity imbalance (PIB), aberration induced CD errors, and image placement errors (IPEs). During our research, we carried out extensive simulations of 1-dimensional and 2-dimensional mask-pattern CD errors and IPEs as a function of the PIB, pole size, pole center location, and aberration sensitivity. Simulation results show that the magnitude of the IPE depends on the control of PIB, dipole telecentricity, and the pattern structures. We present an IPE and focus control budget to describe the necessary tool-control requirements, considering the device patterns that satisfy 65-nm and 45-nm technology nodes respectively. The available results show that we can control the sources of the exposure-tool errors, enabling DDL imaging technology to satisfy the requirements of the 65-nm and 45-nm technology nodes.

The double dipole lithography (DDL) has been demonstrated as a very viable technique to extend the imaging capability for random logic devices. (referencing M. Eurling’s 2004SPIE paper and TB Chiou’s 2003MNC paper).

Double Dipole Lithography (DDL(TM)) has been demonstrated to be capable of patterning complex 2D patterns [I]. Due to inherently high aerial imaging contrast, especially for dense features, we have found that it has a very good potential to meet manufacturing requirements for the 65nm node using ArF binary chrome masks. For patterning in the k(1)< 0.35 regime without resorting to hard phase-shift masks (PSMs), DDL is one unique Resolution Enhancement Technique (RET) which can achieve an acceptable process window. To utilize DDL for printing actual IC devices, the original design data must be decomposed into "vertical (V)" and "horizontal (H)" masks for the respective X- and Y-dipole exposures. An improved two-pass, model-based, DDL mask data processing methodology has been established. It is capable of simultaneously converting complex logic and memory mask patterns into DDL compatible mask layout. To maximize the overlapped process window area, we have previously shown that the pattern-shielding algorithm must be intelligently applied together with both Scattering Bars (SBs) and model-based OPC (MOPC)[1]. Due to double exposures, stray light must be well-controlled to ensure uniform printing across the entire chip. One solution to minimize stray light is to apply large patches of solid chrome in open areas to reduce the background transmission during exposure. Unfortunately, this is not feasible for a typical clear-field poly gate masks to be patterned by a positive resist process. In this work, we report a production-worthy DDL mask pattern decomposition scheme for full-chip application. A new generation of DDL technology reticle set has been developed to verify the printing performance. Shielding is a critical part of the DDL. An innovative shielding scheme has been developed to protect the critical features and minimize the impact of stray light during double exposure.

A rigorous computationally fast technique for optimizing the illumination is demonstrated based on Hopkins imaging formulation for partial coherent imaging. The technique optimizes the illumination by changing selecting areas of the illuminator, which enhance the pattern dependent diffraction orders. The illumination is also maximized for largest process window by increasing the normalized image log slope (NILS) and by increasing the depth of focus (DOF). For a 110-nm DRAM isolation pattern with 220-nm pitch the optimized illumination is an elliptical dipole element. This elliptical dipole element has the largest NILS through focus for the 110-nm main feature width and for the end of line. Simulation results with this elliptical dipole element show that the DOF is 0.6 μm. Experiments were done with a 35° dipole element, which approximates the elliptical dipole element. These experiments demonstrated that the 110-nm DRAM isolation pattern is resolvable with 0.4-μm DOF.

For cost-effective Integrated Circuit (IC) manufacturing, it is highly desirable to use Binary-Chrome Masks (BIMs) instead of Phase Shifting Masks (PSMs). For the 70nm technology node, it is of particularly appealing if Argon Fluoride (ArF) BIMs can still be used. In this paper, we demonstrate that double dipole ArF exposure together with BIMs is capable of achieving acceptable overlapped process window for printing 70nm Critical Dimension (CD) features. The main challenge of using such a technique for IC manufacturing is how to properly decompose the original mask patterns into two separate orientation masks (vertical and horizontal). To compensate for the possible two-dimensional (2D) pattern distortion due to the strong proximity effect, a novel set of

Even with increasing numerical apertures and decreasing wavelengths in optical lithography, the practical k, factor used in IC fabrication will continue to decrease ever closer to the theoretical 0.25 limit. This paper presents results of a feasibility study on 0.11 mum imaging with dipole illumination on a 0.70 NA KrF tool using a binary mask (i.e. k(1) = 0.31).The obvious advantage of dipole illumination techniques is the strong enhancement of exposure latitude (EL) and Depth of Focus (DOF) for specific dense structures (0.75 mum DOF at 10% EL and 23% maximum EL for 0.11 mum lines-and-spaces on a 0.70 NA KrF tool with dipole illumination).However, there are also many drawbacks for other feature types and geometries. These must be either avoided or overcome. To deal with these drawbacks in the best way, detailed knowledge of the unwanted effects is needed. This article deals with two categories of trade-offs that must be considered when applying dipole illumination.First of all, dipole illumination will typically only enhance one specific feature size and pitch. Typically, the dipole illumination mode is set up to enhance the (nearly) dense pattern. This paper investigates whether the isolated structures can be printed simultaneously (sufficient overlapping process latitude) with dense structures, and to what extent assisting features (AFs) must or can be used. The relation between AF size and unwanted printing of AF under dipole illumination. conditions is examined.Secondly, dipole illumination will only enhance one specific orientation (horizontal or vertical). However, structures with an orientation perpendicular to the optimum dipole can still be printed with sufficient process latitude, but only if they are significantly larger than the CD in the optimum dipole orientation. Data on the relation between process window, feature size and orientation are presented.The results of the investigations into the feasibility of simultaneously printing small CD structures in the optimum dipole orientation and structures with another CD, pitch or orientation can be used as guideline when designing a layer that should be printed in a single dipole exposure. If the circuitry design cannot be brought into agreement with this guideline, then double or multiple exposure techniques can be considered. Double dipole exposure of a split-up dense elbow structure is experimentally shown to be feasible.Taking all these factors into account, the extension of optical lithography to k(1) factors of 0.3 will depend on the ability of lithographers and circuit designers to overcome and deal with the trade-offs that are inevitably connected with the use of strong enhancement techniques such as dipole illumination.

Currently, the 130 nm SIA node is being implemented at leading edge semiconductor manufacturing facilities. Previously, this node appeared to be the insertion point for 193 nm lithography. However, it is evident that for the majority of applications 248 nm will be the wavelength of choice. This once again raises the question how far DUV lithography (248 nm) will take us. To investigate this, overlay, imaging and productivity related issues have to be considered. Although these items become more and more linked at low k1-factors (e.g. overlay and imaging), this paper will focus on some of the imaging related topics.

As critical dimensions continue to shrink in line with the SIA roadmap, the ratio of printed feature size and accepted wavelengths for optical lithography is driving inexorably towards the theoretical limitation of 0.25 for the Raleigh equation constant, k1. With the drive to lower k1 values fundamental limitations start to impact optical lithography. One example is the inability to simultaneously print features at different duty cycles with acceptable process windows. In the k1 regime down to 0.5, dense and isolated features could be printed in one with acceptable process windows. Today advanced lithography is operating at k1 values of 0.42-0.37 using KrF excimer laser light sources at a wavelength ((lambda) ) of 248nm. High lens Numerical Aperture (NA) is required to obtain sufficient aerial image contrast for dense lines, but results in reduced depth of focus which scales proportional to (lambda) /NA2. Using off-axis illumination techniques such as annular illumination can compensate the reduction in depth of focus for dense lines. For isolated lines high NA has only limited impact on the aerial image contrast due to the difference in the diffraction pattern and only serves to reduce the limited depth of focus which, unlike dense lines, does not benefit from the application of off-axis illumination. Use of increasingly strong imaging enhancement techniques will be required at lower k1 values resulting in further trade-offs to be addressed in pattern dependency. For example, quadrupole and di-pole off-axis illumination provides stronger enhancement to the available process window than annular illumination but only for features with specific orientations. In this paper an overview of the different imaging enhancement techniques will be given and examples of the trade-offs between enhancement and techniques, constraints on orientations and duty cycles will have to be applied in the device design. Alternatively, individual device layers will have to be separated by feature type, duty cycle and orientation to allow optimum enhancement techniques to be applied for each feature using multiple exposures. These approaches will be required if optical lithography at k1 values around 0.3 is to be realized. In the paper we will compare the use of two very strong enhancement techniques, dipole illumination and alternating (Levinson type) Phase Shift Mask with respect to process latitude, complexity and aberration sensitivity. To complete the review of low k1 the economic viability of optical lithography utilizing these strong enhancement techniques will be analyzed in terms of Cost of Ownership.