This paper addresses the increasing need for stringent overlay and imaging control in semiconductor manufacturing, driven by wafer-to-wafer bonding - advanced 3D integration, in both logic and memory segments. We present novel scanner correction methods for co-optimizing overlay and imaging, targeting much larger overlay correction requests with higher spatial frequency. These innovations in scanner control deliver the required on-product patterning performance and yield for next-generation semiconductor devices. In this paper we present the results of this optimization using an experimental test use case. The experiment is conducted using 0.33 EUV lithography scanner. The imaging test vehicle is designed to assess the effect of overlay corrections on LCDU (Local Critical Dimension Uniformity) imaging performance. The test reticle featured a 20nm contact hole pattern with a 40nm pitch. LCDU performance in resist was measured based on representative field correction from wafer bonding. The results indicate that increasing the emphasis on fading for scanner control yields a substantial improvement in LCDU, as scanner trajectories are optimized to mitigate fading parasitic effects. LCDU measurements showed similar to 0.5-nm enhancement.
The release of the 0.55 high-NA EUV scanner significantly improves the resolution and enhances semiconductor manufacturing by enabling the scaling of advanced chip features (up to 1.7x smaller than 0.33 EUV), improving performance and energy efficiency for next-generation chips. More importantly high- NA EUV reduces manufacturing complexity by eliminating the need for multi-patterning processes. Key design changes, like projection optics with an increased NA of 0.55, anamorphic demagnification and central obscuration, result in imaging challenges and opportunities that are unique for EXE scanners. The ImageTuner 2 EXE (ITE2 EXE) Pupil-Mask-Wavefront co-Optimization (PMWO) method is designed to address these challenges and enhance imaging performance by co-optimizing pupil, mask and wavefront together. The ITE2 EXE PMWO process focuses on improving critical imaging parameters such as Normalized Image Log Slope (NILS), Depth of Focus (DOF), exposure dose and reducing aerial image (AI) shift across various scenarios. In addition, the HVM-friendly ITE2 EXE interface provides layer specific, scanner independent recipes. In this paper we will show the patterning results of critical next node DRAM layers exposed on the EXE:5000 scanner in the High-NA demo lab. We will compare the performance with and without PMWO using the ITE2 EXE interface. We will demonstrate the improvement across multiple figures of merit including 15% LCDU improvement and 8% higher scan speed.
The introduction of Extreme Ultraviolet (EUV) scanners into high-volume manufacturing of semiconductor chips required, and enabled, the development of an ecosystem around it, from EUV mask-making to new resist materials, and the corresponding Resolution-Enhancement Techniques (RET) to leverage the new developments. As the industry moves to adopt the new High-Numerical Aperture (High-NA) EUV scanners from ASML, being able to extrapolate the learnings on low-NA EUV to High-NA is critical to accelerating the adoption of High-NA scanners. This paper discusses various RET capabilities and methodologies that were essential in obtaining production-quality reticles as soon as the tool was ready.
The stochastic effect in contact single patterning is one of the primary challenges in extending into sub-40nm pitch with 0.33NA EUV. EUV stochastic defects induced by EUV photon shot noise are known to strongly correlate to image contrast. Mitigation of Mask3D induced contrast fading is one of the key solutions to enable further shrink, while maintaining sufficient defect-free process latitude. Wavefront and pupil co-optimization is designed to compensate the Mask 3D phase error that leads to contrast fading. For application in HVM, the newly developed Pupil/Mask/Wavefront co-optimization gives the best imaging performance while maintaining the illumination efficiency and decreasing the rms wavefront for the final optimal wavefront to ensure there is no negative impact on the rest of the patterns that are not included in the optimization. In this paper, we investigate how to apply Pupil/Mask/Wavefront co-optimization to improve the image contrast of a sub-40nm pitch contact hole array, including in-resist verification. We will first explain the fundamentals of Mask 3D fading mitigation via phase injection for a 1D feature and how to extend this concept to 2D features. We will compare the effectiveness of new Pupil/Mask/Wavefront co-optimization versus Zernike Z5 or Z6 only phase injection method. Finally, we will show the potential benefit in combination with using a low-n phase shifting mask for which the optimum image contrast is achieved with the co-optimized wavefront, pupil and mask.
With the adoption of extreme ultraviolet (EUV) lithography for high-volume production of advanced nodes, stochastic variability and resulting failures, both post litho and post etch, have drawn increasing attention. There is a strong need for accurate models for stochastic edge placement error (SEPE) with a direct link to the induced stochastic failure probability (FP). Additionally, to prevent stochastic failure from occurring on wafers, a holistic stochastic-aware computational lithography suite of products is needed, such as stochastic-aware mask source optimization (SMO), stochastic-aware optical proximity correction (OPC), stochastic-aware lithography manufacturability check (LMC), and stochastic-aware process optimization and characterization. In this paper, we will present a framework to model both SEPE and FP. This approach allows us to study the correlation between SEPE and FP systematically and paves the way to directly correlate SEPE and FP. Additionally, this paper will demonstrate that such a stochastic model can be used to optimize source and mask to significantly reduce SEPE, minimize FP, and improve stochastic-aware process window. The paper will also propose a flow to integrate the stochastic model in OPC to enhance the stochastic-aware process window and EUV manufacturability.
Despite being crucial in an optical lithography process, “dose” has remained a relative concept in the computational lithography regime. It usually takes the form of a percentage deviation from a pre-identified “nominal condition” under the same illumination shape. Dose comparison between different illumination shapes has never been rigorously defined and modeled in numerical simulation to date. On the other hand, the exposure-limited nature of EUV lithography throughput demands the * illumination shape being optimized with the physical dose impact consciously taken into consideration. When the projection pupil is significantly obscured (as in the ASML EXE high NA scanner series), the lack of a proper physical dose constraint may lead to suboptimal energy utilization during exposure. In this paper, we demonstrate a method to accurately model the physical dose in an optical lithography process. The resultant dose concept remains meaningful in the context of a changing illumination pupil, which enables co-optimization of imaging quality and a throughput metric during the Source-Mask Optimization (SMO) phase, known as the Dose-Aware SMO. With a few realistic test cases we demonstrate the capability of Dose-Aware SMO in terms of improving EUV throughput via reducing the effective exposure time, in both regular and obscured projection systems. The physical dose modeling capability in computational lithography not only addresses those immediate challenges emergent from EUV throughput, but also opens the gate towards a broad class of exciting topics that are built upon physical dose, such as optical stochastic phenomena and so on.
The EUV High-NA scanner brings innovative design changes to projection optics, such as introducing center obscuration and the anamorphic projection optical system in the projection optics box (POB) to improve the system transmission while the NA is improved1 . These design changes need to be accounted for in the computational lithography software solutions, to ensure accurate modeling and optimization of the High-NA system performance on wafer. In this paper, we will systematically investigate the benefits of Source Mask Optimization (SMO) and mask only optimization to explore EUV High-NA full chip patterning solutions, where mask 3D effects (M3D) are captured in the optical modeling. The paper will focus on assessing the performance (including process window, depth of focus, normalized image log slope) of through-pitch 1D Line/space (L/S) patterns and 2D Contact/Hole (CH) patterns after aforementioned optimizations and demonstrate the impact of center obscuration on imaging. In addition, we will investigate the effect of sub-resolution assistant feature (SRAF) on High-NA patterning via comparing the optimized lithographic performance with and without SRAF. These findings will help determine the most optimal patterning solutions for EUV High-NA as we move towards the first High NA EUV insertion. The paper will also discuss the anamorphic SMO where MRC and mask description needs to change from wafer plane (1x1) to scaled reticle plane (1x2). The interfield stitching will also be briefly discussed in this paper.
An increased interest to stitching for High NA EUVL is observed; this is driven by expected higher demand of larger size chips for various applications. In the past a recommendation was published [1] to have 1-5 um band where no critical structures of a High NA layer would be allowed. In [2], we have introduced new insights on at-resolution stitching. In this publication, we present new experimental results obtained on NXE:3400B scanner. In the past we showed NXE feasibility results of vertical lines and contact holes stitching at relaxed resolution (40-48 nm pitch) in a single wafer location. In this study we evaluate stitching behavior through slit at more aggressive resolutions (P36 and P24 lines / spaces). We provide an overview of interactions in the stitching area such as aerial image interactions, absorber reflection, absorber to black border transition, black border vicinity impact and show corresponding experimental and simulations results. We formulate initial requirements for black border edge placement control and show performance of new masks. For stitching with low-n masks, we discuss using sub-resolution gratings to suppress the elevated mask reflectivity. We show rigorous simulations of stitched images, its sensitivity to overlay errors and propose mitigation mechanisms for OPC. Finally, an overview of stitching enablers will be described: from improved reticle black border position accuracy and absorber reflectivity control to mask resolution and OPC requirements.
Advancing technology nodes in CMOS Image Sensors (CIS) continues to drive a shrinking process to acquire higher resolution and low power consumption as well as more cost-effective production. With the sensor pixel size scaling down, a thicker photoresist (with aspect ratios greater than 10:1) is introduced to block high-energy implants with extremely localized implant profiles. Then double exposures/double focus (DE/DF) is applied to make sure the resist profile and process window is comparable or better. However, this process is a big challenge at high volume manufacturing (HVM) phase because of throughput loss. To recover it due to DE/DF, we invented SE MFI which uses two wavelengths (“colors”) generated by the KrF excimer laser to solve the problem. Due to the chromatic aberrations in the lens, the focal plane shift of different wavelength produces nearly the same result as DE/DF. However, the use of two-wavelengths brings some challenges. The first is the loss of image contrast and the second is the impact of chromatic aberrations across the slit which results in image shift and image asymmetry. In this work, we demonstrated that the use of ASML’s Tachyon KrF MFI source mask optimization (SMO) that can match the MFI SE process to DE/DF process of record (POR). We first used Tachyon Focus-Exposure Modeling plus (FEM+) to calibrate a DE resist model by using DE POR wafer data. Then we converted the DE model to a SE MFI model. At the end, we use the Tachyon MFI-SMO to optimize the SE MFI to match the DE/DF and MFI sidewall profiles through process window conditions at the center slit. We achieved making the MFI and DE/DF sidewall difference significantly smaller than other noises which can be measured on wafer at the center slit. We evaluated the chromatic aberration impact on through slit sidewall profiles also meet the specification. The through slit matching between MFI and DE/DF was further improved by through-slit mask optimization. This is done by inserting asymmetry sub resolution assist features (SRAFs). Tachyon Optical Proximity Correction plus (OPC+) can support full chip mask corrections for full-chip HVM. The above MFI technology including Tachyon optimization capability will be verified by wafer exposure via comparison between MFI and DE wafer results.
Background: A unique extreme ultraviolet (EUV-) scanner with a high numerical aperture (NA) of 0.55 was designed to enable printing of resolution lines with 8 nm half-pitch in a single exposure. The introduction of a central obscuration in the optics design reduces the angular load on the multilayer mirrors, enabling a high transmission and throughput. The central obscuration area has been minimized for best imaging, overlay, and transmission. Aim: The wavefront is only available in the non-obscured area. This raises the question of how to describe such a wavefront. Approach: We discuss the choice of fringe-Tatian basis functions to represent the wavefront for an obscured pupil. To make this choice, one needs to balance mathematical correctness while maintaining a simple and intuitive description. Results: We provide a detailed analysis for selecting basis functions that are adequate to describe measured wavefronts on the non-obscured part of the pupil. This statement is supported by imaging simulations. A fast and stable evaluation of the chosen basis functions is presented. An adapted definition of the wavefront root-mean-square deviation for these functions is proposed; it has the advantage of being simple and independent of the number of basis functions used. Conclusions: Because of the benefits of the proposed representation, the community is encouraged to use the same formalism. (c) 2022 Society of Photo-Optical Instrumentation Engineers (SPIE)
Source-mask optimization and EUV mask structure optimization are studied to maximize DOF and NILS for honeycomb hole arrays at 0.55NA. Optimization flow on mask structure conditions for good and stable NILS performance, such as peak-NILS, NILS-DOF, and NILS-MEEF, is proposed to minimize the local CD variation as a result of EUV mask properties. Using NILS metrics, the absorber thickness and the mask CD with optimized illumination conditions are determined for the maximum performance, together with the tolerance of absorber thickness and mask CD. EUV binary absorbers using high-n/mid-k and low-n/high-k materials, and EUV PSM absorbers using low-n/low-k and highreflectance materials, are compared for 28-, 26-, and 24-nm honeycomb hole arrays.
Wafer topography becomes more complex in post-gate transistor gate implantation layers from applications exposed by KrF/ArF DUV systems where bottom anti-reflection coatings are undesired. We simulate and analyze the topography impact from wafer stack on lithography imaging using a rigorous method using both planewaves and sector pupils. Response of imaging formation to polarizations, geometries and overlay are particularly addressed. Waveguiding effects with mode excitation are also explained. Understanding these influential factors benefits the imaging performance in terms of resist edge stability and placement error, providing constructive inputs for optimizations.