The reliability of complex interconnect structures at all levels of the chip integration hierarchy has become a major concern due to the use of fine feature sizes, diverse materials, and complex 3D architectures. Reliability issues range from stress related failures such as dielectric cracking and interface debonding during manufacturing to electrical and mechanical failures such as electromigration and void formation during operation. This paper summarizes computational results obtained using a unified physics-based 3D simulation framework.

In this paper, we study the impacts of proximity effects on the electrical characteristics I-d-V-g and the static noise margin of a six-transistor (6T) bulk complementary metal-oxide-semiconductor (MOS) static random access memory (SRAM) cell using 3-D process and device technology computer-aided design (TCAD) simulations. We show that when a 6T SRAM cell is simulated as a single continuous 3-D structure, effective stresses in channels are reduced due to close proximity of n-channel and p-channel MOS transistors in the cell with respect to simulations of transistors as discrete 3-D structures. Furthermore, we find that doping in channels of SRAM transistors is reduced by well proximity and implant shadowing. Stress and doping proximity effects have opposite contributions to device performance. We estimate the influence of proximity effects for typical 32-nm technology to be more than 10% for certain electrical cell characteristics. We thus conclude that, to accurately predict electrical cell behavior via TCAD simulations, the 6T SRAM cell should be a single continuous 3-D structure, instead of a set of six discrete transistors, which are simulated as individual 3-D devices and connected via a netlist.

In this paper we present a predictive simulation capability for dopant diffusion under anisotropic non uniform stress/strain using two different simulation techniques: continuum and atomistic Kinetic Monte Carlo (KMC). Due to the different nature of these techniques, different implementations have been developed. We explain the necessity and show the details of these implementations. The continuum model uses an anisotropic tensor matrix to simulate the diffusion. For the atomistic model, diffusion is the composition of multiple hops with different rates. For each particle, a different migration rate per axis is used. The value of the rate takes into account the local stress tensor. The stress is also utilized for modeling surface point defect injection and dopant pairing. These models have been included in a TCAD simulator (Synopsys: Sentaurus reference Manual, 3rd edn., [ 2007 ]) as an extension to the already existing models. We show that both continuum and atomistic approaches predict similar behavior for boron diffusion under tensile and compressive stresses in 2D.

Shrinking feature sizes, novel device designs as well as stress engineering increase the need for three- dimensional process and device simulations. We present several application examples for full 3D process and device simulations using Sentaurus TCAD, including a 3D NMOSFET with shallow trench isolations (STI), a PMOSFET device with SiGe pockets for stress engineering (similar to the structure presented in Ref. [1]) and a Omega-FinFET (similar to structures presented in Refs. [2,3]). TCAD simulations of the full process flow as well as of the electrical device characteristics are performed. We also show examples of 3D oxidation simulations with Sentaurus Process.