In this paper, we describe the design considerations, the 70-nm GaN process and measurement results of three advanced upper D-band PA MMICs. Starting with a 5-stage baseline design that uses one output transistor, we develop a 2-way and 4-way power combined version using both reactive power combining and a directional coupler and compare their results. The 2-way MMIC PA2 delivers up to 22.2 Bm at 145 GHz and a PAE of up to 7.6 %. Moreover, the 4-way MMIC PA3 delivers up to 23.1 dBm at both 140 and 145 GHz with an associated PAE of up to 4.9 %. Compared to the state of the art, these values are on par with or exceed any GaN-based PAs reported so far.

This work reports on the fabrication of vertical GaN FinFETs on a sapphire substrate. The FinFET concept allows for realizing normally-off transistors with dense multi-channel structures. However, using time-consuming e-beam lithography represents an obstacle to effective device production at a wafer level. Therefore, this work investigates the possibility of creating thin fins at submicrometer dimensions below a width of 200 nm using i-line lithography. Starting with broad fins and thinning them with a wet etch resulted in an undesired shortening of the length of the fins, necessitating structuring the fins with widths significantly below the used wavelength. Our process proves capable of achieving fin widths in the range of 100 nm. The FinFETs consist of at least 100 fins and exhibit a maximum averaged threshold voltage (V-th) of (0.90 +/- 0.10) V. V-th displays the expected parabolic decrease with increasing fin width, becoming negative at around 400 nm. The contributions of the accumulation channel and the bulk fin are distinguished in the transconductance profile. Small-signal RF characterization of a device featuring a fin width of 370 nm shows maximum values of f(t) = 3.3 GHz and f(max) = 5.2 GHz.

We report on the development of the co-integration of a common lateral HEMT (high-electron mobility transistor) technology with vertical GaN devices based on a CAVET (current aperture vertical electron transistor) design on the same chip/die. Process and device design parameters are discussed and optimized. Large-area vertical devices with drain-currents/breakdown-voltages of up to 20 A/250 V and lateral devices with breakdown voltages VDS > 30 V are demonstrated on the same die and subsequently diced and packaged. Finally, multi-pulse tests in a double pulse test setup (inductive load) are demonstrated with lateral HEMTs as a gate-driver stage and a vertical CAVET with maximum drain current >4 A at 250 kHz and VIN = 40 V on a total chip area of 3 mm 2 , This work demonstrates a technology platform for a direct integration of vertical GaN power devices with lateral functionality.

This work focuses on the recent developments of lateral GaN-HEMTs for the 1200 V class. Results of GaN-on-Si and GaN-on-SiC technology with static off-state voltages of over 1200 V and low areaspecific on-state resistances are presented. The switching performance is demonstrated by a GaN-on- Si power device in a double-pulse setup with a voltage up to 1100 V and a static specific resistance of RON·A = 2.5 mOmega·cm(exp 2). The results are compared with state-of-the-art devices and technologies. In addition, economic aspects of GaN technologies on Si and highly insulating substrates are discussed.

In this article, we present a gallium nitride (GaN) power amplifier (PA) monolithic microwave integrated circuit (MMIC) and waveguide module that cover the full D-band (110-170 GHz) with a state-of-the-art performance. On-wafer measurements of the balanced ten-stage GaN PA show a small-signal gain of more than 13 dB over the full D-band and a peak output power of 22.6dBm at 160 GHz. A two-way waveguide module delivers more than 18.5dBm of output power over the full D-band with a peak of 25dBm at 120 GHz. To the best of our knowledge, the reported amplifiers show the highest output power within GaN-based circuits beyond 140 GHz. This is also the first demonstration of GaN PAs covering the full D-band.

The fin field-effect transistor (FinFET) is a promising candidate among vertical GaN-based transistors as it is inherently unipolar and requires neither p-type doping nor regrowth processes [1 , 2] . While commonly regarded as a high power device, recent research has started to explore its potential as a high frequency transistor [3 , 4] . In our previous work, we demonstrated a small-signal current gain of f t = 10.2GHz for a FinFET with 20 fins [4] . More recently, we presented our investigations on the scaling of the fin length and its influence on the small-signal performance based on FinFETs processed on 3 inch sapphire substrate [5] . In this work, we expand our studies to investigate the scaling effect of the number of fins in FinFETs, and report new record values for the maximum frequency of oscillation f max for vertical GaN transistors.

This work shows the co-integration of the lateral GaN technology with a vertical power device, the current aperture vertical electron transistor (CAVET). The experimental proof-of-concept of a large-area CAVET power device controlled by a lateral HEMT push-pull driver stage with current sensing using a sense-CAVET is demonstrated in a double-pulse measurement setup at 40 V, up to 2.4 A, and 500 kHz. The current is mirrored via a sense-CAVET with a small gate width and converted with a transimpedance amplifier. The response time of the current measurement is approx. 60 ns. In addition to the switching waveforms, static measurements of the vertical and lateral devices and switching waveforms are shown. Thus, this GaN CAVET technology demonstrates the possibility of monolithic lateral device integration compared to other vertical device approaches and may enable future vertical GaN power ICs.

AlScN/GaN epitaxial heterostructures have raised much interest in recent years, because of the high potential of such structures for high-frequency and high-power electronic applications. Compared to conventional AlGaN/GaN heterostructures, the high spontaneous and piezoelectric polarization of AlScN can yield to a five-time increase in sheet carrier density of the two-dimensional electron gas formed at the AlScN/GaN heterointerface. Very promising radio-frequency device performance has been shown on samples deposited by molecular beam epitaxy. Recently, AlScN/GaN heterostructures have been demonstrated, which were processed by the more industrial compatible growth method metal-organic chemical vapor deposition (MOCVD). In this work, SiN x passivated MOCVD-grown AlScN/GaN heterostructures with improved structural quality have been developed. Analytical transmission electron microscopy, secondary ion mass spectrometry and high-resolution x-ray diffraction analysis indicate the presence of undefined interfaces between the epitaxial layers and an uneven distribution of Al and Sc in the AlScN layer. However, AlScN-based high-electron-mobility transistors (HEMT) have been fabricated and compared with AlN/GaN HEMTs. The device characteristics of the AlScN-based HEMT are promising, showing a transconductance close to 500 mS mm −1 and a drain current above 1700 mA mm −1 .

This paper presents a X4 frequency multiplier MMIC realized in the IAF 50 nm mHEMT technology. It consists of two cascaded frequency doublers followed by an amplifier and was designed for an output frequency range from 70 to 82.5 GHz. This corresponds to a bandwidth of 12.5 GHz or 16.4 %. The MMIC achieves a relatively flat output power of 9.5 dBm with a variation of only ± 0.4dB. The unwanted harmonics were suppressed in the output spectrum by more than 52 dBc.

In this work, the off-state characteristics of AlScN/GaN high electron mobility transistors (HEMTs) grown by metalorganic chemical vapor deposition (MOCVD) were studied and directly compared to an AlGaN- and an AlN-HEMT grown in the same MOCVD. Pinch-off instability and leaky capacitive measurements were observed for AlScN-based HEMTs, which was correlated with a higher ideality factor and lower effective potential barrier height than the AlGaN and AlN-HEMTs. However, the reverse bias characteristics exhibited a sudden drain-current increase without a significant increase in gate-leakage current. The drain-leakage current is assumed to be related to a parasitic channel across the AlScN-barrier as a result of trap-assisted carrier transport with a Poole–Frenkel characteristic. The demonstrated pinch-off instability led to significant gain expansion in load-pull measurements and early soft-breakdown, which, in turn, limits the achievable voltage-margin. The results demonstrate a key issue to reveal the full potential of AlScN-based HEMTs for mm-wave applications.

Growth of AlScN high‐electron‐mobility transistor (HEMT) structures by metal–organic chemical vapor deposition (MOCVD) is challenging due to the low vapor pressure of the conventionally used precursor tris‐cyclopentadienyl‐scandium (Cp 3 Sc). It is shown that the electrical and structural characteristics of the AlScN/GaN heterostructure improve significantly by using bis‐methylcyclopentadienyl‐scandiumchloride ((MCp) 2 ScCl), which has a higher vapor pressure and allows for an increased molar flow and thus higher growth rate (GR). AlScN/GaN HEMT heterostructures with superior electrical characteristics deposited at different barrier growth temperatures are presented. The sheet resistance of 172 Ω sq −1 obtained at 900 °C barrier growth temperature is among the lowest reported so far for AlScN/GaN HEMT structures. The sheet charge carrier density is and the electron mobility μ is 1124 cm 2 Vs −1 .

In this paper, we outline the current state of the art and trends for future development in millimeter-wave (mmw) amplifiers based on gallium nitride (GaN) semiconductors. To that end, we give an overview of recent technological results of currently operational GaN foundries and classify them with respect to their maximum frequency of operation and the current-gain cutoff frequency. Furthermore, focusing on frequencies above 80 GHz, we develop a comprehensive survey of GaN high-power amplifiers (HPAs) and provide a comparison to competing technologies such as indium phosphide (InP) and silicon germanium (SiGe). We also introduce a newly developed 6-stage GaN amplifier that is targeted towards the upper D-band. It provides an output power of up to 22.0 dBm, which sets a new record for GaN HPAs in this band. From our survey, we find that while GaN exhibits an impressive power density, its gain and efficiency characteristics particularly beyond 120 GHz still warrant improvement. Therefore, we describe several areas of future improvement such as the gate module scaling, mitigation of trapping phenomena and recent trends in processing of ohmic contacts and alternative epitaxial stacks. With these further developments, more widespread adoption of GaN-based technologies at even higher frequencies seems feasible in the coming years.

This work presents the design, fabrication, and measurements of a GaN-HEMT with a back-gated segment and pull-down pin in a GaN-on-Si technology. The device is designed for the use in high voltage cascodes. The static and dynamic characteristics of the device is demonstrated in a three-stage hybrid cascode assembly. The cascode was measured with a blocking voltage up to 1250 V.

In this work, a comprehensive study on the performance of AlGaN/GaN high-electron-mobility transistors (HEMTs) regrown on Mg-implanted layers is shown. A comparably sharp doping profile into regrown AlGaN/GaN-stacks was verified by secondary-ion mass spectrometry (SIMS) even at standard metal–organic chemical vapor deposition (MOCVD) temperatures above 1000 °C. Static and dynamic characterization by a full 100-mm wafer map exhibited neither an impact on the threshold voltage, transconductance nor on the saturation current even for channel thicknesses as low as 150 nm. Slight current collapse was observed at high OFF-state conditions with large recovery times above 5 s indicating rather slow traps from the nonconnected p-GaN. Within the leakage current, three different mechanisms were identified across the vertical epi-stack. While variable-range hopping (VRH) dominates below ${V}_{{\text {DS}}}$ = 35 V, the Pool–Frenkel emission (PFE) was identified for ${V}_{{\text {DS}}} >35$ V. At high electric fields ( ${E} >$ 1 MV/cm), the devices revealed either a direct change from PFE to drain-induced barrier lowering (DIBL) or a change from PFE to space-charge-limited currents (SCLCs) to DIBL was observed. The device results demonstrate the feasibility of the demonstrated process for reproducible device fabrication on large-scale wafers with low channel thicknesses for future device developments of CAVETs, SJ-HEMTs, p-GaN back gates, and intrinsic body diodes.

This work demonstrates an integrated multi-stage cascode structure for lateral high-voltage transistors in a GaN-on-SiC power technology. The functional principal, the intrinsic device structure and the extrinsic chip layout is presented and is investigated. The fabricated device demonstrator features a breakdown measurement up to 1000 V, an maximum on-state current of ID,MAX = 10 A, and on-state resistance of about RON = 1 Omega.

Among the vertical GaN transistors, the FinFET is an unipolar device which therefore neither needs p-type doping nor regrowth processes [1]. Large area devices with currents of several amperes and high breakdown voltages beyond 1 kV were presented [2], [3]. So far, the FinFET has been investigated as high-power device and only little interest has been given to his potential as high-frequency transistor [4], [5]. Although normally-off FinFETs were realized on expensive bulk GaN substrates, the sole normally-off FinFET on foreign substrate relied on an introduction of p-GaN, thereby relinquishing the unipolar nature of the FinFET and suffering from the low mobility in the p-channel [6]. In this work, we demonstrate the first normally-off quasi-vertical FinFET on SiC substrate with an analysis of its small-signal performance.

In this letter, a vertical GaN power transistor driven by lateral devices fabricated in the same technology is demonstrated. The technology combines a co-integrated large area current aperture vertical electron transistor (CAVET) with high electron mobility transistors (HEMTs) for the realization of the driver on a GaN substrate. The quasi-monolithic integrated driver stage consists of two HEMT devices in a push-pull configuration. The CAVET and HEMTs are characterized, separated, packaged, and measured in a double pulse test setup with inductive load. The voltage signals of the HEMT driver with CAVET are shown in continuous operation up to 5 MHz and extreme duty-cycles. In pulsed operation, switching characteristics and waveforms under load up to 120 V and 4.1 A are shown with turn-on/-off switching times of 17.3/2.8 ns. Finally, this work demonstrates a GaN technology that combines the functional integration of a driver stage with a vertical power transistor and thus opens the pathway to continue lateral GaN power integration in vertical device concepts.

•Monolithic GaN-on-Si power converter ICs require highside device integration.•GaN-on-Si, GaN-on-SOI, and GaN-on-Si with p-n junction enable high-side isolation.•Floating Si, Si p-n junctions, and buried Si oxides form vertical capacitances.•Isolation capacitances increase (SOI, p-n) or decrease (floating) the switching loss.•High-side logic and drivers require a local substrate to switch-node termination.

AlScN/GaN heterostructures with their high sheet carrier density (n(s)) in the two-dimensional electron gas (2DEG) have a high potential for high-frequency and high-power electronics. The abruptness of the heterointerface plays a key role in the 2DEG confinement, and the presence of interlayers (AlN, AlGaN) affects ns and electron mobility (mu) and determines the sheet resistance (R-sh). AlScN/GaN heterostructures suitable for high-electron mobility transistors (HEMT) with and without a nominal AlN interlayer were grown by metal-organic chemical vapor deposition (MOCVD) and characterized electrically and structurally to gain a systematic insight into the unintentional formation and control of graded AlGaN interlayers by diffusion of atoms at the heterointerface. The AlN interlayer increases n(s) from 2.52 x 10(13) cm(-2) to 3.25 x 10(13) cm(-2) and, as calculated by one-dimensional Schrodinger-Poisson simulations, improves the 2DEG confinement. The barrier growth temperature was varied from 900 degrees C to 1200 degrees C to investigate the effect of the thermal budget on diffusion. Growth at 900 degrees C reduces the thickness of the graded AlGaN interlayer and improves the 2DEG confinement, leading to R-sh of 211 Omega/sq, n(s) of 2.98 x 10(13) cm(-2), and mu of 998 cm(2)/(Vs).

This work discusses the status and recent progress of lateral GaN power devices and GaN power ICs. The performance of different discrete power devices is compared by figure-of-merits and by different device characteristics. Furthermore, GaN power ICs are classified regarding its functionality and compared in terms of its switching performance. The recent progress in development of GaN power ICs is exemplified on three generations of demonstrator devices. GaN power ICs in half-bridge configuration are shown in two different highly-compact assembly technologies: PCB-embedding and laser-structured DCB-boards, with multi wire bonding. Further examples of highly-integrated power ICs are shown: as the design of an All-in-GaN power IC, that includes all active components of a converter, a hetero-integrated GaN HEMT on a CMOS wafer by micro transfer printing and finally a three-phase inverter IC with interleaved half-bridges, which enables highly compact servo motor applications.