In this work, we evaluate the quality of a commercially available GaN/AlGaN structure grown on Qromis Substrate Technology using Raman spectroscopy. Using the shift of the E2H peak, we calculated that initially this GaN structure has a lower biaxial stress than commercially available GaN on sapphire. After Cl2/Ar based reactive ion etching, surface damage was evident by an 80% stress increase. However, the implementation of wet alkaline etch treatments using potassium hydroxide and tetramethyl ammonium hydroxide (TMAH) relieved the stress by equal amounts. While these results indicate equivalent recovery between treatments, devices fabricated with a TMAH treatment exhibit superior electrical behavior.

Heterogeneous integration of gallium nitride (GaN) devices is essential to overcome the intrinsic material limitations in advanced electronics. For the successful incorporation of an integration technique into industry, a highly scalable process must be developed. In this work, the heterogeneous integration of GaN high electron mobility transistors (HEMTs) through a micro-transfer printing process is demonstrated. This scalable technique involving HEMTs fabricated on commercially available and CMOS-compatible 8″ GaN on engineered substrate resulted in a high (>95%) transfer success rate and limited device degradation. Transfer was demonstrated to multiple adhesion layers, including copper tape and KMSF 1000 photo-dielectric. The limited degradation that was observed is attributed to a change in stress after transfer, as measured by the Raman spectroscopy. Finally, the viability of the adhesion layer for use in harsh environments was tested. No delamination, significant outgassing, or degradation of electrical properties were observed when the sample was placed under a vacuum or when the temperature was varied between 8 and 473 K. This makes the process an ideal choice for systems intended for space applications.

GaN devices play a major role in modern electronics, providing high-power handling, efficient high-frequency operation, and resilience in harsh environments. However, electric field crowding at the edge of the anode often limits its full potential, leading to single-event effects (SEEs) at lower bias voltages under heavy ion radiation. Here, we report on the performance of homojunction GaN vertical PiN diodes with a hybrid edge termination design under heavy ion irradiation, specifically, oxygen ions, chlorine ions, Cf-252 fission fragments, and alpha particles from an Am-241 source. The unique hybrid edge termination (HET) design provides better electric field management, preventing breakdown from occurring at the edge of the anode at lower voltages. The results of this study reveal that these devices exhibit excellent tolerance to 12-MeV oxygen and 16-MeV chlorine ions, owing to their low linear energy transfer (LET) and range in GaN. However, single-event burnout (SEB) is observed during the Cf-252 exposure at about 50% of the diodes' electrical breakdown voltage due to the presence of higher LET and longer-range ions. Optical and scanning electron microscopy (SEM) reveal that the damage that caused by SEB lies close to the center of these devices rather than the anode edge. Devices with junction termination extension (JTE) instead of HET edge termination also show similar SEB when irradiated with Cf-252 fission fragments. Physical damage due to SEB occurs at the edge of the anode for these devices. These comparative results show the benefits of HET for enhancing the resistance of GaN-based PiN diodes to heavy ion irradiation.

Vertical gallium nitride (GaN) power devices continue to garner interest in multiple power conversion applications requiring a medium-voltage (1.2 – 20 kV) capability. Currently, silicon carbide (SiC) is addressing this voltage range, however, with a comparable critical electric field and superior mobility, GaN is expected to offer advantages in applications where fast switching and avalanche breakdown response times are desired. While uses in electric vehicles, solid-state transformers, and renewable energy conversion are being actively explored, the potential of a vertical GaN device for electric grid protection in the form of an electromagnetic pulse arrestor is a unique proposition that requires very fast transient capabilities (<1 µs pulse widths with rise-times on the order of 10 ns). However, vertical GaN devices are significantly less mature than present SiC offerings. Specifically, low-doped, thick epitaxial growth of GaN via metal-organic chemical vapor deposition (MOCVD) still presents many challenges, and advancements in processing, manufacturability, and failure analysis are needed. In this work, we describe our efforts to address the above issues and advance the state-of-the-art in vertical GaN PN diode development. We have successfully demonstrated an MOCVD-grown, 50 µm thick, low-doped (<10 15 cm -3 ) drift region on a GaN substrate that was processed into relatively large-area (1 mm 2 ) PN diodes capable of achieving a 6.7 kV breakdown. Temperature-dependent breakdown was observed, consistent with the avalanche process. The devices consisted of a 4-zone step-etched junction termination extension (JTE), where the breakdown region was visualized via electroluminescence (EL) imaging. Ongoing work aims to scale the current capability of the medium-voltage diodes through a parallel interconnect design that negates defective or poor performing diodes. Further investigation of edge termination structures was explored using a bevel approach, where we studied the relationship between the bevel angle and p-doping. It was found that a very shallow angle of only 5° accompanied by a 500 nm p-region consisting of 3×10 17 cm -3 Mg concentration resulted in a consistent 1.2 kV breakdown for an 8 µm thick, 1.6×10 16 cm -3 doped drift region. EL imaging confirmed uniform breakdown, and temperature dependence was demonstrated. The bevel approach was then implemented on a diode structure with a 20 µm thick drift region capable of 3.3 kV breakdown, where an unclamped inductive switching (UIS) test was performed to evaluate the impact of a field plate design on avalanche uniformity and ruggedness. A parallel effort to establish a foundry process for vertical GaN devices has been underway. Initially, this focus was on comprehensive studies of GaN wafer metrology using capacitance-voltage (C-V) mapping, optical profilometry, and x-ray diffraction (XRD) mapping. A machine learning algorithm was implemented to identify defective regions and produce a yield prediction for each GaN wafer prior to processing. A hybrid edge termination structure consisting of implanted guard rings (GR) and JTEs was developed in coordination with a controlled experiment that varied the anode thickness, and therefore the remaining p-GaN after implantation. It was observed that thinner p-GaN regions under the JTE/GR region resulted in a significant (>100x) reduction in leakage current under reverse-bias conditions. This process has resulted in 1.2-kV-class devices with up to 18 A forward current for a 1 mm 2 device with a specific on-resistance of 1.2 mOhm-cm 2 . The foundry effort has since been extended to 3.3-kV-class devices that utilize 25 µm thick drift layers with ~2-4×10 15 cm -3 doping. These devices have demonstrated up to 3.8 kV breakdown with leakage currents <1 nA up to 3 kV. More than 40 wafers have been processed to date, resulting in >20,000 devices. Statistical variations in I-V and C-V characteristics will be discussed. Packaging process development and analysis are underway to develop electrical stress procedures and identify fundamental failure mechanisms. Finally, a pulse arrested spark discharge (PASD) setup, capable of up to 15 kV pulsed operation in 100 V steps, was implemented to quantify the time response of avalanche breakdown. Initial results on a packaged 800 V device showed a ~1 ns response time during breakdown, which reinforces the potential EMP grid protection applicability. This work was supported by the ARPA-E OPEN+ Kilovolt Devices Cohort directed by Dr.Isik Kizilyalli. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy of the United States Government.

Foundry compatible vertical GaN PiN diodes were fabricated. The devices investigated in this work are based on 8 um drift layer thickness to achieve ∼1.2 kV of voltage blocking. Three different anode doping levels were fabricated on three wafers with the same p-layer thickness, and planar hybrid edge termination. The moderate anode doping level of 1 × 10 18 cm −3 has achieved the highest breakdown voltage of 1.2 kV and its temperature-dependent breakdown behavior proved an avalanche behavior. Furthermore, our electroluminescence displayed the breakdown at the edge of the anode. Our simulation results imply an improvement in the field management with moderate anode doping.

To improve the manufacturing process of GaN wafers, inexpensive wafer screening techniques are required to both provide feedback to the manufacturing process and prevent fabrication on low quality or defective wafers, thus reducing costs resulting from wasted processing effort. Many of the wafer scale characterization techniques—including optical profilometry—produce difficult to interpret results, while models using classical programming techniques require laborious translation of the human-generated data interpretation methodology. Alternatively, machine learning techniques are effective at producing such models if sufficient data is available. For this research project, we fabricated over 6000 vertical PiN GaN diodes across 10 wafers. Using low resolution wafer scale optical profilometry data taken before fabrication, we successfully trained four different machine learning models. All models predict device pass and fail with 70–75% accuracy, and the wafer yield can be predicted within 15% error on the majority of wafers.

Vertical power devices require significant attention to their edge termination designs to obtain higher breakdown voltages without substantial increase in ON-state resistance. A simple edge termination structure for a GaN p-n diode is proposed, comprising a full layer lightly doped p-type GaN region underneath the higher doped ${p} +\!+$ contact layer. A TCAD model of the device is developed, and removal of the portions of ${p}$ ++ cap outside of the device active area in simulations is shown to increase the device blocking voltage capability. It causes the depletion width to increase in the lightly doped p-type layer and allows it to act similar to a junction termination extension (JTE). These predictions are validated empirically, resulting in a 52% measured increase in breakdown capability after selective removal of the ${p}$ ++ cap. This simple edge termination technique can be formed with only a single low-energy nitrogen implant or etching procedure, greatly increasing its manufacturability over more complex structures. Design optimization studies are pursued in TCAD to determine optimal parameter values for further improving breakdown performance. It is shown that the proposed edge termination technique can be employed to produce future high voltage vertical GaN devices without a significant gain in ON-state resistance and with wide tolerance to process variations.

A simplified edge termination technique for vertical GaN diodes is proposed based on different studies through Sentaurus TCAD (Synopsys) simulations. The proposed model is verified experimentally by fabricating the 1.3 kV GaN vertical diode. The switching characteristics of this vertical GaN diode are investigated by simulating a model of the diode in a Double-Pulse Test (DPT) Circuit using SaberRD. The simulation results are compared to the switching characteristics of a comparable commercially available Si diode. Comparison of reverse recovery characteristics demonstrates that the vertical GaN diode has lower turn-off loss.

To improve the manufacturing of vertical GaN devices for power electronics applications, the effects of defects in GaN substrates need to be better understood. Many non-destructive techniques including photoluminescence, Raman spectroscopy and optical profilometry, can be used to detect defects in the substrate and epitaxial layers. Raman spectroscopy was used to identify points of high crystal stress and non-uniform conductivity in a substrate, while optical profilometry was used to identify bumps and pits in a substrate which could cause catastrophic device failures. The effect of the defects was studied using vertical P-i-N diodes with a single zone junction termination extention (JTE) edge termination and isolation, which were formed via nitrogen implantation. Diodes were fabricated on and off of sample abnormalities to study their effects. From electrical measurements, it was discovered that the devices could consistently block voltages over 1000 V (near the theoretical value of the epitaxial layer design), and the forward bias behavior could consistently produce on-resistance below 2 mΩ cm2, which is an excellent value considering DC biasing was used and no substrate thinning was performed. It was found that high crystal stress increased the probability of device failure from 6 to 20%, while an inhomogeneous carrier concentration had little effect on reverse bias behavior, and slightly (~ 3%) increased the on-resistance (Ron). Optical profilometry was able to detect regions of high surface roughness, bumps, and pits; in which, the majority of the defects detected were benign. However a large bump in the termination region of the JTE or a deep pit can induce a low voltage catastrophic failure, and increased crystal stress detected by the Raman correlated to the optical profilometry with associated surface topography.

Low ON-resistance and high breakdown voltage, made possible by improved critical electric field and mobility, has promoted GaN from a potential to the most promising semiconductor material for use in the next-generation of medium- and high voltage-power converters. The commercial availability of large area substrates, produced by HVPE (Hydride Vapor Phase Epitaxial, a quasi-bulk deposition technique) and ammonothermal bulk growth method, provides wafers with reduce concentrations of extended defect, allows the deposition of electronic grade epitaxial films and the realization of high performance electronic devices. Despite that, many steps of substrate preparation, such as miss-cut orientation and surface finishing, must be improved and standardized to yield reproducible epitaxial film growth. To verify the importance of substrate characteristics on the intrinsic properties of homoepitaxial MOCVD films, we initially evaluated substrate provided by various commercial supplies. The substrate effects on epi morphology, uniformity, and impurity incorporation were substantiated by growing simultaneously on wafers from different vendors. The goal of this work is to detect and identify defects in GaN substrates with a series of quick, non-destructive, inexpensive techniques with capabilities of mapping whole wafers. All evaluated substrates had nominally similar as-received specifications (resistivity, thickness, off-cut angle, bow, surface finish). The substrates were evaluated with a variety of techniques including Raman spectroscopy, photoluminescence, white light interferometry, and Nomarski imaging, enabling the detection of different concentrations of grain boundaries, impurities, point defects, v-shaped pits, polishing defects, crystal stress damage, and non-uniform insulating and conductive regions. The substrates can be grouped in two different categories: those with uniform characteristics, including carrier concentration, and those without. Comparing these results to those from homoepitaxial growth on the same wafers, the effects are both subtle and overt. Macroscopic surface morphology, which has shown a direct correlation to leakage current, copies and exaggerates that of the underlying substrate. Photoluminescence of the homoepitaxial surface along with Raman spectroscopy show that non-uniformities in the substrate carrier concentration can continue into the epitaxy. If time permits, results from vertical Schottky diodes, fabricated to quickly evaluate device performance, will presented. While most of the films showed the ability to withstand high electric fields, more uniform electrical properties were observed for those grown on substrates having more uniform properties. These results show that improving bulk substrates is the path to high voltage vertical devices, and that such substrates have a significant influence on device performance. Acknowledgments: Work at NRL is supported by the Office of Naval Research

GaN research is important to the development of next generation power conversion technology because its large Baliga figure of merit GaN gives it the potential to outperform SiC. Presently, commercialized GaN technology is based on lateral high electron mobility transistors (HEMTs); however, large areas would be required for high voltage applications thus there is motive to switch to vertical GaN. Current GaN substrate manufacturing technology is known to produce inconsistent quality with a varying concentration of defects. These defects are known to cause catastrophic device failure, thus there is motive to develop quick, non-destructive techniques to predict the quality of the wafer before undergoing the expensive fabrication process. This talk focuses on using data science and machine learning to predict the quality of the diodes. This work demonstrated that Raman spectroscopy can be used to detect high crystal stress points, which strongly correlates with an increased leakage current. Optical profilometry images can be used to detect defects that cause catastrophic failures; however, the presence of benign defects makes it difficult to predict the device quality using a simple algorithm. Thus, a machine learning algorithm relate optical profilometry images to device performance of subsequently processed device. The results showed that this algorithm was 91% accurate at predicting the forward bias behavior of devices, and it is possible that the devices it could accurately predict failures due to device processing errors. This work was supported by the Office of Naval Research.

GaN vertical PiN diodes with different anode thicknesses were fabricated on three native GaN wafers with the same p-layer doping concentrations, and planar hybrid edge termination. The breakdown behavior in terms of the breakdown voltage and the electroluminescence were studied as functions of the anode thickness. A repeatable avalanche breakdown and highest breakdown voltage were measured with the thinnest anode of 300 nm and with the thinnest edge termination region. This indicates the efficacy of the nitrogen-implanted hybrid edge termination design that comprises of junction termination and guard rings hybrid design. As the anode thickness increases, the edge termination thickness increases, and the devices exhibit lower breakdown voltages and less robust breakdown characteristics, often destructive. From this study, we also conclude that a very high p-layer doping of 2 × 1019 cm−3 is not s practical doping level, because it is too sensitive to the edge termination thickness.

Introduction : Large area GaN power devices are seldom reported to avalanche and the theoretical studies of their edge termination still struggle to match experimental results especially for planar structures. We report for the first time a punch through avalanche on 1.2 kV vertical GaN diode with optimized hybrid edge termination design to fit the device structure. Furthermore, we provide a systematic study that pairs the Sentaurus TCAD simulation to the reverse characteristics of three different anode designs with three different remaining dose in the anode extension region. Device Fabrication: PiN diodes with three different anode doping were fabricated on a non-homogenous GaN substrate. 5×10 17 , 1×10 18 , and 2×10 19 cm -3 Mg-doped layer were grown on a MOCVD lightly doped layer of 8um with doping concentration of the order of 1-2×10 16 cm -3 . The Edge termination process starts with etching a trench 1µm depth and about 140µm from anode edge, followed by isolation nitrogen implant using a box profile with three different energies and total depth of ~650 nm. Finally, the junction termination extension and guard rings (JTE/GR) hybrid is implemented by nitrogen implant to achieve a full planar device structure with final depth of 300 nm. Figure 1 depicts the device structure. The same JTE/GR hybrid implant depth into three different anode doping which results in different residual charge in the extension region thickness that is expected to impact the field management. Experimental Result: Three devices with the different anode doping were tested under identical forward and reverse biases conditions. The three devices display similar forward behavior with ideality factor ranging 2<n<2.2 as shown in Figure 2. Their reverse characteristics however, are varying proportional to the anode doping. The highest breakdown voltage and the sharpest breakdown characteristics was displayed by anode doping of 1×10 18 cm -3 . The other two anode doping devices fail short to achieve the expected breakdown voltage and both devices also exhibit higher leakage than the 1×10 18 cm -3 .. All devices are designed to withhold 1.2 kV, thus 2×10 19 and 5×10 17 cm -3 anode are ~ 500 V away from the targeted value. Considering the fact that these three wafers have the same drift region thickness and doping, and were processed together through the edge termination therefore, the drastic difference in the breakdown voltage can be only explained by the remaining dose in the extension region. To further understand the edge termination efficacy in these devices an avalanche test was conducted, reverse sweep was applied at 25,100,150, &200 °C for all three devices. Figure 3 depicts the avalanche results. Both devices with 1×10 19 and 5×10 17 are struggling to avalanche due to the high leakage and inconsistent trend with temperature. The PiN diode with 1×10 18 cm -3 avalanched with an increase of breakdown voltage 10 V for every 50 °C. This trend of the breakdown with temperature is possible due to the increase in leakage current, consequently a temperature coefficient α= 3.1×10 -4 K -1 was calculated using equation: . To better understand this difference a simulation was conducted using Sentaurus TCAD. The model is designed to observe the behavioral trends thus the absolute numbers in the model do not capture the devices non-idealities. The 2D distribution of the electric field is displayed in Figure 4 for all 3 doing levels. Conclusion: The reverse characteristic and TCAD simulation indicate an improvement in the field management with the decrease in the anode doping to 1×10 18 cm -3 which subsequently means less charges in the edge termination region than the standard 2×10 19 doping level . These results show that the anode dose is a function of anode doping level, implant depth and the edge termination region thickness. To optimize edge termination design one needs to manage the dose in the termination region which is a function of anode doping level, implant depth and the edge termination region thickness. Figure 1

In light of the importance of selective area doping in GaN to enable planar process technology, and to avoid the complications from the etch/regrowth process, ion implantation is the recognizable alternative. Annealing to activate dopant species and repair the damage to a crystal poses a challenge for GaN since the material will decompose to Ga + N-2 at atmospheric pressure and relevant temperatures. In this research, in situ high- and low-temperature epitaxial and ex situ sputtered AlN caps were examined in different stacking arrangements to study the optimum conditions for Mg ion implantation and activation. Concurrently, a matrix of different implantation doses was also investigated to better understand the dose-dependent activation. Each sample has a unique cap stack and four different implant doses, including an unimplanted reference quadrant. The results show that poorer quality cap films enable nitrogen to leave the crystal during annealing and leave nitrogen vacancies behind. Furthermore, a high dose is needed at the surface to facilitate ohmic contact formation. The results suggest that in situ epitaxial-grown AlN caps are more suitable for GaN activation annealing, and high-temperature thin caps provide the best barrier to prevent crystal disintegration. We reveal a timely strategy for preserving the quality of GaN crystal structure during the electrical activation of the ion-implanted Mg atoms. This work provides valuable information that bridges the gap between device processing and electrical characterization of GaN devices, presenting a clear path towards achieving an electrical activation of implanted Mg while maintaining the integrity of the crystalline structure of GaN.

This article reports GaN super-heterojunction Schottky barrier diodes (SHJ-SBDs) with substantially improved performance. Metal-2DEG sidewall n-ohmic contacts were deployed to achieve low contact resistance of $0.75~\Omega ~ \cdot ~mm$ , avoiding the risk of abnormally high contact resistance caused by inaccurate etch depth control. A pGaN notch formed near the cathode successfully eliminated excessive hole conduction caused by the sidewall n-ohmic contact. Isolation was improved by a high-energy Al implantation step. The resulting SHJ-SBD exhibited a breakdown voltage (BV) of ~12.5 kV and a specific resistance of 100.8 $\text{m}\Omega ~ \cdot ~cm^{2}$ .