Introduction GaN’s wide and direct bandgap along with a high breakdown field make it ideal for high-frequency, high-voltage electronics. However, its short minority carrier recombination lifetime ( τ , typically 1 ns) hampers bipolar concepts like PIN diodes and thyristors which would benefit from conductivity modulation. [1] The quantum-confined Stark effect (QCSE) in polar III-N heterostructures creates built-in electric fields that separate carriers, reducing recombination. [2] Here, we present a Monte Carlo (MC) transport model coupled with self-consistent Schrödinger-Poisson (SP) solvers and TRPL measurements to quantify vertical transport and carrier lifetime control, achieving a measured radiative lifetime of 1.2 µs in GaN/AlGaN wide alternating layer (WAL) stacks. Simulation and Experiment We solved SP equations self-consistently for GaN/AlGaN WALs (20–75 nm layers) to extract radiative lifetime as a function of well width and carrier density, accounting for free-carrier screening. Transport was evaluated using an ensemble MC simulator incorporating full band-structure and classical scattering mechanisms. Epitaxial stacks were grown by MOCVD on freestanding GaN with equal thickness n − -GaN/ n − -AlGaN layers (total ~3.6 µm). Most barriers used 4% Al, with select 2% samples for validation. Radiative lifetimes were measured via TRPL using a λ =320 nm Ti:Sapphire laser at 80 MHz. Photocarrier density was varied by attenuating the laser power to achieve a range of 4 orders of magnitude, and decay curves were fitted to a biexponential model to estimate the radiative lifetime. Additionally, mesa-isolated test structures will be fabricated for J-V characterization. Results and Discussion Simulations indicate that without charge screening, lifetime increases monotonically with layer width. However, when accounting for screening, lifetime decreases at widths >40 nm due to carrier redistribution, approaching bulk GaN values (1 ns). High carrier densities further reduce lifetime; at 40 nm, increasing density by an order of magnitude roughly decreases lifetime by the same factor. Despite this, the model predicts maximum lifetimes of 1 µs—three orders of magnitude higher than bulk GaN. To corroborate this, room temperature TRPL measurements were performed. In these measurements, both AlGaN and GaN band edge emission were seen. While the AlGaN peak showed a decay of approximately 1 ns, the GaN signal persists beyond the measurement window, confirming the presence of QCSE in these samples. At a carrier density of 1×10 15 cm -3 , a structure with 40 nm dimensions achieved τ =1.2 µs. MC simulations were used to generate J-E curves to predict vertical transport. The model indicates that forward current density drops sharply as a function of both aluminum barrier height and the number of alternating layers. For a fixed applied field, increasing Al composition from 2% to 10% reduces simulated current density by more than an order of magnitude. Experiments from mesa-isolated test structures are being developed to extract J-V data and compare to our MC simulation approach. A combination of MC, experimental characterization, and TCAD simulation is anticipated to elucidate transport behavior. Electrical measurements will be performed on low-Al-content (>4%) WAL samples to elucidate the trade-off between lifetime control and vertical conductivity. This will enable optimal device designs that minimize barrier Al content and deploy WAL stacks selectively to enable balance of lifetime enhancement with overall vertical conduction. Conclusions We have developed a self‐consistent Schrödinger–Poisson/ensemble Monte Carlo model that simultaneously predicts carrier lifetimes and vertical transport in GaN/AlGaN WAL structures. The lifetime simulations indicate that the QCSE in wide alternating layers can extend radiative lifetimes by orders of magnitude compared to bulk GaN. Time‐resolved photoluminescence measurements confirm these predictions, with TRPL decay curves showing similarly prolonged lifetimes that scale with layer width and excitation density in close qualitative agreement with the model. Electrical testing on mesa‐isolated WAL stacks will be performed to validate the transport component of the simulation. Higher aluminum barrier compositions and additional periods are expected to lead to reduced vertical current, while reducing the Al fraction is anticipated to improve conduction. Together, the lifetime and transport results will guide optimal device designs when employing WAL regions. Guidance on where extended carrier storage is essential and minimal barrier aluminum content should be employed to preserve vertical conductivity will be presented. Future work will focus on refining layer thicknesses, compositions, and device layouts to achieve the best compromise between enhanced carrier lifetimes and efficient current flow for power‐electronic and bipolar applications. Acknowledgements SNL is managed and operated by NTESS under DOE NNSA contract DE-NA0003525 References [1] Bandić et al. , Solid-State Electron. , 2000, doi: 10.1016/S0038-1101(99)00227-0. [2] T. Fujita et al. , Phys. Status Solidi C ,. 2008, doi: 10.1002/pssc.200776584. Figure 1
Gallium nitride (GaN) offers significant advantages in power electronics due to its high electron mobility, high saturation drift velocity, and low relative permittivity, which enable faster switching speeds and lower conduction losses compared to silicon (Si). These properties position GaN as a strong contender against the traditional dominance of Si in the power electronics market, leading to the potential for smaller, lighter, and more efficient power systems. Currently, GaN is predominantly utilized in lateral, unipolar switching applications, particularly in high-electron mobility transistors (HEMTs). However, its implementation in vertical, bipolar switching devices has been limited due to two main challenges: the short minority carrier lifetime, typically around 1 ns, and the difficulty in achieving large-area devices with buried p -type material. Recent advances, such as minority carrier recombination lifetime control through quantum well-induced charge segregation and improved annealing techniques for buried p -type layers in oxygenated environments, have begun to address these challenges. As a result, the development of vertical GaN devices, including thyristors, insulated-gate bipolar transistors (IGBTs), and current-aperture vertical electron transistors (CAVETs), is becoming more feasible. These innovations could significantly expand the potential of GaN in power electronics to include high power pulsed applications as these challenges are overcome. In this work, we describe our efforts to address the challenges of bipolar device development in a III-nitride system. Specifically, the short minority carrier lifetime is being addressed through the use of the quantum-confined Stark effect (QCSE). We demonstrate the ability to “tune” the minority carrier lifetime based on the materials’ inherent polarization properties. Numerical simulations utilizing a Schrödinger-Poisson solver were conducted to predict carrier lifetimes in GaN quantum wells with varying widths, clad with Al .04 Ga .96 N barriers. These predict that the radiative lifetime increases up to three orders of magnitude in the GaN layers as a function of well width and the free carrier concentration. The maximum lifetime was found at a well width of approximately 30 nm, and the lifetime gradually approached the bulk lifetime value of 1 ns at larger well widths. To validate the simulation results, time-resolved photoluminescence (TRPL) measurements were performed on samples of varying well widths and excitation power densities. The TRPL experimental values agreed well with the numerical solution. The longest recorded carrier lifetime was approximately 500 ns for a 40 nm well width, demonstrating the significant potential of QCSE to extend carrier lifetimes in GaN. A parallel effort to address the challenge of activating buried p -type material has been underway. Due to H + binding to the accepter dopant Mg - during metalorganic chemical vapor deposition (MOCVD) growth, the acceptor species is passivated and must be activated by diffusing out the H + . This happens due to three processes: dissociation, diffusion, and desorption. We report on recent advancements annealing in reactive ambients to achieve a higher rate of activation through desorption and thus more uniform and conductive buried p -GaN. This is demonstrated using an oxygen-rich diffusion tube containing N 2 :O 2 =4:1 at 800 °C for 30 minutes, resulting in a fully activated 100 µm-diameter buried pn junction. Additionally, fluorinated annealing ambients are being investigated. We have fabricated full thyristor structures with both p - and n -type drift regions. We will discuss the electrical characterization and a mixed-mode TCAD model that has been developed to inform the gate drive characteristics in the context of predicting performance. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy of the United States Government.
Vertical gallium nitride (GaN) power devices continue to garner interest in multiple power conversion applications requiring a medium-voltage (1.2 – 20 kV) capability. Currently, silicon carbide (SiC) is addressing this voltage range, however, with a comparable critical electric field and superior mobility, GaN is expected to offer advantages in applications where fast switching and avalanche breakdown response times are desired. While uses in electric vehicles, solid-state transformers, and renewable energy conversion are being actively explored, the potential of a vertical GaN device for electric grid protection in the form of an electromagnetic pulse arrestor is a unique proposition that requires very fast transient capabilities (<1 µs pulse widths with rise-times on the order of 10 ns). However, vertical GaN devices are significantly less mature than present SiC offerings. Specifically, low-doped, thick epitaxial growth of GaN via metal-organic chemical vapor deposition (MOCVD) still presents many challenges, and advancements in processing, manufacturability, and failure analysis are needed. In this work, we describe our efforts to address the above issues and advance the state-of-the-art in vertical GaN PN diode development. We have successfully demonstrated an MOCVD-grown, 50 µm thick, low-doped (<10 15 cm -3 ) drift region on a GaN substrate that was processed into relatively large-area (1 mm 2 ) PN diodes capable of achieving a 6.7 kV breakdown. Temperature-dependent breakdown was observed, consistent with the avalanche process. The devices consisted of a 4-zone step-etched junction termination extension (JTE), where the breakdown region was visualized via electroluminescence (EL) imaging. Ongoing work aims to scale the current capability of the medium-voltage diodes through a parallel interconnect design that negates defective or poor performing diodes. Further investigation of edge termination structures was explored using a bevel approach, where we studied the relationship between the bevel angle and p-doping. It was found that a very shallow angle of only 5° accompanied by a 500 nm p-region consisting of 3×10 17 cm -3 Mg concentration resulted in a consistent 1.2 kV breakdown for an 8 µm thick, 1.6×10 16 cm -3 doped drift region. EL imaging confirmed uniform breakdown, and temperature dependence was demonstrated. The bevel approach was then implemented on a diode structure with a 20 µm thick drift region capable of 3.3 kV breakdown, where an unclamped inductive switching (UIS) test was performed to evaluate the impact of a field plate design on avalanche uniformity and ruggedness. A parallel effort to establish a foundry process for vertical GaN devices has been underway. Initially, this focus was on comprehensive studies of GaN wafer metrology using capacitance-voltage (C-V) mapping, optical profilometry, and x-ray diffraction (XRD) mapping. A machine learning algorithm was implemented to identify defective regions and produce a yield prediction for each GaN wafer prior to processing. A hybrid edge termination structure consisting of implanted guard rings (GR) and JTEs was developed in coordination with a controlled experiment that varied the anode thickness, and therefore the remaining p-GaN after implantation. It was observed that thinner p-GaN regions under the JTE/GR region resulted in a significant (>100x) reduction in leakage current under reverse-bias conditions. This process has resulted in 1.2-kV-class devices with up to 18 A forward current for a 1 mm 2 device with a specific on-resistance of 1.2 mOhm-cm 2 . The foundry effort has since been extended to 3.3-kV-class devices that utilize 25 µm thick drift layers with ~2-4×10 15 cm -3 doping. These devices have demonstrated up to 3.8 kV breakdown with leakage currents <1 nA up to 3 kV. More than 40 wafers have been processed to date, resulting in >20,000 devices. Statistical variations in I-V and C-V characteristics will be discussed. Packaging process development and analysis are underway to develop electrical stress procedures and identify fundamental failure mechanisms. Finally, a pulse arrested spark discharge (PASD) setup, capable of up to 15 kV pulsed operation in 100 V steps, was implemented to quantify the time response of avalanche breakdown. Initial results on a packaged 800 V device showed a ~1 ns response time during breakdown, which reinforces the potential EMP grid protection applicability. This work was supported by the ARPA-E OPEN+ Kilovolt Devices Cohort directed by Dr.Isik Kizilyalli. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy of the United States Government.
Wide-bandgap semiconductors have a significant advantage over conventional Si-based electronics by leveraging materials properties to achieve higher breakdown voltage, lower on-resistance, and high-frequency operation. Gallium nitride (GaN) is of interest for vertical device architectures but directly competes with the already established silicon carbide (SiC) power devices. In the case of vertical GaN rectifiers which are unipolar figure-of-merit limited, the materials advantage of GaN provides a modest gain in terms of critical electric field and very slight gains in bulk mobility and saturation velocity, while being at a disadvantage in terms of thermal conductivity compared to SiC. However, despite still being a very immature technology, vertical GaN MOSFETs have demonstrated channel mobilities upwards of 200 cm2/V·s, over three times that of SiC-based MOSFETs. For 1200V-class devices, channel mobility directly contributes to a significant portion of device on-resistance, and it is therefore expected that vertical GaN MOSFETs would offer a substantial performance advantage compared to SiC MOSFETs. Despite this, the development of vertical GaN devices that demonstrate this theoretical potential faces many challenges. Several fundamental limitations exist within the manufacturing process that prohibit GaN devices from directly mirroring the design rules for similar SiC devices. In this talk, we will discuss several key design concepts recently developed for vertical GaN MOSFETs which serve to address several critical issues for GaN. Limitations in selective-area doping for GaN provide an additional challenge in designing edge termination structures, advanced features that protect the gate dielectric during the blocking state, and provides restrictions on minimizing cell pitch. Proper edge termination design is required to reach an avalanche voltage near the theoretical limit and avoid early breakdown. We present an optimized design point for the edge termination with a good match between theoretical and experimental data using a step-etched junction termination extension. Despite a well-designed edge termination, early breakdown will occur in the gate dielectric at the bottom of the gate trench due to field crowding in the dielectric at high blocking voltages. We propose a new method for protecting the gate dielectric by means of a buried field shield formed by an etch-and-regrowth process. Experimental data shows this gate dielectric failure can occur as early as 1/3rd of the designed blocking voltage. The field shield design is shown in simulation to sufficiently reduce the electric field in the gate dielectric to below 4 MV/cm with minimal or no derating of the device depending on geometry of the shield. Additional methods will be presented on new techniques to minimize cell pitch, a critical factor necessary to compete against SiC. Cell pitch minimization not only reduces on-resistance and gate-charge trade-offs, but it is also a driving factor to reduce cost and increase die density on wafer. Finally, techniques have been developed for advanced metal contact designs specific to the trench MOSFET, which further aid in reducing cell pitch. This work was supported by the Electric Drivetrain Consortium managed by Susan Rogers of DOE’s Vehicle Technologies Office. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.
Vertical gallium nitride (GaN) p-n diodes have garnered significant interest for use in power electronics where high-voltage blocking and high-power efficiency are of concern. In this article, we detail the growth and fabrication methods used to develop a large area (1 mm 2 ) vertical GaN p-n diode capable of a 6.0-kV breakdown. We also demonstrate a large area diode with a forward pulsed current of 3.5 A, an 8.3- $\text{m}\boldsymbol \Omega \cdot {\text{cm}}^{2}$ differential specific ON-resistance, and a 5.3-kV reverse breakdown. In addition, we report on a smaller area diode (0.063 mm 2 ) that is capable of 6.4-kV breakdown with a differential specific ON-resistance of 10.2 $\text{m}\boldsymbol \Omega \cdot {\text{cm}}^{2}$ , when accounting for current spreading through the drift region at a 45° angle. Finally, the demonstration of avalanche breakdown is shown for a 0.063-mm 2 diode with a room temperature breakdown of 5.6 kV. These results were achieved via epitaxial growth of a 50- $ \mu \text{m}$ drift region with a very low carrier concentration of $< 1\times10$ 15 cm −3 and a carefully designed four-zone junction termination extension.
GaInN/GaN heterostructures of cubic phase have the potential to overcome the limitations of wurtzite structures commonly used for light emitting and laser diodes. Wurtzite GaInN suffers from large internal polarization fields, which force design compromises ( 0001 ) towards ultra-narrow quantum wells and reduce recombination volume and efficiency. Cubic GaInN microstripes grown at Rensselaer Polytechnic Institute by metal organic vapor phase epitaxy on micropatterned Si , with {111} v-grooves oriented along Si ( 001 ) , offer a system free of internal polarization fields, wider quantum wells, and smaller <00$\bar1$> bandgap energy. We prepared 6 and 9 nm Ga x In 1-x N/GaN single quantum well structures with peak wavelength ranges from 520 to 570 nm with photons predominately polarized perpendicular to the grooves. We estimate a cubic InN composition range of 0 < x < 0.5 and an upper limit of the internal quantum efficiency of 50%. Stripe geometry and polarization may be suitable for mode confinement and reduced threshold stimulated emission.
GaInN/GaN heterostructures in the cubic lattice variant have the potential to overcome the limitations of wurtzite structures as commonly used for light emitting and laser diodes. Wurtzite GaInN (0001), suffers from large internal polarization fields, which force design compromises toward ultranarrow quantum wells and reduce recombination volume and efficiency, particularly in the green, yellow, and red visible spectral regions. Cubic GaInN microstripes on micropatterned Si(001), with {111} V-grooves oriented along Si , offer a system free of internal polarization fields, wider quantum wells, and a smaller bandgap energy. 6 and 9 nm Ga1-xInxN/GaN single quantum well structures are prepared and their emission spectra found to be dominated by the recombination in the cubic wells. The peak wavelength ranges from 520 to 570 nm with a polarization predominately perpendicular to the grooves. These values are about 26 nm longer in wavelength than the equivalent wurtzite sample portions and 40 nm longer than the wurtzite (0001) oriented portions. An alloy composition range of 0.2 < x < 0.3 has been estimated in those cubic portions and quantum efficiency comparable to planar wurtzite structures. The stripe geometry and photon polarization may be suitable for optical mode confinement and reduced threshold stimulated emission.
Current-voltage (IV) characteristics of two AlGaN-based deep ultraviolet (DUV) light-emitting diodes (LEDs) with differing densities of open-core threading dislocations (nanopipes) are analyzed. A three-diode circuit is simulated to emulate the forward-bias IV characteristics of the DUV-LEDs, but is only able to accurately model the lower leakage current, lower nanopipe density DUV-LED. It was found that current leakage through the nanopipes in these structures is rectifying, despite nanopipes being previously established as inherently n-type. Using defect-sensitive etching, the nanopipes are revealed to terminate within the p-type GaN capping layer of the DUV-LEDs. The circuit model is modified to account for another p-n junction between the n-type nanopipes and the p-type GaN, and an excellent fit to the forward-bias IV characteristics of the leaky DUV-LED is achieved.
Electrical current leakage paths in AlGaN‐based ultraviolet (UV) light‐emitting diodes (LEDs) are identified using conductive atomic force microscopy. Open‐core threading dislocations are found to conduct current through insulating Al 0.7 Ga 0.3 N layers. A defect‐sensitive H 3 PO 4 etch reveals these open‐core threading dislocations as 1–2 µm wide hexagonal etch pits visible with optical microscopy. Additionally, closed‐core threading dislocations are decorated with smaller and more numerous nanometer‐scale pits, which are quantifiable by atomic‐force microscopy. The performances of UV‐LEDs fabricated on similar Si‐doped Al 0.7 Ga 0.3 N templates are found to have a strong correlation to the density of these electrically conductive open‐core dislocations, while the total threading dislocation densities of the UV‐LEDs remain relatively unchanged.
Realization of efficient laser diodes with ultra-violet (UV) emission from ~260-360 nm would enable many applications including fluorescence-based biological agent detection, sterilization, and portable water purification. While InGaN-based laser diodes are well developed down to ~370 nm, achieving shorter UV wavelengths requires higher Al-content AlGaN alloys with increasing challenges in achieving p-type doping, strain-management, and low threading-dislocation-density (TDD) AlGaN templates. Given these challenges, few groups have reported AlGaN-based edge-emitting laser diodes (LDs) with emission <; 355 nm.[1, 2] Most recently, random lasing via Anderson localization in AlGaN nanowire structures has demonstrated a novel approach to realizing deep-UV laser diodes.[3].
We fabricated optically pumped and electrically injected ultraviolet (UV) lasers on reduced-threading-dislocation-density (reduced-TDD) AlGaN templates. The overgrowth of sub-micron-wide mesas in the Al0.32Ga0.68N templates enabled a tenfold reduction in TDD, to (2–3) × 108 cm−2. Optical pumping of AlGaN hetero-structures grown on the reduced-TDD templates yielded a low lasing threshold of 34 kW/cm2 at 346 nm. Room-temperature pulsed operation of laser diodes at 353 nm was demonstrated, with a threshold of 22.5 kA/cm2. Reduced-TDD templates have been developed across the entire range of AlGaN compositions, presenting a promising approach for extending laser diodes into the deep UV.