During the fabrication and operation of field-effect transistors (FETs), various stresses generate traps at the dielectric/channel interface and within the bulk material, leading to performance degradation, including increased subthreshold swing (SS) and reduced Ion-off. In this work, we (i) present a universal temperature-scaling principle for SS, validated across multiple thin-body transistor technologies, capturing the full temperature dependence including low-temperature saturation and high-temperature exponential behavior, and (ii) develop a closed-form analytical model that directly extracts the interface trap density from SS(T) measurements. Model predictions are validated through low-frequency noise (LFN) measurements, demonstrating excellent agreement with SS(T)-extracted trap-density. The proposed framework offers a compact and scalable approach for interface trap evaluation across diverse thin-body transistor platforms.

In this work, we report the in-situ high-temperature electrical characteristics of atomic-layer-deposited (ALD) InGaZnO (IGZO) field-effect transistors (FETs). Transfer characteristics of IGZO FETs are measured up to 750 degrees C, where crystallization of the gate dielectric leads to degradation of transistor switching performance. Remarkably, the oxide channel material remains functional, and the FETs exhibit minimal degradation after 90 minutes at 600 degrees C, demonstrating the exceptional thermal stability of channel performance. An unexpected mobility enhancement is observed with increasing temperature. With the peak field-effect mobility (-FE) of 154 cm(2)V(-1)s(-1) at 550 degrees C, this temperature-dependence contrasts with that of conventional single-crystal wide bandgap materials. The mobility enhancement is consistent with our nanocrystalline mobility model, which incorporates grain boundary (GB) scattering. At elevated temperatures, de-trapped defects transition into trapped states that no longer capture carriers, reducing the energy barrier (Eb) at the grain boundaries and enhancing mobility. Furthermore, the contact resistance (Rc) and sheet resistance (Rsh) are reduced by 81% and 72%, respectively, at 600 degrees C. This result underscores the strong potential of ALD oxide semiconductor FETs for Dynamic Random Access Memory (DRAM) and extreme-environment electronics.

The reliability of power electronic converters remains a key bottleneck in electric vehicle (EV) adoption, directly affecting drivetrain longevity and total cost of ownership. Conventional lifetime models evaluate components independently under static thermal conditions, overlooking the coupled and time-varying stresses that dominate real-world operation. In this work, a physics-based degradation framework is developed and experimentally calibrated to capture three layers of a realistic application: (i) coupled component aging induced by self-heating (SH) under shared electrical stress, (ii) thermal cross-talk (TCT) between neighboring components, and (iii) system lifetimes determined by the temperature profiles of EV trips across the U.S. Incorporating SH and TCT results in a 92% reduction in the predicted active lifetime of a DC-DC converter compared to fixed thermal stress model. Integration of the trip profile further extends model applicability, enabling climate-specific lifetime predictions across different U.S. regions. The proposed framework provides a predictive, stress and temperature-aware reliability tool for robust EV power converter design

Low-frequency $(1 / f)$ noise in amorphous-oxide-semiconductor (AOS) TFTs increases as device area scales down, but its origin is obscured by misleading $\mathrm{S}_{\text{ID}} / \mathrm{I}_{\mathrm{D}}{ }^{2}-\mathrm{V}_{\text{OV}}$ slopes. Using ultrathin atomic-layer-deposited (ALD) In2O3 TFTs that span channel degeneracy and contact barriers (2 nm: degenerate, $\varphi_{S B H}<0; 1.2 \text{nm}$: nondegenerate, $\varphi_{S B H}>0$), we combine temperature-dependent $\mathrm{S}_{\text{vg}}$ with Dutta-Horn analysis and cleanly separate two regimes: the 2 nm devices follow tunneling-assisted carrier-number fluctuations $(\Delta N)$ ($\alpha \approx 1$, nearly flat $D\left(E_{\mathrm{a}}\right)$), whereas the 1.2 nm devices exhibit $\alpha<1$ with a redistributed $D\left(E_{\mathrm{a}}\right)$, implicating band-tail-coupled $\Delta N$. Finally, bias- and $L_{c h}$–scaling reveal a transition to contact-noise dominance at high Vov only in the 1.2 nm devices.

Next-generation ultra-thin floating body (Si/Oxide/MoS.) transistors inherently contain a significant number of interface and bulk defects that alter device performance/reliability. Recent studies show that sub-bandgap (SBG) states cause subthreshold swing ($S S$) saturation at cryogenic temperatures, impacting cryogenic applications in aerospace electronics and quantum computing. In this work, we present a fast, optics-free methodology using single pulse charge pumping (SPCP) to extract interface trap density ($N_{\text {it }}$) and SBG density of states (DOS) in ALD-grown ultrathin amorphous-oxide TFTs. First, we validate the high stability and repeatability of SPCP by multi-pulse charge pumping (MPCP). Second, we embed the SPCP-extracted $N_{\text {it }}$ into a physics-based PBTI model, improving the threshold voltage shift ($\Delta {V}_{\text {th }}$) predictions. Finally, we reconstruct SBG-DOS using an SPCP-based extraction framework with hybrid density functional theory (DFT) calculation. We show that post-annealing reduces SBG-DOS in both $\text{In}_{2} \mathrm{O}_{3}$ and IGZO, and the SBG-DOS comprises band tail states and oxygen-vacancy-related deep states ($\text{Vo}^{2+}$ and $\text{Vo}^{0}$). Overall, our work demonstrates that the SPCP framework enables rapid and reliable ${N}_{\text{it}} /$ DOS metrology for next-generation transistors.

Neuromorphic computing reduces the power consumption and inference delay associated with traditional computing. To date, research in this field has focused primarily on developing novel biomimetic architectures, accelerators, and compute-in-memory topologies to enhance classification robustness, particularly for power-constrained Internet of Things (IoT) edge applications. However, edge IoT operates in harsh and unpredictable environments, raising concerns about the reliability of artificial neurons in spiking neural networks (SNNs) and the corresponding loss of classification accuracy. This article aims to bridge this gap by quantifying the reliability of SOI MOSFET-based leaky integrate-and-fire (LIF) neurons and the associated SNN for extreme environment applications, such as low-Earth orbit (LEO) satellites, which function in radiation-prone environments and experience extreme temperature fluctuations that lead to hot carrier stress (HCS). Surprisingly, we find that the combined impact of hot carrier injection (HCI) and radiation damage can counterbalance each other, ultimately improving the survivability of the edge neuromorphic classifier. We conclude by explaining the physical origins of this counterintuitive result, which has significant implications for the use of SNNs in edge IoT applications.

The subthreshold swing (SS) is expected to scale linearly with temperature, SSB=(kBT/q)ln10, yet experimental data from cryogenic UTB (Si, MoS2, and oxide) MOSFETs exhibit anomalous temperature-dependent nonlinearities characterized by negative differential SS and multiple plateaus. Here we use the Landauer formulation to rigorously derive the scaling relationship SS=SSB∙1+γ(TR/T)T/TW to capture the universality and robustness of SS anomalies reported in the literature to date. The temperature scales (TW,TR) are related to the intrinsic properties of the band-tail states and reference current, and as such, can be used as a diagnostic quality monitor of as-fabricated and stress-degraded MOSFET.

Drift and degradation reduce the lifetime and precision of wearable, implantable, and environmental (WIE) electrochemical sensors. Real-time degradation monitoring and isolation of the degradation modes can help improve the design and manufacture of these sensors. Various laboratory-based analytical techniques are available to characterize WIE sensors, but the complex instrumentation, high power requirements, need for frequent calibration, and sample preparation make these techniques unsuitable for real-time degradation monitoring. In this paper, we develop a voltage-pulse-based technique and a corresponding scaling algorithm to measure the transient response and interpret the equivalent circuit of potentiometric ion-selective sensors (ISE) in real time. Our in-field characterization enables monitoring of ISE's bulk and interfacial properties change over time. We validated the approach through simulation and experiments by analyzing the long-term degradation of nitrate ISEs under various stress conditions.

In this work, we investigate the 1/f noise, i.e., low-frequency noise (LFN), characteristics of scaled atomic-layer-deposited indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) focusing on key factors such as: 1) varying indium (In) concentrations; 2) post-thermal annealing; and 3) channel length (L-ch) scaling. Increasing the In ratio from 2:1:1 to 7:1:1 enhances field-effect mobility (mu(FE)) from 11.2 to 36.6 cm(2)/V and reduces LFN by up to 85%, demonstrating the role of In content in improving both electrical performance and noise characteristics. Post-annealing further mitigates LFN, achieving reductions of up to 68%, depending on the IGZO compositions. As L-ch scales down, the dominant LFN mechanism shows a tendency to shift from mobility fluctuations (Delta mu) in long-channel devices (L-ch= 1 mu m) to carrier number fluctuations (Delta n) in short-channel devices (L-ch= 50 nm), as indicated by the distinct dependence of normalized drain-current power spectral density (S-ID/I-D(2)) on gate overdrive voltage. This behavior, supported by LFN measurements at elevated temperatures (similar to 125 degrees C) and bias temperature instability (BTI) analyses, highlights the increasing influence of near-interface traps in scaled devices.

The photovoltaics (PV) technology landscape is evolving rapidly. To predict the potential and scalability of emerging PV technologies, a global understanding of these systems' performance is essential. Traditionally, experimental and computational studies at large national research facilities have focused on PV performance in specific regional climates. However, synthesizing these regional studies to understand the worldwide performance potential has proven difficult. Given the expense of obtaining experimental data, the challenge of coordinating experiments at national labs across a politically divided world, and the data privacy concerns of large commercial operators, a fundamentally different, data-efficient approach is desired. Here, we introduce a physics-guided machine learning (PGML) approach for PV to demonstrate that: (a) the world can be divided into a few PV-specific climate zones, called PVZones, illustrating that the relevant meteorological conditions are shared across continents; (b) by exploiting the climatic similarities, high-quality monthly energy yield data from as few as five locations can accurately predict (with a root mean square error of less than 8 kWh m-2) global yearly energy yield potential at high spatial resolution. Moreover, by homogenizing noisy, heterogeneous public PV performance data, the global energy yield can be predicted with less than 6 % relative error compared to physics-based simulations, provided that the dataset is representative. This novel data-efficient PGML scheme for PV is independent of both PV technology and farm topology, allowing it to adapt seamlessly to emerging PV technologies and farm configurations. The results pave the way for physics-guided, data-driven collaboration between national policymakers and research organizations in developing efficient decision support systems to accelerate PV deployment worldwide.

Over the past decade, the demand for space applications, especially low Earth orbit (LEO) satellites, has increased due to reduced satellite launch costs and emerging markets. This trend requires plastic over traditional ceramic packaging due to its lower size, weight, and cost. Although epoxy mold compounds (EMCs) in plastic packages encapsulate effectively, their reliability under high radiation environments remains a concern. This paper addresses key reliability aspects of plastic encapsulation in space, such as mass loss, surface/ bulk degradation, macro-/microscopic damage, and shielding efficiency. Here, we: (i) irradiated industry-grade epoxy mold compounds (EMCs) under 8 MeV, 100 nA/cm2proton flux, (ii) calculated the effective stopping power and displacement damage in the EMCs due to high energy protons using SRIM tools, (iii) characterized the damage in the EMC through SEM and profilometer analysis, and (iv) suggested a method to qualify EMCs based on satellite mission profile calculated using ESA's SPENVIS tools. Our findings aim to enhance confidence and understanding in using commercial plastic packages for harsh space environments.

Food production, environmental protection, biotechnology, and medicine, all depend on biosensors for measuring specific biological molecules. Among biosensors, enzymatic electrochemical biosensors have received particular attention due to their simple operation and enzymes’ inherent specificity. Researchers have extensively explored novel materials and biological designs to improve performance (i.e., sensitivity, linearity, limit of detection, and response time). However, in comparison, physical and geometrical design has not received the same attention. To this end, we compared platinum (Pt) microelectrodes with circular or fractal geometry with the same surface area (2D geometry). We also studied the effect of 3D geometry by nanostructuring both circular and fractal microelectrodes via electroplating Pt black. Fractal Pt black microelectrodes displayed the highest current density, charge storage capacity, and sensitivity towards H2O2. Next, we immobilized glucose oxidase onto various microelectrode geometries by microcontact stamping. Fractal Pt and Pt black glucose biosensors were 91.7 % and 83.3 % more sensitive than circular counterparts. Circular and fractal Pt black glucose biosensors were 63.0 % and 55.9 % more sensitive than Pt counterparts. Fractal geometry also provided better linearity and limit of detection. We modified enzyme layer thickness through multiple layer stamping and found a trade-off whereby increasing thickness increased sensitivity but also increased response time. Lastly, we developed a COMSOL Multiphysics numerical model to interpret the amperometric data and the impact of physical design on critical parameters. The work here will serve as a guideline for improving enzymatic electrochemical and other biosensors via physical design, which is simpler to modify than material or biological design.

Self-heating in surround gate (e.g., nanosheet, nanowire, and FinFET) transistors degrades their on-current performance and reduces their lifetime. If a transistor heats/cools with time constants much shorter than the inverse of the operating frequency, predictable, frequency-independent performance is expected; if not, the operating frequency must be optimized for the highest performance. Typically, time constants are measured by expensive, ultra-fast instruments with high temporal resolution. Instead, here, we demonstrate an alternate, inexpensive, cyclostationary measurement technique to characterize self-heating (and cooling) with sub-microsecond resolution. The results are independently confirmed by direct imaging of the transient heating/cooling of the channel temperature by the thermoreflectance method. Routine use of the proposed technique will help improve the design of the surrounding gate transistors and shorten their design cycle.

Junction box (JB) hotspots of an aged solar module are often attributed to JB or bypass diode damage. Unless supported by a physics-based model, this presumption may lead to incorrect diagnostics and overlooked risks. This study investigates the possible physical origin of JB-hotspots observed in infrared thermography and field data. Our electro-thermal modelingbased analysis reveals that JB- hotspot temperature, exceeding the regular module's temperature by 5-20 degrees C, correlates strongly with connector corrosion, solder joint degradation, and increased series resistance. Contrary to zeroth-order assumptions attributing such anomalies to bypass diode failures, we find that exit contact corrosion and module connection defects are the most probable contributors to JB hotspots. Our predicted JB temperature ranges are consistent with that found in thermal imaging in literature. Thus, infrared thermography, supported by electro-thermal inverse-modeling, can identify the origin of degradation, suggest various risk mitigation strategies, and serve as a powerful diagnostic tool for large-scale solar farm management.

A model for the current-voltage characteristic of the junction between an Ion-Sensitive-Membrane and an electrolyte solution is derived and compared with numerical simulations of the Poisson-Nernst-Planck model for ion transport. The expression resembles that of a semiconductor pn junction with a non-ideality factor of 2. The non-ideality correlated to the voltage drop in the electrolyte induced by the re-arrangement of the counter-ions.

This study investigates the mobility trends of indium-gallium-zinc oxide (IGZO) thin-film transistors over a wide range of fabrication conditions, from amorphous to crystalline phases. By utilizing machine learning potential (MLP) to generate 70 distinct IGZO structures, we analyze electron mobility while taking into account structural disorder and electron scattering mechanisms. Our findings reveal that mobility peaks at the transition from amorphous to nanocrystalline phases, and then, as more ordered, crystalline structures emerge, the mobility decreases sharply due to the distortion of polyhedron of indium-oxygen in well-ordered regions. These results offer critical insights into optimizing the fabrication conditions for high-performance IGZO devices by identifying the ideal structural phase for achieving maximum mobility.

Monolithic 3D integration for back-end-of-line (BEOL) vertical FET is an important emerging technology for the semiconductor industry, because of its high density, high performance, and improved power savings due to the reduced area and shorter interconnects. In this regard, oxide channel transistors are particularly promising because of the ultra-high performance of devices fabricated at low temperatures. In this work, we report the performance, reliability, and reliability implications of the asymmetric oxide-based vertical transistors (ov-FET) with atomic-layer-deposited (ALD) 1.6 nm In2O3 vertical channel and ALD In2O3 gate electrode. In the flipped bias configuration, the threshold voltage shift (Delta V-th) reduces by 0.14V (40%) and 0.19V (47%), respectively, for positive bias temperature instability (PBTI) and negative bias temperature instability (NBTI). We conclude by developing a universal scaling technique of three defect generation mechanisms of total threshold voltage (V-th) degradation, and use the model to predict PBTI/NBTI Delta V-th for various stress conditions. Our work illustrates that In2O3 vertical transistors are suitable for BEOL 3D integration and create a predictive modeling framework for performance/ reliability co-optimization.

In this article, we report the fabrication and characterizations of sub-20-mu m thin flexible Si die containing active devices. Thermally grown 2.62-nm silicon dioxide (SiO2), atomic layer deposition (ALD)-deposited 3-nm HfO2 (high-kappa), and 10-nm TiN layers are used to fabricate an array of MOSCAPs on Si wafers. The fabricated devices are characterized to analyze the doping density (N-a), flat-band voltage (V-fb), threshold voltage (V-th), fixed oxide charge (Q(f)), and interface trap densities (D-it). Then, a deep reactive ion etching (DRIE) reduces the die thickness to similar to 15 mu m for flexibility. The encapsulated flexible devices are found to have relatively better breakdown performances when tested in compressive stressing and no variations when in tensile stress. The time-dependent dielectric breakdown (TDDB) measurement shows a minimal variation in flexible and bulk devices. The TDDB and a voltage acceleration slope are projected in flexible devices after performing a 10 000 times bending and relaxation process (cycling).