Herein, the operation of a GeSe ovonic threshold switch (OTS) is studied as a self‐selecting memory cell based on the polarity effect. From the observed operating current ( I op ) dependence and area scaling behavior, the critical role of Joule heating in ensuring exceptionally large memory window in this material is confirmed. The underlying mechanism is further investigated by means of chemical analysis and is confirmed to be caused by polarity‐dependent atomic migration under high‐ I op regime, consistent with elemental segregation due to electronegativity contrast. More specifically, selective diffusion of Ge atoms through the TiN layer into negatively biased top electrode stack is observed. At the same time, there is no sign of a similar process for Se atoms under opposite voltage polarity. Based on these observations, a novel memory concept utilizing a selective diffusion barrier is proposed. Furthermore, under low‐ I op regime, no major composition change is observed, leaving room for alternative interpretation of the polarity effect under such conditions. Finally, it is demonstrated that functional GeSe OTS‐only memory is fabricated with atomic layer deposition, making it suitable for vertical 3D integration to enable low‐cost applications.

Chalcogenide-based selector-only memory (SOM) concept has shown great potential for high-density high-performance applications. While very promising, the understanding of the physical mechanism behind the polarity effect is still lacking. This work provides an in-depth investigation of SiGeAsSe SOM device under various operating conditions in order to identify its potential limitations. Specifically, a trade-off between operating current (I op ) and programming speed is established. Additionally, cycling endurance is found to be limited by a destructive failure at high-I op , whereas threshold voltage variability is a limiting factor at low-I op . Moreover, the retention time and the temperature acceleration of memory window loss is studied, also revealing a pronounced I op dependence. Finally, composition analysis identified no major atomic segregation associated with programming pulse polarity. Instead, an alternative model is proposed, capable of reproducing the polarity effect by treating OTS switching defects as anisotropic structural units.

In this work, we experimentally validate our theoretical framework for the ab initio screening of new, sustainable materials for ovonic threshold switching (OTS) applications, avoiding elements, such as As and Se that are associated with a high health and safety risk. We demonstrate that the newly designed Sn-S-based OTS ternary alloys are electrically functional and investigate the links between material properties and electrical performance. Results indicate that the Sn-S material system is a promising candidate for OTS selector and memory applications. Our findings open new research paths for further composition optimization aimed at bridging the performance gap with the state-of-the-art materials based on As and Se. The experimental results will enable further refinement of the theoretical model and improve its prediction capabilities.

In this paper, a range of sputtered ternary and quaternary (Si)(Ge)AsxTe3 x Te 3 layers (x: 2 or 5) and (Si)(Ge)As2Se3 2 Se 3 layers are examined using Raman spectroscopy. The results are linked to the Ovonic Threshold Switching properties of these materials when incorporated in selector devices, as observed in separate studies. In case of both the As-rich and As-poor tellurides, a large amount of homopolar bonds are present as the spectra are dominated by peaks associated with As-As and Te-Te bonds. Such homopolar bonds are commonly linked with drift in OTS properties. In the case of the selenides the spectra are dominated by modes associated with heteropolar As-Se bond vibrations. Adding Ge as an alloying element has a significant impact on the bond structure for both material systems. In contrast, Si has a much less pronounced impact and will mostly bond with itself. Time-resolved Raman measurements were also performed to determine the stability of the layers under micro-Raman laser excitation. At the regular exposure settings, no significant changes in the spectra were observed during the measurement. At elevated exposure settings, however, persistent changes in the bond structure can be induced for certain compositions.

Amorphous chalcogenide‐based ovonic threshold switch (OTS) selectors are an important part of the crosspoint memory arrays. It is known that the threshold voltage ( V th ) of the OTS device can be affected by operating conditions, such as pulse amplitude and ramp rate. Herein, the impact of pulse polarity on OTS parameters is investigated. Recent findings on the polarity‐induced V th shift observed in SiGeAsTe and SiGeAsSe materials are summarized. This effect is manifested as a stable and reversible change in V th resulting from the reversal of applied pulse polarity, thus allowing V th to be electrically controlled. Herein, for the first time exceptionally large polarity‐induced V th shift in GeSe OTS is reported. The behavior observed in binary GeSe and quaternary SiGeAs(Te/Se) material systems is compared and the dependence of polarity effects on the composition of OTS devices is discussed. The impact of film thickness, interface, and stoichiometry in GeSe OTS is investigated.

Cross-point array architecture offers a path toward low-cost storage-class memory (SCM). However, it requires a selector, such as an ovonic threshold switch (OTS) in series with the memory element, thus increasing the complexity of the bit cell. Furthermore, phase change memory (PCM), typically targeted for SCM applications, is limited by its large RESET current. Therefore, there is a demand for a new easy-to-fabricate self-selecting memory cell, capable of overcoming the limitations of PCM. Here, we propose a self-rectifying OTS-only memory (SR-OTSM), thus greatly simplifying the integration process compared to conventional 1OTS–1PCM cell. This novel memory is enabled by the semi-persistent polarity-induced threshold voltage shift recently observed in OTS materials. We describe the operation of such a cell and discuss the unique properties of the memory effect in Si-Ge-As-Se OTS. Specifically, we demonstrate excellent memory performance in SiGeAsSe-based SR-OTSM: ultralow Write current ( $< 15 \mu \text{A}$ , i.e., < 0.6 MA/cm $^{{2}}{)}$ , fast Read/Write operation ( $\sim $ 10 ns) and good endurance ( $10^{{8}}$ cycles).

Cross-point memory architecture involves high-density, fast yet cost-effective storage class memories (SCM). As a result, ovonic threshold switches (OTS) are extensively researched as they are needed in series with the SCM-based memory element for its precise functioning. In addition, these OTS-based devices exhibit the potential to be self-selecting memories too. Hence, its integration-friendly patterning becomes pivotal for large-scale manufacturing. Chalcogenide-based alloys are often the desired candidate for OTS. Here, we study the patterning of one of the widely investigated chalcogenide alloys-SiGeAsTe. While the elements of the alloy generate highly volatile halogenated etch by-products, this material is also prone to severe etch-induced lateral undercuts and material damage. Thus, its high-density patterning is challenging. A conventional method to minimize this undercut damage is to increase the hydrocarbon passivation during the etch process to prevent the exposure of the chalcogenide's sidewalls (SWs) to any type of etchant. Inherently, this leads to the tapering of the OTS-based pillars, consequently becoming an impediment to their scaling at tighter pitches. Here, we clearly establish that OTS-based devices with well-preserved chemical and morphological properties can be fabricated using lower hydrocarbon passivation by tuning the ion energies during etching. Higher ion energies ensure better etch directionality. Concurrently, a well-controlled high energy ion bombardment is likely to enhance deposition of the passivating hydrocarbon from the etch front on to the chalcogenide's SWs. This is achieved without any unwanted redeposition from underlying layers in the OTS-based stack. We successfully demonstrate high-density nanopatterning of chalcogenide-based OTS devices of diameter similar to 65 nm at 200 nm wide pitch. This is also effectively reproduced on 300 mm semiconductor wafers. The electrically measured devices exhibit low leakage and high endurance. This distinctive yet uncomplicated etch tailoring is also discussed to be scalable for pitches <200 nm and for other chalcogenide compositions.

As the research on phase change memory (PCM) gains more momentum due to a growing range of possible applications, some issues with their implementation still remain. Two of these issues, slow crystallization and energy loss due to heat diffusion, can be tackled by creating a chalcogenide superlattice. This structure consists of alternating layers of phase change material and a confinement material. To gain a deeper understanding of the effect of this structure on the PCM properties, the Sb2Te3/TiTe2 superlattice is studied as a stepping stone to other confinement materials. In situ X-ray diffraction is used to evaluate the deposition and the thermal stability of these materials. To study the heatflow in this structure, time-domain thermoreflectance (TDTR) is used. Finally, a methodology is presented to evaluate the functional effect of the superlattice using optical switching.

The impact of pulse polarity on the performance of SiGeAsSe-GeSbTe 1S1R cell is studied. Reversing the Write polarity leads to increased memory window with possibility of multi-level programming. The Write current can be reduced down to <40uA, enabling low-power operation. Good cycling endurance (>1e8) and retention characteristics are maintained.

In this paper, we investigate the thermal stability of a wide range of ternary and quaternary (Si)GeAsTe alloy thin films. These type of materials are reported to show Ovonic threshold switching, which means they conduct the current above a specific threshold voltage and are not conducting at lower voltages, making them ideal as a selector element for crosspoint memory devices. For threshold switching to occur in these chalcogenides, the amorphous state of the material is crucial, and hence the material may not crystallize below 400 degrees C to be compatible with temperatures used in device process flows. A combinatorial deposition technique is used to create a thin film library of 36 different compositions, and in situ X-ray diffraction and X-ray fluorescence spectroscopy is used to investigate the thermal stability of the films. We show that Si doping of GeAsTe improves the thermal stability by increasing the crystallization temperature and small amounts of Si (i.e.5at%) decreases the tendency to lose material by sublimation. Also capping the films with a W cap avoids material loss if the capping layer does not show cracking under annealing. An optimal chalcogenide composition, being As50Te20Ge20Si10 combined with a W electrode is identified and is integrated in 65nm mushroom type devices for electrical characterization. The material shows threshold switching and excellent endurance with over 10(8) cycles.

In order to make 3D crossbar memory architectures viable, selector elements with highly non-linear current–voltage characteristics are required. Ovonic Threshold Switching (OTS) is a highly non-linear phenomenon observed in amorphous chalcogenides, such as GeSe, that shows promise for application in selectors. In this paper, the impact of alloying with metallic (Zr), metalloid (B, Sb), and non-metallic (C, N) elements as a function of their concentration on the thermal stability and switching properties of alloyed GeSe layers is studied. In the case of the thermal stability analysis, the key parameter that is tracked is the crystallization temperature (Tc) of the as-deposited amorphous films since OTS only occurs in amorphous materials. Using a simple metal–insulator–metal type test structure where the bottom electrode is scaled to 6 μm, the OTS properties of the alloyed layers are also compared. The pristine leakage current (Ipris), the first fire voltage (VFF), and the threshold voltage (Vth) were determined using DC and pulsed (AC) measurements. Results indicate that C alloying in combination with sufficiently high nitrogen incorporation can extend the thermal stability above 600 °C with only low dependence on the C content. Among the metallic and metalloid elements, crystallization temperature is strongly dependent on alloying concentration. In general, larger concentrations are needed to obtain a Tc above 400 °C as compared to CN alloying. Electrical characterization indicates strong dependence of the first fire voltage and the leakage current on the metallicity of the alloying element with only small to moderate concentrations required to influence electrical properties.

Pulsed CVD can be utilized to deposit GeSe in a highly conformal fashion.

In this paper we investigate the operation of Si-Ge-As-Te Ovonic Threshold Switch (OTS) selectors under bipolar pulses. We observe that the threshold voltage increases noticeably if the previous pulse had opposite polarity. This effect is consistently present under different test conditions and persists for a long time (>1000s). We also investigate its impact on 1S1R operation, and discuss possible applications, such as OTS-only memory element.

Raman spectroscopy and electrical measurements are performed on sputtered GexSe1−x thin films to identify and link bond presence to electrical behaviour.

Correction for 'Impact of changes in bond structure on ovonic threshold switching behaviour in GeSe2' by Jonas Keukelier et al., J. Mater. Chem. C, 2021, DOI: ; 10.1039/d0tc04086j.

We thoroughly benchmark the reliability of Cu-based CBRAM stacks with different switching layers against state-of-the-art OxRAM stacks. We optimize the switching conditions for maximizing the endurance lifetime in three CBRAM stacks, outlining the impact of the switching layer on the energy required for the switching operation and on the memory window. We show that CBRAM provide a larger memory window than OxRAM, but the switching energy is systematically higher, and the endurance lifetime is shorter. We also demonstrate that the larger memory window of CBRAM degrades over time and is thus only an apparent advantage with respect to OxRAM. Therefore, this study reveals that OxRAM devices investigated in this work are more suitable candidates than for applications targeting long data retention and low programming voltage.

Correction for ‘Impact of changes in bond structure on ovonic threshold switching behaviour in GeSe2’ by Jonas Keukelier et al., J. Mater. Chem. C, 2021, DOI: 10.1039/d0tc04086j.

Switching mechanism and its controllability in Ovonic Threshold Switching (OTS) devices are systematically investigated by using Si-Ge-As-Se quaternary system known as promising OTS materials. We newly demonstrate that selector device performance is flexibly tunable by controlling fall time of switching pulse as well as operation current. Meanwhile, As- and Si-incorporation are found to be beneficial in terms of stable operation and faster recovery. All results are consistently understandable by extended percolation cluster model, supported by ab-initio and Monte-Carlo simulations.

Density functional theory simulations are used to identify the structural factors that define the material properties of ovonic threshold switches (OTS). They show that the nature of mobility‐gap trap states in amorphous Ge‐rich Ge50Se50 is related to GeGe bonds, whereas in Se‐rich Ge30Se70 the Ge valence‐alternating‐pairs and Se lone‐pairs dominate. To obtain a faithful description of the electronic structure and delocalization of states, it is required to combine hybrid exchange–correlation functionals with large unit‐cell models. The extent of localization of electronic states depends on the applied external electric field. Hence, OTS materials undergo structural changes during electrical cycling of the device, with a decrease in the population of less exothermic GeGe bonds in favor of more exothermic GeSe. This reduces the amount of charge traps, which translates into coordination changes, an increase in mobility‐gap, and subsequently changes in the selector‐device electrical parameters. The threshold voltage drift process can be explained by natural evolution of the nonpreferred GeGe bonds (or “chains”/clusters thereof) in Ge‐rich GexSe1–x. The effect of extrinsic doping is shown for Si and N, which introduce strong covalent bonds into the system, increase both mobility‐gap and crystallization temperature, and decrease the leakage current.

Co/LaSiO conducting bridge random access memory is a promising candidate for low power storage class memories due to its high endurance and short switching pulse width. Moisture has been hypothesized to be an important parameter in determining device retention. In this study, we anneal the LaSiO layers at different temperatures and pressures in order to reduce the absorbed moisture and improve retention. We evidence by Fourier transform infrared and x-ray reflectivity that the moisture content does not change with these anneal conditions. However, we find that increasing the amount of La–OH bonds is an effective way to improve the low resistance state retention.