In this work, an in-depth correlated study of the impact of grain boundaries on the excitonic and electronic properties of monolayer WS2 is reported. Signatures of defect- and strain-induced gap states are detected and studied in the vicinity of the grain boundaries using tip-enhanced photoluminescence, Kelvin probe force microscopy, and conductive atomic force microscopy. These gap states demonstrate a trap-like behavior for the free excitons, resulting in the radiative recombination of the localized excitonic states at room temperature. The trapping behavior is also detected for the free carriers, indicated by the abundance of fixed charges at the grain boundaries. The carrier trapping is corroborated through (tip-enhanced) photoluminescence spectroscopy at the grain boundaries, particularly after photoinjection of carriers. Comparison of the photoluminescence response acquired under ambient and high vacuum indicates the high reactivity of these defect sites and physisorption of ambient species. The ambient molecules seemingly passivate the defect sites and locally modulate the layer properties.
Due to the semimetal properties of Bismuth (Bi), this material is considered as one of the candidates for forming ohmic contacts with molybdenum disulfide (MoS2) in advanced 2D-based MOS transistors. Low contact resistances have already been demonstrated using Bismuth contacts on monolayer MoS2 (ML-MoS2) transistors. However, the precise crystalline structure as well as the heteroepitaxy of Bi is generally overlooked and the insight of research on Bi thin film crystal phase control and orientation on ML-MoS2 lacks. In this framework, we conducted an in-depth study on the control of the crystalline phase and orientation of Bi thin film on ML-MoS2 by molecular beam epitaxy (MBE) technique. By careful control of the thickness and growth temperature, we highlighted different phase and orientation transitions during the heteroepitaxy process of Bi on ML-MoS2. Ultrathin layer and low temperature ( ≤ 4 nm < 110 °C) will stabilize the α-phase (metal) of Bi thin film on ML-MoS2 while for thicker layers the β-phase (semimetal) Bi is obtained which is beneficial for the 2D material Ohmic contact, but an orientation growth front transition is happening at 110 °C between the (111) and (110) planes.
Pockels materials are notable for their strong electro-optic interaction and rapid response times and are therefore used extensively in optical communications. However, at cryogenic temperatures, Pockels coefficients are reduced in many materials optimized for room-temperature operation, which is a major hurdle for emerging quantum technologies. Here, we show that strontium titanate (SrTiO3) can be engineered to exhibit a Pockels coefficient of 345 picometers per volt at 20 hertz at cryogenic temperatures, a value twice as high as any other thin-film electro-optic material. By adjusting the stoichiometry, we were able to increase the Curie temperature and realize a ferroelectric phase yielding a high Pockels coefficient, so far with limited optical losses of decibels per centimeter. Our findings position SrTiO3 as a promising material for cryogenic quantum photonics applications.
The continuous expansion of two-dimensional materials research since the first developments of over 15 years ago has enabled tremendous progress in the fundamental understanding of their properties and behavior. The promises held by these materials to facilitate scaling beyond silicon-based device architectures are still valid, but the manufacturability and integration with silicon technology remain challenging. On the metrology side, characterization of the device channel and assessment of the expected performance is lacking, at least in a fully non-destructive and process line-compatible implementation. The current paper demonstrates a clear correlation between metrics associated with the transistor performance on one hand, and parameters from photoluminescence spectra on the other. The concept is demonstrated on state-of-the-art 300 mm process MoS2 devices, without the need for specific measurement conditions or sample preparation. Being truly non-contact and relatively fast, this analysis provides the community with a potential route toward non-invasive material quality assessment, applicable at several stages of the process and with a direct connection to device performance.
In this work, an in-depth study of the strain originating from the metallic pads of field effect transistors with WS2channels are reported. Presence of tensile strain caused by Ni/Pd pads fabricated with a lift-off process is confirmed with high resolution tip-enhanced Raman and photoluminescence. This strain field appears to extend in the 1-2µm vicinity of the pads and affect the optical bandgap of the layer. The severity and the profile of the mechanical stress seems to depend on factors like device architecture, channel length, and the contact area of the pads. Results indicate that the optical response of the channel can be correlated to the field-effect mobility, both factors reflecting the quality of the crystal, and be utilized in robust assessment of mechanical stress in these devices.
Gallium nitride is increasingly recognized as a leading material for power and radio frequency applications, due to its unique electronic properties. However, the phenomenon of wafer bow and warpage during GaN growth on heterogeneous substrates presents significant challenges for vertical-type GaN devices with increasing drift layer thickness (for high voltage applications, 1200 V and above) and substrate diameters scaling to 200 mm. In this study, we introduce a growth scheme in the metalorganic chemical vapor deposition of GaN on 200 mm “engineered” substrates from Qromis substrate technology, specifically to minimize the wafer bow for vertical GaN metal-oxide-semiconductor field-effect transistors featuring an 11.5 μm-thick drift layer, with an overall GaN stack of ∼15 μm. By systematically reducing the pressure during the growth of unintentionally doped GaN from 300 to 150 mbar on an Al0.3Ga0.7N buffer layer, the tensile stress induced during cooldown could be effectively compensated. This yields an overall low residual stress of the thick ∼15 μm epitaxially grown GaN layers on the engineered Qromis substrate technology® substrate.
We report on developments in 2D TMD interface engineering and the key role the interfacial layer (IL) plays on the performance of WSe2-based pFET devices. We show the first demonstration of ‘sacrificial’ TMD multilayers used as native TMD oxide IL for nucleation of a high-k ALD p-type compatible gate stack, resulting in low gate leakage of $~10^{-3}\mathrm{A}/\text{cm}^{2}$. The WSe2 multilayers were grown with fab-compatible MOCVD on 300mm Si wafers and show no mobility degradation after sacrificial oxidation process. We also discuss metal seeding as an alternative method for forming an IL compatible with monolayer $WSe_{2}$ channels and show that nearly degenerate doping is achieved after deposition of a thin Mo seed layer followed by optimized $\mathrm{O}_{2}$ annealing. As many literature reports of TMD pFET doping struggle with poor on/off ratio, we now report a novel co-seeding method, which enables controllable p-type doping, resulting in channel on-currents of more than one order of magnitude higher and on/off ratio's of $\sim 10^{7}$, comparable to those of the pristine WSe2 channels.
Defective grain boundaries form in semiconductors when deposition approaches do not control crystal grain orientation. This poses existential limitations to fabricating highly performing semiconductor devices with two-dimensional semiconductors for industry’s future Angstrom technology nodes. Today’s monolithic or bottom-up deposition methods do not control crystal grain orientation on industry-standard substrates covered with amorphous dielectrics due to lack of crystallographic symmetry provided by the substrate. Here, we report selective artificial chemical vapor epitaxy of tungsten disulfide (WS2), an approach to orient two-dimensional crystals on amorphous substrates with nanopatterns. Amorphous nanopatterns with axial symmetry that mimics the trigonal crystallographic symmetry of the WS2 crystal lattice guide WS2 crystal orientation as well as location. We show a proof of concept in a 300 mm industrial pilot-line at back-end-of-line compatible deposition temperature. This monolithic concept opens possibilities to eliminate grain boundaries and deposit single-crystalline two-dimensional materials directly on conventional amorphous dielectrics at feature scales relevant for most advanced device architectures.
BaBiO3 has attracted a lot of research attention since it was discovered as the parent compound for the high-Tc superconducting BaPbxBi1–xO3 and Ba1–xKxBiO3. In its pure state, BaBiO3 is an insulator due to the presence of a breathing distortion of the BiO6 octahedra. The distortion is attributed to the valency of Bi in the compound being charge-ordered in the form of Bi3+ and Bi5+ along the lattice, resulting in alternating expanded or contracted BiO6 octahedra. The interaction between the electronic properties and the thickness of the thin film is crucial to study. We conducted a thorough study to investigate the effect of the thickness reduction of BaBiO3-δ grown on SrTiO3-buffered Si substrates on the optical properties as well as the Bi electronic structure of the thin films. We conclude that modifications in the valency of Bi in the ultra-thin film regime result in an optically conducting layer.
Optical metrology is ubiquitous, but image-based methods cannot resolve features of dimensions much smaller than the wavelength. However, it has recently been demonstrated that light can be nanofocused into subwavelength semiconducting lines by setting the incident polarization along the direction of these lines. This Letter extends the previous studies to systems with two perpendicular gratings, as found e.g. after replacement gate processing of gate-all-around (GAA) field-effect transistors (FETs). We show that besides the nanofocusing effect, the incident polarization also offers control over which array of lines the light couples into. The interaction of the incident light occurs with the semiconducting lines to which the polarization is parallel with remarkably low interference from the existence of another perpendicular grating. We demonstrate the use of this effect with Raman spectroscopy to simultaneously extract the SiGe volume and the strain in the Si forksheet channels and in the SiGe layers of GAA FETs.
In this work, we demonstrate high performance FETs integrated on high density aligned carbon nanotube (A-CNT) arrays and perform statistical analysis. The back-gate pFETs show I-on>1.2 mA/mu m, R-c similar to 91 ohm center dot mu m, whereas the dual-gate pFETs show I-on similar to 800 mu A/mu m, on-off ratio similar to 5 x10(3) at 30 nm channel length (L-ch) and -0.5 V V-d. The impact of gate dielectric, EOT scaling and post-fabrication annealing on the device performance are explored in batch. With process optimization, the on-state performance of dual-gate A-CNT FETs is approaching silicon technology.
In semiconductor processing and metrology, Raman spectroscopy is a valuable characterization tool because of its nondestructive nature, high throughput, and versatility in terms of parameter sensitivity. However, with the miniaturization of semiconductor devices, the inherent diffraction limit of the optical technique becomes a roadblock. In order to re-enable the strengths of Raman spectroscopy at the nanometer scale, we exploit polarization-induced enhancement effects that focus the excitation light into the region of interest, without the need for external probes or particles. This allows the detection of structures with dimensions far smaller than the excitation wavelength, unlocking the strengths of Raman spectroscopy at the nanoscale for, e.g., stress and composition measurements. Moreover, under these conditions the experiment probes the totality of the materials stack and we show how this transforms the technique into a volumetric and geometric measurement. The result is a completely new application domain for Raman spectroscopy as a critical dimensional metrology toolkit for a wide variety of semiconducting and metallic materials.
In this paper, a range of sputtered ternary and quaternary (Si)(Ge)AsxTe3 x Te 3 layers (x: 2 or 5) and (Si)(Ge)As2Se3 2 Se 3 layers are examined using Raman spectroscopy. The results are linked to the Ovonic Threshold Switching properties of these materials when incorporated in selector devices, as observed in separate studies. In case of both the As-rich and As-poor tellurides, a large amount of homopolar bonds are present as the spectra are dominated by peaks associated with As-As and Te-Te bonds. Such homopolar bonds are commonly linked with drift in OTS properties. In the case of the selenides the spectra are dominated by modes associated with heteropolar As-Se bond vibrations. Adding Ge as an alloying element has a significant impact on the bond structure for both material systems. In contrast, Si has a much less pronounced impact and will mostly bond with itself. Time-resolved Raman measurements were also performed to determine the stability of the layers under micro-Raman laser excitation. At the regular exposure settings, no significant changes in the spectra were observed during the measurement. At elevated exposure settings, however, persistent changes in the bond structure can be induced for certain compositions.
Direct two-dimensional (2D) material growth is widely considered as the preferred 2D integration approach due to its simplicity and cost-effective fabrication flow. On the other hand, a 2D transfer route enables full wafer-scale integration of epitaxial 2D material and can facilitate new device possibilities. However, the transfer of a wafer size atomically thick 2D material from a growth to a device wafer often seems an impossible hurdle to overcome, since a 2D material is strongly influenced by strain and its surroundings. Moreover, the stability of some of these 2D materials is a concern as several are prone to oxidation. Here, an overview is given of the current state-of-the-art 2D material transfer techniques and an outlook is presented to improve these transfer processes further to achieve a reliable FAB compatible epitaxial 2D transfer.
Inspired by techniques designed for 3D integration, a die-to-wafer (D2W) transfer method can enable MX 2 -channel devices in a semiconductor fab for either high-performance CFET or hybrid-integrated CMOS. A Collective D2W(CoD2W) technique was successfully developed to transfer epitaxial single-layer MX 2 from sapphire to 300mm device wafers which facilitates uniform and residue-free “dies”. We report a FEOL semiconductor compatible integration flow used to build back-gated transistors with high device yield and mobility values up to 50 cm 2 /Vs on SiO 2 back gate dielectrics.
Raman spectroscopy is an effective tool for stress and compositional metrology in the semiconductor industry. However, its application toward decoupling a complex stress state in semiconductor materials requires the use of liquid immersion lenses that are process line incompatible. In this work, a practical design concept for off-axis Raman spectroscopy is presented. By tilting the incident light away from the normal incident axis, forbidden Raman modes can be accessed allowing determination of the in-plane stress tensor in semiconductor materials. Furthermore, we benchmark off-axis Raman spectroscopy against oil-immersion Raman spectroscopy for stress characterization in 20 nm-wide strained Ge fin field-effect transistor channels. We demonstrate that off-axis Raman allows anisotropic stress metrology without reliance on liquid immersion lenses, highlighting its viability in the process line. The stress state is validated through nanobeam diffraction measurements.
To enable graphene-integrated interconnects in modern VLSI circuits, a major roadblock is developing an efficient Back End of Line (BEOL) compatible doping technique. In this paper, we demonstrate metal-induced doping of graphene in graphene-ruthenium hybrid structures. We study doping by systematically performing different material characterization techniques - Internal Photoemission Spectroscopy (IPE), Raman Spectroscopy and Kelvin Probe Force Microscopy (KPFM) to gain a deeper understanding on the charge transfer at the graphene-Ru interface. In IPE, we measure the relative band alignment of graphene and Ru, the interface potential barrier and effective work function of 4.9eV. With Raman spectral mapping, we report p-type doping in single layer graphene on Ru film with carrier density 1.9E13cm(-2). And with KPFM, Fermi-level shift of similar to 420 meV (wrt intrinsic graphene) is observed implying downward shift of Fermi level in the graphene valence band. Electrically, graphene capping results in similar to 19 % drop in sheet resistance of Ru accompanied by significant decrease in contact resistance. Moreover, the temperature coefficient of resistance reduces after graphene capping indicating better response to thermal fluctuations. By performing an extensive study using different material and electrical techniques, our results provide a viable and practical basis for integrating graphene as a conductor in advanced interconnects. (C) 2021 Elsevier Ltd. All rights reserved.
Recently, imec has installed and commissioned an industrial, ultrafast EUV materials characterization and lithography lab, imec’s AttoLab, with a primary aim to explore limits of photoresist performance and their associated ultrafast chemistries. Here, we demonstrate, for the first time, the use of a table-top, high-harmonic EUV system (KM Labs, XUUS4) to perform interference lithography of sub-22-nm pitch patterns in an Inpria MOx resist via a Lloyd’s mirror interference lithography (IL) tool. Analysis of SEM images enables us to identify potential sources of image blur, which we attribute to out-of-sync vibrations, flare, spectral purity, and laser stability. Nevertheless, these results confirm the ability of table-top, high-harmonic EUV sources to print lithographic patterns below a 22-nm pitch. In future work, we plan to investigate sub-20-nm patterning in different resist formulations, as well as expand the lithographic capabilities in AttoLab to perform IL on full 300-mm wafers.
Research on carbon nanotube (CNT) films for the EUV pellicle application was initiated at imec in 2015 triggered by the remarkable optical, mechanical, and thermal properties of the CNT material. Today the advancement of the CNT material synthesis together with matured methods to fabricate thin CNT membranes make free-standing CNT films a very promising EUV pellicle candidate for high volume EUV lithography. Balancing the CNT material properties for the optimal pellicle performance in EUV scanners remains the ongoing research focus. Depending on the density and morphology of the CNTs within the film and individual CNT parameters, like number of walls, bundle size, metal catalyst content, purity etc., the optical and thermal properties of the CNT pellicle can be tuned. It is critical for the pellicle to be stable in the EUV lithography scanner environment which includes hydrogen plasma and heat loads associated with high powers beyond 250 W. Different types of CNTs, i.e. single-, double-, multi-walled CNTs and their combinations, are explored as building blocks of an optimized pellicle membrane. Optical properties of different pellicles and their ability to withstand high EUV powers in the hydrogen-based environment were tested. Transmission, spectroscopic and chemical composition mapping of the exposed free-standing CNT films are used to study the material changes that occur in the scanner-like environment. A solution is needed to extend the CNT pellicle lifetime and coating is discussed as a potential approach to protect the CNT material from hydrogen plasma damage.