Chisel, an open-source high-level hardware construction language embedded in Scala, was proposed to facilitate the development of parameterizable, reusable circuit design generators. It is becoming increasingly popular and has been used to design many RISC-V processor variants. Formal verification has been adapted to rigorously check the (functional) correctness of RISC-V processor designs. However, the RISC-V instructions therein are specified in the low-level hardware languages Verilog/SystemVerilog, which are challenging to develop, maintain, customize, and extend. This considerably lowers the advantage of RISC-V for agilely designing highly customizable processors. In this work, we present chi RVFormal, the first end-to-end approach for formally verifying the correctness of RISC-V processor designs fully at the Chisel high-level. Specifically, by utilizing the object-oriented and functional programming constructs offered by Chisel, we develop a high-level reference model of RISC-V instructions in Chisel. This reference model is a succinct, modular, and parameterized RISC-V processor design generator, supporting the RV32/64IMCBZicsr instruction sets, three privilege levels (M/S/U), and Sv39 virtual memory system, thus can be easily instantiated to produce customized reference model instances. We then devise a synchronization mechanism between the RISC-V processor Chisel design and the reference model by which the correctness verification of the RISC-V processor design is reduced to the model-checking problem and off-the-shelf model checkers can be harnessed. Our synchronization mechanism supports both in-order single issue RISC-V processors and out-of-order superscalar RISC-V processors. We implement our approach in an open-source tool and demonstrate its efficacy on three representative open-source RISC-V processor designs in Chisel: riscv-mini, NutShell, and BOOM, where the former two are in-order single issue processor designs while BOOM is an out-of-order superscalar processor design. The experimental results confirm the efficacy of our approach, capable of discovering 7 real-world unknown non-conformance bugs and all the 15 manually injected bugs, significantly more effective than two state-of-the-arts. It is also three-orders-of-magnitude more efficient than the state-of-the-art symbolic-execution based approach.
Deploying large-scale models on resource-constrained edge devices is a challenge, particularly when models trained for general-purpose classification must be specialized for tasks involving only a subset of classes. Existing pruning methods are predominantly task-agnostic and fail to account for task-specific class composition, resulting in ”task-level category redundancy” where irrelevant model components are retained and thus limit achievable compression. To address this, we propose Task-Specific Pruning (TSP), a method that integrates task-category information into pruning pipeline. Specifically, TSP quantifies importance of each filter with respect to individual classes using a rank-based feature map analysis, and derives task-specific importance scores by fusing class-level information according to target task. To improve stability under aggressive compression, a layer-wise minimum retention constraint is further introduced. Extensive experiments on CIFAR-10, CIFAR=100, and ImageNet-1K, across multiple backbone architectures including VGG, ResNet, and MobileNet, demonstrate that TSP consistently outperforms existing methods in pruning rate and FLOPs reduction under accuracy-loss constraints of 0.5%, 3%, and 10%. Deployment on NVIDIA Jetson Orin Nano further demonstrates significant inference latency reductions on real edge hardware, underscoring the necessity of system-level evaluation beyond FLOPs. These results highlight the importance of explicitly modeling task-category characteristics for efficient and reliable model specialization in edge scenarios.
Public Key Infrastructure (PKI) is the cornerstone of network trust, yet its centralized architecture suffers from inherent risks such as single points of failure, fragile trust chains, and inefficient certificate revocation. Although blockchain technology enables decentralized PKI (DPKI) by providing transparent, tamper-resistant auditing and automated execution, existing schemes in multi-Certificate Authority (CA) settings still lack robust and adaptive governance mechanisms that can cope with dynamic CA performance fluctuations and malicious behaviors. To address this gap, we propose DRL-DPKI, a learning-based governance framework that integrates deep reinforcement learning to support performance-driven CA selection, quality-aware load balancing, and malicious-behavior mitigation. DRL-DPKI formulates CA committee election as a sequential decision-making problem, where the agent's state space fuses normalized reputation, recent success rate and delay level computed over a temporal sliding window, and a "hunger" measure that enhances sensitivity to short-term behavior changes. Experimental results show that, compared with seven representative baselines, DRL-DPKI substantially reduces the malicious-CA selection rate under high adversarial presence; in our scalability experiments with CA pools of up to 6000 and a 50% malicious-CA regime, the malicious-CA selection rate remains within 0-13.33% across the evaluated scales, and DRL-DPKI significantly outperforms all baselines in terms of robustness and quality-aware load balancing. This work introduces an adaptive intelligent decision-making paradigm for trust governance in decentralized PKI, substantially improving the security and resource utilization efficiency of DPKI systems.
The hybrid-storage blockchain relieves on-chain storage constraints by storing raw data off-chain and retaining only data hashes on-chain. An authenticated data structure (ADS) ensures secure, verifiable queries within this architecture. A significant challenge arises when on-chain nodes must update the root digest after inserting new data objects into the ADS. Most existing research has focused only on static data scenarios. This paper introduces a novel keyword query framework for encrypted data, enabling the synchronized maintenance of the ADS on-chain. The proposed ADS assigns a unique keyword to each leaf node and fixes the ADS’s tree topology based on historical data. To accommodate new data, we develop specific keyword binding and update rules. To minimize root digest updates, we separate the digest construction of the search key from the data content. The data content digest is computed using the Mercury commitment. This approach ensures the root digest remains unchanged when a new data object is added. The fixed topology makes updating the ADS’s root digest simple. Keyword binding and update rules further reduce the frequency of root digest updates associated with keywords Extensive experimental evaluation results show the superiority of our proposed method in both query time and VO size.
Tiny machine learning (TinyML) enables on-device intelligence under strict memory and compute constraints, but aggressive model reduction often leads to brittle models that fail under distribution shift. This challenge is particularly acute in Earth Observation (EO), where validation data are geographically limited and often non-independent and identically distributed (non-IID). Existing compression and neural architecture search (NAS) methods typically optimize test error subject to resource budgets using scalarized objectives or Pareto selection, collapsing multiple failure modes into a single metric. We argue that robustness in tightly constrained settings requires explicit reasoning about the bias-variance trade-off, which re-emerges when model capacity is limited. We formulate TinyML model synthesis as a three-player non-cooperative game among a bias minimizer, a variance minimizer, and a resource enforcer, and propose an Iterated Best Response (IBR) solver to identify stable architectures. Experiments on EO benchmarks - EuroSAT land-cover classification, SEN12MS multi-sensor classification, and OSCD change detection - show that IBR achieves accuracy comparable to lightweight NAS baselines while exhibiting lower or comparable variance, particularly at higher capacities. Although evaluated on EO tasks, the formulation is task-agnostic, establishing bias-variance games as a principled foundation for robust, resource-aware TinyML architecture design.
The widespread adoption of embedded vision systems in industrial applications has highlighted the limitations of deep learning models, which are characterized by a high number of parameters. This is representing a significant concern within the scientific community due to the increased computational resources and memory required for training and inference of these models. Addressing this, we propose a flexible and effective methodology for neural network compression that integrates a pluggable dimensionality reduction layer with a Knowledge Distillation (KD) approach. The proposed compression framework allows for the exploration and comparison of various state-of-the-art techniques as reduction mechanism. Specifically, we investigate and implement reduction layers based on: tensor decompositions, such as Averaged Higher-Order Singular Value Decomposition (AHOSVD); non-linear methods like bottleneck projection layers, convolutional autoencoders (CAEs), and MLP-Mixer architectures. In our approach, this reduction layer replaces certain layers of the original network, projecting feature maps into a lower-dimensional space. The subsequent KD process then guides the compressed network to retain high performance. We conducted extensive experiments on image classification tasks, evaluating the efficacy of networks incorporating these reduction strategies across multiple architectures (VGG19, ResNet101) and datasets (CIFAR-10, CIFAR-100, STL-10). Our approach was then compared against both the original, uncompressed models and quantization, a widely used reduction method, in terms of accuracy, model size, parameter reduction, and inference time. The results demonstrate the versatility and effectiveness of our approach in achieving substantial neural network compression and efficiency across various reduction layer instantiations, while consistently maintaining high accuracy.
Modern heterogeneous systems increasingly rely on reconfigurable computing to deliver high performance, energy efficiency, and adaptability across domains ranging from cloud data centers and AI acceleration to embedded and Internet of Things (IoT) platforms. While these capabilities enable significant performance benefits, they also introduce new attack surfaces, as malicious logic can be deployed to perform fault injection, side-channel attacks, or other adversarial behaviors without physical access. Beyond these risks, reconfigurable fabrics provide unique opportunities to enhance security, from accelerating cryptographic primitives to supporting runtime monitoring, anomaly detection, secure reconfiguration, and remote attestation. Recent research has also explored leveraging FPGAs to implement Trusted Execution Environment (TEE) within the fabric. This survey provides a structured overview that includes: i) adversarial uses of malicious logic in FPGA-based systems, categorized by entry points and attack targets; ii) FPGA-based countermeasures designed to detect, prevent, or mitigate these threats while tailoring protection to specific workloads; iii) emerging FPGA-based TEE approaches, highlighting how reconfigurable logic enhances trust guarantees and addresses limitations in CPU-centric TEEs; and iv) discussion of future research directions, analyzing the scope of current FPGA-based TEEs in light of the FPGA-specific threats and opportunities.
The integration of the Data Distribution Service (DDS) with Time-Sensitive Networking (TSN) enables deterministic communication for distributed cyber-physical systems. However, existing studies mainly address real-time performance, with limited attention to reliability. This paper presents an Software-Defined Networking (SDN)based DDS-TSN integration framework incorporating the IEEE 802.1CB Frame Replication and Elimination for Reliability (FRER) mechanism. The framework automatically extracts redundancy requirements from DDS publishers and applies a multicast transformation mechanism for CB flow identification. A heuristic redundancy-aware routing and scheduling (Ra-RaS) algorithm is developed to jointly optimize redundant path selection and time-aware scheduling, reducing path length deviation and improving load balance. Simulation results show that the proposed Ra-RaS algorithm maintains high schedulability and scalability even under high traffic load conditions. Physical experiments further demonstrate that the integrated DDS-TSN framework ensures deterministic and fault-tolerant communication by leveraging the joint operation of FRER and the Time-Aware Shaper (TAS), significantly enhancing the reliability of DDS under link failure and packet loss.
Distributed deep learning faces a persistent communication bottleneck as models scale exponentially. Standard software-based compression efforts often fail to exploit specialized GPU units, resulting in a computational lag that offsets intended bandwidth gains. This paper introduces Hardware-Aware Gradient Compression (HAGC), a framework that offloads the entire compression workload to hardware-native operations. Restructuring the Bilateral Hadamard Transform from memory-bound recursion into dense matrix operations allows HAGC to execute directly on Tensor Core mixed-precision units. This structural synchronization masks compression latency, while an integrated error feedback mechanism ensures convergence stability. The framework supports a systematic co-design strategy that calibrates training parameters to align processor capacity with training stability. Empirical evaluations on NVIDIA A100 GPUs demonstrate substantial performance gains, achieving up to a 3.15 & times; end-to-end speedup for data-intensive models such as VGG-19. The resulting framework reduces energy consumption by 2.9 & times; and memory footprint by nearly 4 & times; , while maintaining model fidelity comparable to full-precision baselines. Such findings validate that bridging algorithmic design with physical hardware capabilities is essential for building sustainable, high-performance distributed systems.
Unmanned aerial vehicles (UAVs), which are aircraft without a human pilot and fly in the sky, can make an ad hoc network between themselves named Flying Ad Hoc Network (FANET). FANETs can be considered as a special form of MANETs and VANETs. Designing an effective routing protocol in FANETs is a significant challenge due to the high mobility of the nodes and the rapid topology changes. In this paper, the proposed FANET routing protocols are classified and a novel taxonomy of FANET routing protocols is presented. The studied FANET routing protocols are classified into eight categories: topology-based routing protocols, secure-based routing protocols, swarm-based routing protocols, hierarchical-based routing protocols, energy-based routing protocols, position-based routing protocols, DTN-based routing protocols, and AI/ML-based routing protocols.In addition, the routing protocols proposed based on the cooperation of UAVs with nodes on the ground have been examined. In each category, various parameters and criteria are offered to evaluate routing protocols. This paper can be beneficial for researchers and can allow them to understand the deficiencies and shortcomings of the proposed routing protocols to perform further studies in the future.
In fog-based smart grids, smart meters collect users’ electricity data in real time and transmit it to fog node (FN) for aggregation. Then FN sends the aggregated data to control center for in-depth analysis. Throughout this process, data privacy preservation must be implemented, for which privacy-preserving data aggregation (PPDA) serves as a viable solution. However, most existing PPDA schemes do not support multidimensional data aggregation and fault-tolerance(i.e. scheme can still achieve data aggregation even when some devices malfunction), and these schemes are vulnerable to collusion attacks and have high computational and communicational overheads. To address these issues, this paper proposes a certificateless privacy-preserving multidimensional data aggregation scheme with fault-tolerance. The scheme first employs Chinese Remainder Theorem to integrate multidimensional data into a single data, followed by data obfuscation using the updated blind factors, and subsequently encrypts the data via the Paillier homomorphic encryption. Security analysis indicates that the scheme achieves data confidentiality and authenticity while resisting collusion attacks. Performance comparisons indicate its advantages in both communicational and computational overheads.
With the widespread application of vehicular ad-hoc network (VANET) technology, vehicles frequently broadcast critical information to support cooperative driving and intelligent transportation services. However, the increasing value of vehicular data and growing security threats necessitate efficient privacy protection and secure authentication mechanisms. Certificateless ring signature (CL-RS) technology preserves identity anonymity during signing while avoiding certificate management complexity and key escrow issues. To address the high-efficiency security requirements and quantum computing threats in VANET scenarios, we propose a novel lattice-based certificateless linkable ring signature (CL-LRS) scheme. Building upon CL-RS advantages, our scheme introduces linkability to prevent signature abuse (e.g., replay attacks, false message propagation) while safeguarding legitimate vehicle privacy. We provide rigorous security proofs in the random oracle model, demonstrating that the scheme achieves unforgeability (against both Type-I and Type-II adversaries), anonymity, and linkability under the hardness of Module Short Integer Solution (M-SIS) assumption. Performance evaluations demonstrate that, at the 192-bits post-quantum security level, our scheme achieves an over 60% reduction in signature size compared to existiing lattice-based certificateless ring signature schemes. Furthermore, generating a signature for 8 ring members requires only 13.26 KiB, and the minimal size increase of 0.025KiB per additional member makes this scheme exceptionally well-suited for resource-constrained vehicular networks.
Enhanced regular expressions (EREs), which extend classical regular expressions with shuffle and counting operators, offer exponentially more succinct representations of regular languages. However, unconstrained EREs lack explicit algorithms for solving the membership, k-non-emptiness, and k-non-empty complement problems. In this paper, we introduce a derivative construction for counting and shuffle operators and formally prove its correctness. We also analyze its time complexity based on a lemma that relates the size of the derivative to that of the original expression. Using this derivative, we propose three algorithms to address the membership, k-non-emptiness, and k-non-empty complement problems for EREs. We conduct experiments demonstrating that these algorithms are both effective and practical. Finally, we validate the correctness of two existing inference algorithms that previously lacked formal guarantees, owing to the absence of practical membership algorithms for unconstrained EREs.
Real-world regular expressions (regexes) are widely used in practice. However, due to their complex syntax and difficulty in both understanding and writing, automatic synthesis of regexes has been an important research challenge. Existing methods often have limited generalization ability and insufficient support for extended features. To address these challenges, we propose PowerSyn, a framework that leverages large language models (LLMs) and semantic manipulation of sub-expressions. PowerSyn synthesizes regexes from natural language descriptions and examples, and supports extended features. Specifically, our approach includes prompt design for synthesizing regexes with LLMs, as well as a novel algorithm for semantic manipulation of sub-expressions guided by examples and matching relationships. In addition, we explore the ability of LLMs to repair incorrect regexes. The experimental results demonstrate the significant effectiveness of our approach.
Recently, Large Language Models (LLMs) have achieved tremendous success in various tasks. In particular, In-context Learning (ICL) has emerged as a popular inference paradigm for eliciting the reasoning capability of LLMs. In ICL systems, LLMs can efficiently learn new tasks during inference without modifying their parameters by adding only a few input-output example pairs demonstrating the task. Such mysterious ability of LLMs has attracted great research interests in understanding, formatting, and improving the in-context demonstrations, while still suffering from drawbacks like the sensitivity to the selection and organization of examples, making reliable evaluations for ICL systems crucial. Inspired by the foundations of adopting testing techniques in machine learning (ML) systems, we study the mutation testing technique for ICL systems, aiming to characterize the quality and effectiveness of their test data. First, we propose a general mutation testing framework for ICL systems, as well as the mutation operators and scores that are specialized for ICL demonstrations. Then, we implement this testing pipeline under various types of ICL systems, including classification, regression, and generation tasks. By adapting the generalized mutation operators and scores, we demonstrate the framework's versatility and effectiveness for different ICL applications. With comprehensive experiments across multiple models and benchmarks, we show the effectiveness of our framework in evaluating the reliability and quality of ICL test suites under various scenarios, contributing new insights and techniques for ICL system evaluation. Our code is available at https://github.com/weizeming/MILE.
Solid State Disks (SSDs) utilize NAND flash for data storage. Due to the physical characteristics of NAND, host systems would require extensive modifications in order to use flash storage directly. Instead, a firmware component of the SSD, the Flash Translation Layer (FTL), enables host systems to utilize flash storage without modification. However, the FTL performs its own data placement, requiring address translation and garbage collection, leading to performance unpredictability and performance and hardware overheads, as well as an increased cost for flash storage.The Zoned Namespaces (ZNS) specification defines a novel interface for the host to interact with flash that avoids interfacing with the Flash Translation Layer and its shortcomings. In order to use the ZNS interface, a considerable amount of modification on the storage stack of the host is required, which is why F2FS is the only stable file system with ZNS support today. In this paper, we present the host-side Zoned Translation Layer (ZTL) and extend our previous work on ZTL by providing additional experiments and implementation details. ZTL provides abstractions and functionalities required by many file systems to support ZNS devices. We demonstrate the feasibility of ZTL by providing the first EXT4 implementation for ZNS devices and by comparing our implementation of ZNS support for F2FS with the native ZNS support of F2FS, showing that ZTL decreases implementation overheads for file system developers while performance is sustained or improved.
This paper addresses the joint optimization of Phasor Measurement Unit (PMU) and wireless communication sensor placement to minimize the installation cost of Wide Area Measurement Systems (WAMS) while ensuring both complete power grid observability and communication network connectivity. Mathematical models are first provided for the optimal PMU placement and optimal sensor placement problems independently, with the latter formulated as a Steiner tree problem. These are then integrated into a unified mixed integer linear program for joint optimization. Due to its computational complexity for large-scale networks, two efficient solution approaches are proposed: GlobalGrid, which is exhaustive, and SubSteiner, which balances optimality with computational efficiency. Numerical experiments demonstrate that networks with higher nodal degrees require fewer sensors for connectivity. Results show that incorporating Zero Injection Buses (ZIBs) reduces the required number of PMUs by up to 23%, leading to a corresponding reduction in sensor deployment costs of up to 12%. The proposed SubSteiner approach achieves near-optimal solutions with an optimality gap of less than 6% compared to GlobalGrid while significantly reducing computational time.
Ensuring the integrity of Internet of Things (IoT) objects is challenging due to their limited energy and processing resources, as well as their exposure to security threats. Remote Attestation (RA) is a widely used technique that enables a trusted entity, such as a gateway, to verify the integrity of constrained IoT devices remotely. However, applying RA in constrained environments introduces challenges, including redundant attestations, high energy consumption, and vulnerabilities, such as Time-of-Check-Time-of-Use (TOCTOU) attacks. To address these limitations, this paper proposes a novel autonomic IoT framework for self-managing the integrity of IoT objects using a lightweight remote attestation mechanism and the Autonomic Computing paradigm. The proposed approach uses a DBSCAN model to determine when attestation is required, along with a fuzzy-logic system that dynamically selects an appropriate lightweight hash function based on the device state. Meanwhile, the attestation process uses a lightweight HMAC scheme to ensure device integrity. Our proposed framework reduces redundant attestations, optimizes energy consumption, and extends the lifetime of IoT systems, making it suitable for resource-constrained environments.
In urban and disaster environments, non-line-of-sight (NLoS) blockage and strict end-to-end latency constraints jointly degrade multi-UAV connectivity, especially when stable backhaul is unavailable. We present a RISaugmented distributed crowdsourcing multi-agent reinforcement learning (MARL) framework in which UAV agents and RIS agents are modeled as independent learners under centralized training and distributed execution (CTDE). Each UAV learns motion and single-link selection (direct-only or direct + one selected RIS) with PPO, while each RIS learns a discrete phase/codebook policy with a categorical PPO backend. Our learning objective explicitly internalizes (i) step-wise deadline-exceedance penalties (ReLU of delay above deadline), (ii) a priced bandwidth-sharing budget for control/neighbor messages via an online dual variable, and (iii) a non-negative diversity loss that discourages traffic collapse onto a single RIS. Tail metrics (delay p95/p99) and deadline miss rate (DMR) are used strictly as evaluation KPIs and are not backpropagated through. In simulation under matched urban/disaster settings, we observe that RIS-augmented MARL improves service-level reliability and tail behavior under contention: success rate increases while delay p95 decreases compared with heuristic baselines. The average SNR improvement is modest (e.g., -4.848 dB vs. -4.74 dB under the common logging schema), so our claims focus on tail-aware robustness and deadline feasibility rather than large mean-SNR gains. Overall, these results demonstrate that coupling learnable RIS control with distributed MARL and explicit overhead/deadline pricing yields a practical design point for edge AI-enabled crowdsourcing UAV communications under NLoS and time-critical constraints.
Deep learning-based weed control systems often struggle with limited training data diversity and constrained computational resources, restricting their effectiveness in real-world deployment. To address these limitations, we introduce a Stable Diffusion-based inpainting framework that progressively augments training datasets in 25% increments, up to 200%, enriching both data volume and variability. We systematically evaluate three state-of-the-art object detection architectures, such as large, small, and nano variants of YOLO11 and YOLOv12, along with large RT-DETR models, under three precision settings (FP32, FP16, INT8) using mAP50 and mAP50-95 evaluation metrics. Experiments on NVIDIA Jetson Orin Nano, NVIDIA Jetson AGX Orin, and spo-comm rugged computing unit reveal that quantization consistently reduces latency and memory footprint, with INT8 compression producing the most compact and fastest models. While INT8 often induces accuracy degradation, we show that this loss is significantly minimized by targeted synthetic augmentation. Notably, small YOLO variants trained with augmented data match, and in some cases surpass, the detection performance of their baseline large counterparts, without added model size or inference cost. Furthermore, utilizing the INT8-quantized Stable Diffusion for data generation preserves augmentation benefits on the downstream models while minimizing generation overhead. In combination, these contributions establish a novel training and deployment strategy for embedded AI in the context of weed detection, demonstrating that small YOLO models, INT8 quantization, and targeted synthetic augmentation can jointly deliver higher efficiency without sacrificing accuracy.
