TANOS-NAND flash process integration generates various technological difficulties; one of the most relevant is the patterning of TaN metal gates together with Al2O3 high-k dielectrics. BCl3/N2 based high-temperature plasma etching preferably used for structuring high-k materials reveals severe etch damage effects at the TaN sidewalls. Plasma treatments with different etch gases (BCl3/N2; O2/Ar; Cl2/Ar) were used for detailed analyses of chemical effects on the TaN layer. The damage induced by BCl3/N2 based plasma was investigated and characterized using blanket wafers. Approaches to overcome this obstacle are proposed.

A bipolar transistor with a silicon-germanium base (HBT) was prepared by the focused ion beam technique for TEM-cross-sectioning, taking into account the special requirements of electron holography. A line plot from the phase image through the functional region includes the influences of different dopant content as well as different germanium concentrations on the mean inner potential. Interpretation of the superimposed contributions to the phase shift succeeds by using additional information from SIMS data.

We demonstrate the application of surface sensitive diffuse x-ray scattering under the condition of grazing incidence and exit angles to investigate growth and dissolution of near-surface defects after boron implantation in silicon(001) and annealing. Silicon wafers were implanted with a boron dose of 6×1015 ions/cm2 at 32 keV and went through different annealing treatments. From the diffuse intensity close to the (220) surface Bragg peak we reveal the nature and kinetic behavior of the implantation induced defects. Analyzing the q dependence of the diffuse scattering, we are able to distinguish between point defect clusters and extrinsic stacking faults on {111} planes. Characteristic for stacking faults are diffuse x-ray intensity streaks along 〈111〉 directions, which allow for the determination of their growth and dissolution kinetics. For the annealing conditions of our crystals, we conclude that the kinetics of growth can be described by an Ostwald ripening model in which smaller faults shrink at the expense of the larger stacking faults. The growth is found to be limited by the self-diffusion of silicon interstitials. After longer rapid thermal annealing the stacking faults disappear almost completely without shrinking, most likely by transformation into perfect loops via a dislocation reaction. This model is confirmed by complementary cross-sectional transmission electron microscopy.

We have developed planar glass chip devices for patch clamp recording. Glass has several key advantages as a substrate for planar patch clamp devices. It is a good dielectric, is well-known to interact strongly with cell membranes and is also a relatively in-expensive material. In addition, it is optically neutral. However, microstructuring processes for glass are less well established than those for silicon-based substrates. We have used ion-track etching techniques to produce micron-sized apertures into borosilicate and quartz-glass coverslips. These apertures, which can be easily produced in arrays, have been used for high resolution recording of single ion channels as well as for whole-cell current recordings from mammalian cell lines. An additional attractive application that is greatly facilitated by the combination of planar geometry with the optical neutrality of the substrate is single-molecule fluorescence recording with simultaneous single-channel measurements.

We have realized highly doped suspended silicon nanowires with lateral dimensions down to 20 nm for studying electron transport and dissipation phenomena in these wires. Random dopant fluctuations lead to the formation of multiple tunnel junctions, showing Coulomb blockade phenomena at low drain-source bias. In the finite-bias regime we observe relaxation of hot electrons via phonons. Melting of the wires then occurs at high bias values at an extremely large current density of the order of 10(6) A cm(-2).

We investigate silicon-based single-electron transistors in thin layers of highly doped recrystallized amorphous silicon. After rapid thermal annealing polysilicon grains have been found with sizes of about 25nm acting as electron islands. Applying high-resolution electron-beam lithography we have fabricated nanowires with width down to about 10nm in the polycrystalline silicon films. Single-electron effects in the non-linear source–drain characteristics up to temperatures of about 25K have been observed.

Lateral patterning of highly doped silicon-on-insulator films allows us to observe conductance oscillations due to single-electron charging effects. In our devices, silicon nanostructures are embedded into a metal–oxide–silicon configuration. The single-electron effects can be tuned both by an in-plane sidegate, as well as by a metallic topgate, a technology which is compatible with large-scale integration of single-electron devices with dimensions down to 10 nm. We compare the influence of different gating electrodes, important for ultralarge scale integration, on the electron islands.

Single-electron transistors utilizing Coulomb blockade effects are promising candidates for future silicon based nanoelectronics. We present the fabrication of such transistors and measurements that reveal Coulomb blockade behavior. Various silicon quantum dots are investigated up to room temperature. We employ a dual gate configuration with which we are able to control our devices by both a metallic top gate as well as by an in-plane gate. This design principle enhances the integration density.

A nano-triode fabricated out of doped silicon-on-insulator material is demonstrated. Low turn-on voltages and the possibility of direct integration into existing silicon technology are but two of the advantages of these new devices. It is also possible to tune the current collected at the drain electrode by biasing the gate electrodes. The Figure depicts a scanning electron micrograph of the free-standing silicon nanostructure.

Nowadays single-electron devices are believed to be one of the top-candidates to replace standard Complementary Metal Oxide Silicon (CMOS) transistor technology at the end of the conventional semiconductor roadmap. Here, we present a brief overview on the manipulation of electrons in nanostructured semiconductors, especially in silicon with particular emphasis on different realizations of single-electron tunneling devices. Silicon-based fabrication technology further allows the use of the manufacturing processes already established in semiconductor industry. Moreover, the use of Silicon-on-Insulator (SOI) films allows the lithographic definition of the currently smallest structure sizes, which are crucial for the room temperature operation of single-electron devices. Lateral structuring of highly doped silicon films allows us to observe quasi-metallic Coulomb-blockade oscillations in shrunken wires where no quantum dot structure is geometrically defined. Embedding quantum dot structures into the inversion channel of a silicon-on-insulator field-effect transistor Coulomb blockade up to 300 K is observed. In contrast to the quasi-metallic structures, in these devices the influence of the quantum mechanical level spacing inside the dot becomes visible. As an outlook, we finally show freely suspended single-electron devices. Since dissipation can be highly suppressed in these novel devices, they might be especially suited for future applications in single-electronics.

We investigate the microscopic contact of a cell/semiconductor hybrid. The semiconductor is nanostructured with the aim of single channel recording of ion channels in cell membranes. This approach will overcome many limitations of the classical patch-clamp technique. The integration of silicon-based devices 'on-chip' promises novel types of experiments on single ion channels.

We present a technique to mount single-crystalline silicon thin films on arbitrary substrates. We demonstrate in detail the preparation of a 190-nm-thin silicon metal–oxide–semiconductor field-effect transistor (MOSFET) on a silicon-on-insulator film lifted from its substrate and bonded to quartz. Functioning of this hybrid MOSFET on a rigid surface at room temperature is demonstrated.

We demonstrate Coulomb blockade oscillations in different single-electron devices in Silicon-On-Insulator (SOI) films up to temperatures of 300 K. The layer sequence in SOI allows the underetching of these devices in order to realize suspended, highly doped silicon nanostructures. Similar suspended silicon beams are fabricated to form novel nanomechanical resonators that can be excited at radio frequencies up to about 300 MHz. Controlling the vibration frequency by a side-gate voltage, these resonators allow charge detection with a sensitivity of 0.1e/Hz, comparable to that of cryogenic single-electron devices.

We present measurements on nanomechanical resonators machined from silicon-on-insulator substrates. The resonators are designed as freely suspended Au/Si beams of lengths on the order of 1–4 μm and a thickness of 200 nm. The beams are driven into nonlinear response by an applied modulation at radio frequencies and a static magnetic field in plane. The strong hysteresis of the magnetomotive response allows sensitive charge detection by varying the electrostatic potential of a gate electrode.

We present a brief overview on different realizations of single-electron devices fabricated in silicon-on-insulator films. Lateral structuring of highly doped silicon films allows us to observe quasi-metallic Coulomb blockade oscillations in shrunken wires where no quantum dot structure is geometrically defined. Embedding quantum dot structures into the inversion channel of a silicon-on-insulator field-effect transistor Coulomb blockade up to 300 K is observed. In contrast to the quasi-metallic structures, in these devices the influence of the quantum mechanical level spacing inside the dot becomes visible. Suspending highly doped silicon nanostructures leads to a novel kind of Coulomb blockade devices allowing both high-power application as well as the study of electron–phonon interaction.

The dynamic conductivity of a quasi-two-dimensional electron system with a large spin splitting in high magnetic fields is probed via the acousto–electric interaction with a surface acoustic wave. We compare this interaction for the case of non-spin polarized even and spin polarized odd Landau niveaus of the electron system in the integer quantum Hall regime and find a clear violation of a simple relaxation model that describes other features of the interaction properly. We propose differences in the electrical screening in the quasi-two-dimensional electron system in the case of spin polarized and non-spin polarized Landau levels to explain our experimental findings.

We report on a new method to build suspended silicon nanowires in highly doped silicon films in silicon-on-insulator substrates. The beams are defined by high-resolution, low-energy electron-beam lithography using a two-layer positive electron resist. Micromachining techniques including dry and wet etching are applied to pattern the structures. We show first low-temperature measurements of these novel devices indicating electron-phonon interaction.

Using highly doped silicon-on-insulator (SOI) films, we demonstrate metallic Coulomb blockade in silicon nanowires at temperatures up to almost 100 K. We propose a process that leads to island formation inside the wire due to a combination of structural roughness and segregation effects during thermal oxidation. Hence, no narrowing of the SOI wire is necessary to form tunneling contacts to the single-electron transistors.