In microfluidic systems, valves are used to control the flow of fluid and enable different functions like mixing, switching or flow regulation. A wide variety of valve types and operating mechanisms have been developed to fulfill the diverse requirements of different applications. Silicon as the fabrication material for many micro-electromechanical systems provides numerous advantages compared to alternative materials. Key features such as biocompatibility, high precision manufacturing with accurate geometries and mono-crystalline material properties without mechanical degradation make silicon an excellent material for microvalves. In this paper, we present the design, numerical mechanical simulation, manufacturing and fluidical characterization with air of normally closed passive silicon microvalves. Three different valve geometries are evaluated regarding their fluidical performance to determine the suitability for gas applications as part of silicon micropumps. Two single clamped cantilever valves and one double clamped membrane valve are characterized in terms of opening behavior, pressure dependent flowrate, pressure drop and leakage. Two of the three valves ' optical evaluation of the flap and diaphragm deflection correlate closely to the mechanical simulation. The fluidic measurements demonstrate reproducibility and repeatability and confirm the suitability of the valves for different applications with demanding requirements.

Josephson junctions are key elements in superconducting qubits. Their efficient wafer-scale characterization is crucial for process control and optimization, motivating analysis approaches that extend beyond conventional cryogenic measurements. In this work, we demonstrate that room temperature (RT) capacitance and current-voltage measurements, combined with appropriate data analysis, enable extraction of relevant junction parameters such as oxide thickness, tunnel coefficient, and interfacial defect density. Furthermore, different charge transport mechanisms can be identified from detailed current-voltage analysis. We evaluate our characterization technique using tunnel junctions fabricated on 200 mm wafers in a complementary metal-oxide-semiconductor (CMOS)-compatible subtractive process. The results show a homogeneous average oxide thickness across the wafer with a variation below 3%. A dependence of the tunnel coefficient on oxide thickness indicates a stoichiometry gradient within the oxide. Additionally, low interfacial defect densities in the range of 70-5000 defects/cm2 are observed in our junctions, increasing with decreasing oxide thickness, suggesting that wet etching used for thickness control introduces interfacial trap states. Our study highlights the importance of advanced RT characterization for extracting tunnel junction parameters on the wafer scale, enabling effective process monitoring and optimization in industrial superconducting qubit manufacturing.

Aluminum (Al) remains the central material for superconducting qubits, and considerable effort has been devoted to optimizing its deposition and patterning for quantum devices. However, post-processing strategies focused on oxide removal of niobium (Nb) and tantalum (Ta) -based resonators using buffered oxide etch (BOE), which can not be used for Al. This challenge becomes particularly relevant for industry-scale fabrication with multi-chip bonding, where delays between sample preparation and cooldown require surface treatments that preserve low dielectric loss during extended exposure to ambient conditions. In this work, we investigate surface modification approaches for Al resonators subjected to a 24-hour delay prior to cryogenic measurement. Passivation using self-limiting oxygen and fluorine chemistries was evaluated utilizing different plasma processes. Remote oxygen plasma treatment reduced dielectric losses, in contrast to direct oxygen plasma. A fluorine-based plasma process was developed that passivated the Al surface for subsequent BOE treatment. However, the fluorine content in the surface resulted in higher loss, identifying fluorine as an unsuitable passivation material for Al resonators. Above all, selective oxide removal using HF (hydrogen fluoride) vapor and phosphoric acid yielded median dielectric losses as low as _LP = 5.7 × 10^-7 (Q_LP≈ 1.7 M) with _TLS = 3.6 × 10^-7 (Q_TLS≈ 2.8 M) in the single photon regime. Selective oxide removal provides a promising pathway for robust Al-based qubit fabrication, as it preserves low dielectric losses for a 24-hour delay before cooldown.

Gas bubbles are one of the main disturbances encountered when dispensing drugs of microliter volumes using portable miniaturized systems based on piezoelectric diaphragm micropumps. The presence of a gas bubble in the pump chamber leads to the inaccurate administration of the required dose due to its impact on the flowrate. This is particularly important for highly concentrated drugs such as insulin. Different types of sensors are used to detect gas bubbles: inline on the fluidic channels or inside the pump chamber itself. These solutions increase the complexity, size, and cost of the microdosing system. To address these problems, a radically new approach is taken by utilizing the sensing capability of the piezoelectric diaphragm during micropump actuation. This work demonstrates the workflow to build a self-sensing micropump based on artificial intelligence methods on an embedded system. This is completed by the implementation of an electronic circuit that amplifies and samples the loading current of the piezoelectric ceramic with a microcontroller STM32G491RE. Training datasets of 11 micropumps are generated at an automated testbench for gas bubble injections. The training and hyper-parameter optimization of artificial intelligence algorithms from the TensorFlow and scikit-learn libraries are conducted using a grid search approach. The classification accuracy is determined by a cross-training routine, and model deployment on STM32G491RE is conducted utilizing the STM32Cube.AI framework. The finally deployed model on the embedded system has a memory footprint of 15.23 kB, a runtime of 182 µs, and detects gas bubbles with an accuracy of 99.41 %.

Josephson junctions (JJs) are the key element of many devices operating at cryogenic temperatures. Development of time-efficient wafer-scale JJ characterization for process optimization and control of JJ fabrication is essential. Such statistical characterization has to rely on room temperature techniques since cryogenic measurements typically used for JJs are too time consuming and unsuitable for wafer-scale characterization. In this work, we show that from room temperature capacitance and current-voltage measurements, with proper data analysis, we can independently obtain useful parameters of the JJs on wafer-scale, like oxide thickness, tunnel coefficient, and interfacial defect densities. Moreover, based on detailed analysis of current vs voltage characteristics, different charge transport mechanisms across the junctions can be distinguished. We exemplary demonstrate the worth of these methods by studying junctions fabricated on 200 mm wafers with an industrially scale-able concept based on subtractive processing using only CMOS compatible tools. From these studies, we find that our subtractive fabrication approach yields junctions with quite homogeneous average oxide thickness across the full wafers, with a spread of less then 3 variation of the tunnel coefficient with oxide thickness, pointing to a stoichiometry gradient across the junctions' oxide width. Moreover, we estimated relatively low interfacial defect densities in the range of 70 - 5000defects/cm^2 for our junctions and established that the density increased with decreasing oxide thickness, indicating that the wet etching process applied in the JJs fabrication for oxide thickness control leads to formation of interfacial trap state

Josephson junctions (JJs) are the key element of many devices operating at cryogenic temperatures. Development of time-efficient wafer-scale JJ characterization for process optimization and control of JJ fabrication is essential. Such statistical characterization has to rely on room temperature techniques since cryogenic measurements typically used for JJs are too time consuming and unsuitable for wafer-scale characterization. In this work, we show that from room temperature capacitance and current-voltage measurements, with proper data analysis, we can independently obtain useful parameters of the JJs on wafer-scale, like oxide thickness, tunnel coefficient, and interfacial defect densities. Moreover, based on detailed analysis of current vs voltage characteristics, different charge transport mechanisms across the junctions can be distinguished. We exemplary demonstrate the worth of these methods by studying junctions fabricated on 200 mm wafers with an industrially scale-able concept based on subtractive processing using only CMOS compatible tools. From these studies, we find that our subtractive fabrication approach yields junctions with quite homogeneous average oxide thickness across the full wafers, with a spread of less then 3$\,$%. The analysis also revealed a variation of the tunnel coefficient with oxide thickness, pointing to a stoichiometry gradient across the junctions' oxide width. Moreover, we estimated relatively low interfacial defect densities in the range of 70 - 5000$\,$defects/cm$^2$ for our junctions and established that the density increased with decreasing oxide thickness, indicating that the wet etching process applied in the JJs fabrication for oxide thickness control leads to formation of interfacial trap state

During wafer testing, small probes are contacting pads on the wafer surface to check the chip functionality and identify faulty dies. To prevent damaging structures underneath, a mechanical load limit needs to be defined. This is done by intentionally overstressing the pads and searching for cracks that appear. A customized test bench with a patented sensor-indenter (SI) system is currently used to perform the contact cycles and identify crack formations in real time using the generated acoustic emissions (AEs). This method is faster and more accurate compared with previous optical detection methods. This article presents an improved version of the SI system usable in a wafer prober, featuring a double-beam cantilever beam with an exchangeable indenter tip. This leads to measurement conditions closer to productive wafer testing, enabling more accurate load limit definitions. The cantilever beam contains a strain gauge Wheatstone bridge for contact force measurement and a piezoelectric sensor element for AE signal detection. Amplifier circuits are designed for both sensors, and a data acquisition (DAQ) system is developed. A prototype of the sensor cantilever combination (SCC) is shown together with simulated and experimental results. The accuracy of the force sensor (+/- 0.5 -> +/- 1.3 mN) and the signal-to-noise ratios (SNRs) of the AE signals (29.1 -> 21 dB) show only a small decrease compared with the previous SI system. A crack probability analysis of a test specimen confirms the usability of the SCC, as AE crack signals are detected at a similar mechanical load with both sensor setups.

To improve the performance of valves in relation to the leakage rate, a comprehensive evaluation of the valve characteristics and behavior during pressure exposure is important. Often, these low gas flow rates below 0.1 cm3/min cannot be accurately measured with conventional flow sensors. This paper presents a small and low-cost test rig for measuring gas leakage rates accurately, even far below 0.1 cm3/min, with the pressure decay method. These leakage flows are substantiated with a flow model, where we demonstrate the feasibility of modeling those gas flows with an extended Navier–Stokes framework to obtain more accurate theoretical predictions. As expected, the comparison to the experimental results proves that the classical Navier–Stokes system is unsuitable for modeling Knudsen flows. Hence, self-diffusion of gas, a wall-slip boundary condition, and an effective mean free path model were introduced in a physically evident manner. In terms of the calculated mass flow, while self-diffusion and slip boundary conditions explain deviations from the classical Navier–Stokes equation for Knudsen numbers already smaller than 1, the effective mean free path model has an effect, especially when Kn > 1. For simplified conditions, an analytical solution was presented and compared to the results of an OpenFOAM CFD-solver for flow rates through more complex gap-flow geometries of the flap valve. Hereby, acceptable deviations between 10% and 20% were observed. A comparison with measurement results was carried out. The reproducibility of the measurement method was verified by comparing multiple measurements of one silicon microvalve sample to a state-of-the-art flow sensor. Three geometrically similar passive silicon microvalves were measured with air overpressure decreasing from 15 kPa relative to atmospheric pressure. Maximum gas volume flowing in a blocking direction of 1–26 µL/min with high reproducibility and marginal noise were observed.

Novel approaches in the field of photovoltaics, such as building or vehicle integration require investigations of lightweight PV module concepts [1]. This research proposes and evaluates a lightweight PV module concept using glass fiber-reinforced polymers (GFRP) based on epoxy composites within the module stack. The usage of GFRP as front material as proposed in this work, reduces weight by 44-74 % compared to conventional glass- back sheet modules. We show results that with the proposed module stack hail impact resistant module can be built with small and large size avoiding any cell cracks after impact. Additionally, modules with GFRP front layer withstand thermal cycling tests with low power losses ranging from-0.9 % to-1.1 % at P mpp depending on the individual GFRP layer. We also show results of cut susceptibility tests with an increased performance compared to modules with a polymeric front layer. Development topics remain as shown by damp-heat and UV irradiation testing, were an optimization of the module stack still needs to be performed.

Acoustic emission (AE) testing recently found its application in the wafer testing sector of the semiconductor industry. To find out the mechanical robustness of semiconductor devices, contact pads on the chip surface are intentionally overstressed with an indenter tip and the appearing oxide cracks are detected with help of the generated AE signals. This is done in a customized test bench with a patented sensor-indenter system. This paper presents an improved version of the measurement setup that solves certain disadvantages of it and can be used in a standard wafer prober. The main components of the developed sensor system are a strain gauge for contact force measurement and a piezoelectric sensor element for AE signal detection. Both components are integrated on a cantilever beam which has an exchangeable indenter tip at its free end. The cantilever probe is electrically conductive to enable electrical tests via the indenter tip. This smart sensor-cantilever combination (SCC) can be mounted with several adapter components on a carrier plate to place it in a wafer prober. For both sensor elements amplifier circuits are developed to enhance their signal-to-noise ratios (SNRs). A prototype setup is shown together with simulated and experimental results to demonstrate its performance. The mechanical properties of the cantilever, as well as the force sensor and the AE crack signals, already fulfill the requirements for an implementation in a wafer prober. To further improve the sensor resolutions and detection limits, several optimizations regarding the design of the SCC are in progress.

This work focuses on the manufacturing of Al/AlO x /Al Josephson junctions (JJs), which are essential components of many quantum circuits. Two processes were studied to understand the oxidation of the aluminum surface. Static oxidation was performed by removing native AlO x in a cluster system with Ar-ion beam milling and controlling the final tunneling oxide by applying a specific O 2 pressure in the chamber. Controlled plasma oxidation was performed by removing native AlO x with a H 2 plasma followed by a defined reoxidation with an oxygen plasma. The resulting oxides had thicknesses up to 10 nm and their electrical properties were analyzed on wafer level, providing insight into the structure and composition of the aluminum oxides and their applicability for Qubits. This work is crucial for reliable industrial manufacturing on full-scale 200 mm wafers with a very high uniformity level.

For superconducting quantum circuits with a large number of Qubits, reproducible components are crucial for reducing entanglement decoherence. Particularly for reliable industrial manufacturing on full-scale 200 mm' wafers, a very high uniformity level is required to ensure sufficient coherence times. In the present work the special focus was put on manufacturing Al/AlO x /Al Josephson junctions (JJ), which are the most important component of many quantum circuit. Fully Al -based CMOS-compatible JJ’s were produced using a double dry etch process. After patterning the first Al metallization several oxidation processes have been investigated. Static oxidation has been performed by first removing the native AlOx in a multi-chamber system with Ar milling. The final tunneling oxide was controlled by applying a specific pressure in the chamber under a pure O2 atmosphere. Afterwards, without breaking the vacuum, the second Al metallization has been deposited by sputtering. Oxide thicknesses between 1 and 2.5 nm were achieved. A full mapping of the process homogeneity will be given. On the other hand, a dynamic recipe controlled plasma oxidation process was performed, where the native AlO x was first removed by a H 2 plasma followed by a defined reoxidation with an oxygen plasma. The resulting oxides had thicknesses up to 10 nm. The second Al metallization was again deposited by sputtering. Both oxidation processes were carefully studied to understand the initial oxidation process of the aluminum surface. Special attention was devoted to the non-destructive removal of the native AlOx with respect to the Al interface. Because the oxide thicknesses varied between 1 and 10 nm, the transition between direct and Fowler-Nordheim tunneling could be investigated. The process-stability on full scale 200 mm wafers and on chip size could be determined via test structures as well as the resistance variation of the Josephson junctions. Furthermore, the electrical properties of the different oxides could be measured and analyzed on wafer level. These studies provide insight into the structure and composition of the aluminum oxides and the applicability for Qubits.

In this work, we focus on the application of the "three-state lithography model" developed for the production of 3D-topographies in photoresist through grayscale lithography. We demonstrate in detail how the variables of the model are determined and optimized in a parameter definition procedure. The principle work ow for a automated mask generation is shown on a pyramid sample structure. Additionally, we tested a top and bottom anti-reflective coating for the use of surface smoothening. Experiments reveal bottom anti-reflective coating as method of choice to smoothen the surfaces on manufactured 3D-topographies.

Due to the slow-down of Moore’s Law and Dennard Scaling, new disruptive computer architectures are mandatory. One such new approach is Neuromorphic Computing, which is inspired by the functionality of the human brain. In this position paper, we present the projected SEC-Learn ecosystem, which combines neuromorphic embedded architectures with Federated Learning in the cloud, and performance with data protection and energy efficiency.

The ongoing SARS-CoV-2 pandemic demonstrates that the capacity of centralized clinical diagnosis laboratories represents a significant limiting factor in the global fight against the newly emerged virus. Scaling up these capacities also requires simple and robust methods for virus diagnosis to be easily driven by untrained personnel in a point-of-care (POC) environment. The use of impedance sensors reduces the complexity and costs of diagnostic instruments and increases automation of diagnosis processes. We present an impedance point-of-care system (IMP-POCS) that uses interdigitated electrodes surrounded by an integrated heating meander to monitor loop-mediated isothermal amplification (LAMP) and melt curve analysis (MCA) consecutively in a short time. MCA permits distinguishing false- from true-positive results and significantly raises the validity of pathogen detection. Conclusively, the herein-developed miniaturized total analysis system (µTAS) represents a powerful and promising tool for providing reliable, low-cost alternatives to standard clinical diagnosis.

We present a simple and reliable hybrid packaging of rigid electrochemical transducers and flexible foil having electrical connections. Among a large number of biochemical transducers, we target in this work two types of transducers: 3-electrode systems and ion selective field effect transistors (ISFET). The hybrid packaging ensures several requirements such as: biocompatibility to biological analytes, precise tight encapsulation, protection of transducers surface, mechanical stability, reliable electrical contact and light shielding of sensitive parts. The proposed hybrid packaging of biochemical transducers is based on a flip-chip bonding process, which necessitates low-cost materials, a reduced number of processing steps as well as compatibility to common roll-to-roll (R2R) processes.

Abstract. Background: Physical modeling of grayscale lithography processes for the prediction of photoresist heights leads to complex mathematical algorithms. A promiment example is the numerical simulation of the photoresist shape after development through Dill’s equations. These grayscale lithography models exhibit accurate prediction quality but can not directly implemented into mask layout tools to simplify the layout procedure. Limited process windows, changes in the mask design, variations of the used materials or manufacturing tools lead to time-consuming and cost-intensive test procedures to adjust the photoresist model for sufficient results. Aim: The focus of this work is to enhance current grayscale lithography models for a straightforward method with the same precise prediction of remaining photoresist heights to simplify the mask layout process. Moreover, we aim for an uncomplicated optimization of the model to minimize the empirical analysis necessary for its use. Approach: Based on experimental results, we deploy a sectionally defined mathematical expression that includes the theory of Fraunhofer diffraction and illumination-dependent activation of the photo-sensitive component and its solubility in developer. Results: We produced pyramidal, spherical and chess field structures with exposure doses of 3000 and 15  ,  000  J  /  m2 on bare silicon substrates with 100-nm resolution and on silicon substrates with anti-reflective coatings, with accuracy as fine as 20 nm. Conclusion: The proposed three-state lithography model has been verified by experimental evaluation. It is able to operate in a wide process window and can be directly implemented in existing mask layout software. This model ensures a cost-efficient and precisely controlled production of three-dimensional topographies using grayscale lithography processes.

We provide a general overview on vehicle integrated photovoltaics (VIPV) for passenger cars. Historic examples are reviewed to demonstrate that VIPV can provide an economic benefit due to the current and unique setting of very low solar cell costs and ambitious goals for electric vehicles. Subsequently, four guiding questions are addressed: 1. Which benefits are offered by VIPV, 2. Which potential costs are related to VIPV, 3. What are the challenges of VIPV and 4. What is the future potential of VIPV? It is shown that with a typical roof (1.7 – 2 m2) of a car equipped with solar cells, a solar driving distance of up to 1900-3400 km/year can be achieved and the cost for manufacturing such a solar module is estimated to be below 120 €/piece. Furthermore, using the full potential of solar integration in cars, a solar driving distance in the range of the yearly average driving distance of passenger cars in Germany (15,000 km/a) could be theoretically covered by VIPV.

Unannealed neutron transmutation doped silicon substrates with a target resistivity of approximately 1000Ωcm are characterized for radiation induced defects by means of microwave detected photoinduced current transient spectroscopy (MD-PICTS). This technique is a contactless advancement of conventional PICTS and does not require the fabrication of ohmic contacts. Defect spectroscopy by means of MD-PICTS is conducted in a broad temperature range between 30 K and 293 K, which makes it possible to identify energetically shallow as well as deep traps. In addition, a wavelength dependent analysis is performed to determine whether a defect is located at the surface or in the bulk material. Three traps with an average activation energy of 68meV, 85meV, and 150meV are observed. In addition, an indication for deep defect states with activation energies between 320meV and 480meV is found. According to the wavelength dependent analysis, it is assumed that all observed traps are bulk defects. Finally, a minority carrier lifetime of approximately 0.7 μs is determined, suggesting that the crystal is heavily damaged by neutron radiation.