Capacitors are everywhere in electronics. They can be used for delaying, filtering, decoupling, converting, storing, etc. Various materials and technologies are used to manufacture components with different characteristics in terms of capacitance, leakage current or breakdown voltage depending on the requirements imposed by the application field. Silicon capacitors jointly developed by Ipdia and CEA-Leti combine high performances and a level of reliability that makes them suitable for high-end applications. They are also particularly appropriate for use under harsh environmental constraints such as those encountered in oil and gas prospection [1] thanks to their very good stability versus temperature [2]. In this paper, we present the developments carried out for stacking 10 chips in a package so as to obtain a 10μF capacitor capable of working continuously at 220°C during 1000h in a down-hole environment. For a first demonstrator, 100μm-thick capacitor dies were alternatively stacked and wire-bonded onto a ceramic substrate using 60μm-thick pieces of silicon as spacers [3]. Thermal tests (thermogravimetry, aging followed by shear tests) were performed in order to qualify the epoxy glue to be spread at the interfaces. A reverse ball bonding process using a fine pitch, straight bottleneck capillary was developed to obtain very low profile loops in order to prevent the wires from touching the dies above and beneath, which would have been critical for leakage. Optical profilometry and in-line electrical tests (C and I_leak measurements) were performed at each level to monitor the device functionality during the assembly. Finally Kovar lids were used to hermetically seal the packages by reflowing a AuSn preform under a N2 atmosphere. Hermeticity was measured by Residual Gas Analysis and a pressure vs. time projection was done, showing no significant pressure increase in the cavity during the lifetime of the device. Motivated by the good electrical results (capacitance within the specification, leakage current lower than 100nA) and to go further in the miniaturization and the robustness of the device, a second demonstrator was performed using a QFN package [4]. The same assembly strategy with “off-the-shelf” dies was applied on a lead frame including innovative patterns and designed with very aggressive dimensions so as to minimize the volume of the module. A new molding compound, evaluated in terms of weight loss and processability, was used to encapsulate the stacked and wire-bonded dies. After sawing, a module with a volume less than 44mm3 was obtained and showed equally good results as the first demonstrator in terms of capacitance and leakage current. A high capacitance, high reliability module was thus realized using capacitor dies and assembly materials compatible with high temperatures up to 220°C. This opens interesting prospects for the oil and gas industry since it allows drilling deeper and reaching currently inaccessible resources. The low volume of the capacitor also makes it suitable for other application fields with more drastic size constraints such as avionics or automotive.

Due to its wide band-gap, Al 2 O 3 is known to have a moderate leakage current and a good dielectric strength [1]. Moreover, this dielectric has a fair permittivity and so constitutes interesting candidate as dielectric for Metal-Insulator-Metal (MIM) capacitor. Atomic Layer Deposition (ALD) allows obtaining a dense and thin Al 2 O 3 amorphous layer. ALD limits problems of interlayer diffusion because Al 2 O 3 is deposited underneath 400°C [2] which is essential when MIM are co-integrated with temperature sensitive structures. The aim of our investigation is to attempt to tie aluminum oxide properties dielectric with reliability from the help of capacitors of the entire wafer. In this way, conduction mechanism analysis and capacitance measurements were statistically led on the wafer. We particularly focus our study on the quantification of defects and their influence on the leakage current in planar capacitor. Firstly, to estimate the fixed oxide charges densities in the bulk of Al 2 O 3 and to analyze conduction mechanism, Metal-Oxide-Semiconductor (MOS) (Al/Al 2 O 3 /HR-Si) is developed. Then, a MIM stack (Al/TiN/Al 2 O 3 /TiN/HR-Si) is developed in order to evaluate the leakage current and the electrical reliability of thin films Al 2 O 3 based MIM capacitors. Different performances are observed according to the area on the wafer. That could be explained by the quality of the Al 2 O 3 layer and the interfaces between TiN and the oxide.

In this paper we present the work that has been carried out to stack 13 dies in a QFN package so as to obtain a super capacitor in a small volume. First the chips technology is described as well as the lead frame. Then the assembly process based on die attach film and wire bonding is explained. Finally the electrical tests of the modules are shown.

Progressive cardiac diseases due to population aging lead to stimulate research and innovation. Moreover, recent development in the miniaturization of microsystem offers a tremendous opportunity for medical implantable application. This paper introduces a new technology that integrates a Micro Electro-Mechanical Systems (MEMS) accelerometer and an Application-Specific Integrated Circuit (ASIC) inside a hermetic silicon box that could be embedded in a cardiac lead in order to monitor the endocardial acceleration signal. The electronic components are attached on a wafer silicon interposer and encapsulated in a wafer silicon lid which is bonded using eutectic AuSi. The originality of the approach consists in using an interposer and a lid, both made of conductive doped silicon, to connect the device. The process is performed at the wafer level. The silicon box is finally connected to the electrical generator outside the heart thanks to two conductor wires. A prototype is described in this paper. The gas content and hermeticity of the package were analyzed using different techniques such as Residual Gas Analysis (RGA) and Helium or Krypton 85 testing. An estimate of the leak rate, which is assessed based on the formation of water droplet condensation in our package after 20 years, was evaluated.

High quality amorphous nanolaminates by means of alternate Al2O3 and TiO2 oxide sublayers were grown with atomic scale thickness control by pulsed laser deposition. A giant dielectric constant (>10 000), strongly enhanced compared to the value of either Al2O3 or TiO2 or their solid solution, was observed. The dependence of the dielectric constant and the dielectric loss on the individual layer thickness of each of the constituting materials was investigated between 0.3 nm and 1 nm, in order to understand the prevailing mechanisms and allow for an optimization of the performances. An impedance study confirmed as the key source of the giant dielectric constant a Maxwell–Wagner type dielectric relaxation, caused by space charge polarization in the nanolaminate structure. The current work provides better insight of nanolaminates and their sublayer thickness engineering for potential applications.

The objective of this paper is to present a new technology that integrates a Micro Electro-Mechanical Systems (MEMS) accelerometer and an Application-Specific Integrated Circuit (ASIC) chip encapsulated in a hermetic silicon box that could be embedded in a transvenous cardiac lead in order to sense the endocardial acceleration signal. The originality of the approach consists of using an interposer and a lid, both made of conductive doped silicon to connect the device. The MEMS and the ASIC are attached on the silicon interposer and the silicon lid is bonded using eutectic AuSi ring. The electrical interconnection to the two conductor wires is obtained through the interposer and the lid using the conductivity of doped silicon. The system integration was performed at the wafer level. A test vehicle which allows characterizing the required technologies was designed and manufactured. A technical focus on the most important process steps for the integration is presented and discussed in this paper. This includes interconnection on doped silicon, dies on wafer bonding and wafer to wafer bonding. The hermeticity and biocompatibility encapsulation of the device is also addressed and a prototype which has been designed is described.

We present a technique based on ultrafast acoustics which permits us to measure the electrical dependence of the elastic properties of a thin piezoelectric layer. Ultrafast acoustics offers a unique way of measuring elastic properties of thin-layer in a non-destructive way using ultrashort optical pulses. We apply this technique to a thin layer to which a dc voltage is simultaneously applied. Both the film thickness and the sound velocity are affected. The two effects can be separated by use of a semi-transparent top electrode. A demonstration is made on a thin aluminum nitride (AlN). From that the d33 piezoelectric coefficient and the stiffness variation induced by the bias in AlN are measured.

The analysis of the mechanical behaviour of flip-chip interconections is an essential aspect of the reliability of the devices using this technique. When manufacturing them and during their operation, the interconective systems are submitted to thermal and mechanically induced stresses. By cyclic micromechanical testing and from analysis by micro Raman of singularities, we studied the mechanical response and the failure of samples, consisting of a substrate, the interconections and a chip. Two sort of low melting point alloys were investigated, with different metallurgies for the pads, holding the interconections.

Lamb wave devices have recently gained an interest for providing narrow bandpass filters in wireless transmission systems. Their cointegration with film bulk acoustic wave resonators is a major advantage, enabling the possibility to provide simultaneously several radio frequency and intermediate-frequency filters in a single fabrication. Similarly, in this work, we report the fabrication of resonators using waves guided in a piezoelectric layer deposited atop a Bragg mirror. Such waves exhibit a behavior close to Lamb waves, thanks to the acoustic isolation provided by the mirror, while being cointegrated along with solidly mounted resonator structures.

In order to take up the challenge of BAW-based time reference, this paper presents new BAW/Integrated Circuits (IC) co-integration considerations. For the demonstration, a SiP approach is proposed where the Solidly Mounted Resonator (SMR) has been directly flip-chipped on the top of the IC. This 2.5 GHz oscillator reaches a -93 dBc/Hz phase noise at a 2 kHz carrier offset for a 7.3 mW power consumption. A 5 bit switched capacitor bank permits to correct process deviations with a 12.5 kHz accuracy while a varactor capacitance allows compensating a SMR with a -4.2 ppm/°C Temperature Coefficient of Frequency (TCF) in a [-40°C,85°C] temperature range.

This paper presents different acoustic technologies available for innovative wireless designs. Solidly mounted BAW resonators, coupled resonator filters, Lamb wave devices and guided wave components are described. The advantages of these technologies are highlighted and their performances are compared. All these technologies can be used to design highly integrated wireless architectures.

This paper investigates the nonlinear behavior of CRF filters. First, measurements carried out on stand-alone resonators underline the impact of resonator size and loading layer thickness on linearity. Then, a comparison between a BAW filter and a CRF filter is presented regarding second order nonlinearities. Finally, the nonlinear behavior of CRF filters at high power levels has been investigated through co-integration of the CRF with a silicon PA in order to evaluate its impact in a WCDMA application.

This paper presents a miniaturized 2.5 GHz frequency source based on compensated BAW resonator with its integrated temperature molybdenum sensor assembled on the differential Colpitts oscillator. The presence of silicon dioxide layer having a positive temperature coefficient compared to other layers is used to reduce the resonator's drift. A demonstration oscillator achieves a frequency drift of 40 ppm over a temperature range from -35degC to +85degC. The oscillator's phase noise of -113 dBc/Hz at 10 kHz offset from the carrier is reported at 2.5 GHz.

This paper intends to provide a contribution for a better understanding of the self-heating effect in BAW SMR by developing a predictive 1D-model. Knowing the power dissipated inside the SMR, the presented model allows us estimating the temperature distribution inside the different layers of resonators used to build BAW filters. Model is compared with both experimental measurements and Finite Elements Analysis. Conclusions concerning the device reliability can eventually be drawn.

The development of radiofrequency transmission systems is going towards integration of all functions including filtering. In this domain, filters using BAW (bulk acoustic wave) resonators are being studied increasingly in advanced structures such as coupled resonator filter (CRF). The industrial testing of these devices, and generally the test of analog components, remains an unexplored field. A new method for testing the devices using a VNA is proposed. The main idea is to reduce the time that the characterization of a filter requires. The solution specifies a limited number of points that could characterize the filters. For this purpose a series of filters was characterized and the method was validated on 5 to 11 measured points. This procedure defines the number of points requested to discriminate the defected filters. As a final step, simulations are done using an electrical model in broadband; this approach gives physical information of the measurements and contributes to build a library of defected filter models.

Coupled resonator filters (CRF) are an evolution of bulk acoustic wave (BAW) filters which overcome the limitations of BAW and SAW filters and may become in the next few years the leading technology for RF filters. This paper presents for the first time a 200 mm process for CRF utilizing equipments and infrastructures of a standard IC fab. Key process improvements to reach an attractive device yield on wafer, in particularly the trimming process, are described.

This work presents the design and the measured performances of a duplexer based on bulk acoustic wave coupled resonator filter (BAW CRF) for W-CDMA application. This device is dedicated to be integrated in a RF module for cellular phone. A co-simulation methodology between a 1D acoustic model (Mason-type) and an electromagnetic solver is developed to allow a good prediction of the filter response on a large frequency range. The minimum insertion loss for the Tx and Rx filter is better than -3 dB and the isolation between Tx and Rx ports is greater than 60 dB. The rejection of the Tx filter is better than -50 dB in the Rx frequency range and is up to -67 dB in the Tx frequency range. The CRFs handle up to 27 dBm at Tx center frequency.