In this publication, we present the results obtained on the development of a low-cost technology for transferring electronic components using flip-chip technology, based on the creation of interconnections by screen printing. The technology was first qualified on CMUT-type components with through-hole contacts. Given the excellent results obtained, the screen-printing technology was then developed for much more aggressive interconnection pitches. This low-cost approach for components incorporating higher-density interconnections has been qualified and characterized by very promising electrical tests. All of these results are presented in this paper, and the prospects for further development are also outlined in the final paragraph.

In this paper, we present the modeling and characterization of AlN-based piezoelectric micromachined ultrasonic transducers (PMUTs) dedicated to biomedical applications. Our study encompasses detailed analytical modeling of these transducers in both air and water environments. The model is confronted with finite element simulations that account for realistic issues such as imperfect clamping. To validate the model's relevance, we compare its predictions with results from optical, electrical, and acoustical characterization. This comprehensive approach provides a robust framework for understanding PMUT behavior and facilitates efficient modeling of future devices.

This research paper presents a comprehensive methodology for the efficient modeling of piezoelectric micromachined ultrasonic transducers (PMUTs) using a combination of finite and lumped element models. A single membrane is first studied in air with an eigenfrequency study in order to calibrate the lumped element model on the finite element model. From this electrical equivalent circuit, a complete model of the PMUT cell composed of numerous membranes is developed using the propagation, directivity, absorption, mutual and self-impedances, and variability of the resonance frequencies due to manufacturing discrepancies. The calculated acoustic response of the PMUT is then compared with a measured response, in water. The relatively good agreement between the simulation and the measurement, as well as the very low computation time, makes this approach relevant for further optimization of the PMUT design to target larger bandwidth and higher sensitivity.

We report a study of AlN-based piezoelectric micromachined ultrasonic transducers (PMUT) dedicated to biomedical applications. The fabrication, the packaging, the electrical and acoustical characterization of the devices are reported and compared with the expectations. The device exhibits a 35% -3dB bandwidth with a central frequency at 10.4 MHz. The drive sensitivity is measured at 0.63 kPa/V/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the receive sensitivity at 570 μA/MPa/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . This confirms the potential of PMUT as low-voltage, miniaturized ultrasound transducers for biomedical applications.

This paper demonstrates, for the first time, an on-chip integration of a photoacoustic (PA) detector, one of the main building blocks required for chemical sensing. This MEMS PA detector consists of a miniaturized PA cell within an acoustic transducer based on an innovative microphone architecture. Coupled with a quantum cascade laser (QCL) source, this trace gas detector can measure very low concentrations of less than one part per million.

For the first time, functional in-plane deflection microphones have been fabricated, validating a new concept based on a diaphragm moving in the plane of the substrate and inducing strain on piezoresistive Si nano-gauges. Such architecture, integrating furthermore a back cavity, leads to microphones with a smaller footprint that preserve at the same time high performance, and is therefore adapted for the achievement of miniature sensors and their integration for medical applications or consumer electronics.

This paper describes the study carried out in order to characterize the influence of the main fabrication steps of the silicon nano-gauge on their l/f noise. Geometry of the nano-gauge, doping level, thinning process of gauges, doping before or after gauges patterning, release process and treatments for trap curing have been studied. Gauges release has a great impact on the l/f noise: it increases the noise by a factor of up to 100 for the smallest gauges. N2H2 annealing and O 2 plasma treatment reduce the noise generated by the release of the gauge. We assume that the origin behind the noise increase is the trapping-detrapping of carriers in surface traps of the nano-gauge.

A wide range of current-sensing techniques has been developed to satisfy various electrical and electronics applications requirements. In high-voltage applications, the main issue is the electrical isolation with accurate measurement at low signal levels. Isolated shunt technology is an attractive and versatile solution for current sensing. Electrical isolated products usually need a power supply at both low and high voltage sides. An original topology that needs only one power supply at the secondary (low voltage) side is reported. In this paper, we introduce an implementation of an integrated shunt current-measurement microsystem based on a 6 kV isolated micro-transformer. This work finds its applications in many domains such as hybrid or electric vehicle battery monitoring or motor control, system building automation or smart grids, where small size and low cost are required.

Improvements in semiconductors translate quickly into improvements in human health care, energy conservation, and high-frequency communication. The reduction in size and power of diagnostic and health-monitoring equipment demonstrates the impact of these trends. Efficiency improvements in electronics and harvesting of ambient energy in many forms increasingly allow ubiquitous electronic monitoring. Networked communication across the world, across the room or across the human body; all these are offshoots of increased awareness of power use coupled with novel communication methods.

In this paper, we propose an on-chip dc-dc buck converter for fine-grain dynamic voltage scaling (DVS) on a multi-power domain SoC. The proposed circuit converts from the I/O voltage to the required core operating voltage. This regulator is equipped with the programmable output buffer and the switching signal modulator according to the module operating condition. The proposed converter is fabricated with a 65-nm standard CMOS logic process within the area of 5 bonding pads. The maximum power efficiency is over 88%, and the leakage current in the deep stand-by mode is measured only 19 nA.

In complex embedded applications, optimisation and adaptation of both dynamic and leakage power have become an issue at SoC grain. A fully power-aware globally-asynchronous locally-synchronous. network-on-chip (NoC) circuit is presented in this paper. Network-on-chip architecture combined with a globally-asynchronous locally-synchronous paradigm is a natural enabler for DVFS mechanisms. The circuit is arranged around an asynchronous network-on-chip providing scalable communication and a 17 Gb/s throughput while automatically reducing, its power consumption by activity detection. Both dynamic and static power consumptions are globally reduced using adaptive design techniques applied locally for each synchronous NoC units. No fine control software is required during voltage and frequency scaling. Power control is localized and a minimal latency cost is observed.

This paper proposes an on-chip dc-dc converter for a fine grain IP-level DVS. Linear and switching regulators are compared considering this particular application. The chosen buck converter operates with the I/O power supply and uses two discrete devices, a capacitor and an inductor. A test design adaptable to the various operation modes of a logic block is described. Simulation results of the proposed dc-dc converter demonstrate that the maximum power efficiency is over 90% and the leakage current is reduced down to 84 nA.

This paper discusses a local power supply unit designed for fine grain dynamic voltage scaling (DVS) in a multi-power domain SoC. The proposed power supply unit is fully compatible with an I/O library and adaptable to various logic module power needs. It delivers the module operating voltage, from 1.2 V to 0.6 V, according to predefined operating power modes and is equipped with the module power gating. The designed circuit requires five-I/O-pad pitch area in a 65-nm technology. The first test chip demonstrates that the maximum power efficiency is over 87% and the measured current consumption in stand-by mode is only 19 nA regardless of the connected module.

A harvesting microsystem is a heterogeneous component that is to say with at least one element none strictly electric. Several key points have to be taken into account to achieve a design of this kind of system: software-hardware partitioning, multi-physics simulation, 3D integration. This article introduces a top down methodology from specifications to layout. After a focus on specificities and needs of autonomous microsystems, the proposed methodology will be used to design an autonomous power generator unit including two micropower sources and their management IC: a RF power receiver and a IV miniature thermogenerator with a dedicated DC/DC up converter are combined with an manager and charger, and a discharge monitor to manage and store the harvested energy in an above-IC microbattery.Finally, consumption reduction by specified static and dynamic architecture and regulation between load and source will introduce the need of energy optimization algorithm in the proposed methodology.

An autonomous power generator unit including two micropower sources and their management IC has been fabricated: a RF power receiver and a 1 V miniature thermogenerator combined with a micropower DC/DC up-converter are combined with a 78% efficiency manager and charger, and a 5 nW discharge monitor to manage and store the harvested energy in a 30 above-IC deposited microbattery.

The proposed microsystem architecture comprises two power sources, and a microbattery used as a storage unit ; a complete integrated circuit transforms and manages the harvested energy and interfaces the microbattery. The first source is a RF power receiver combined with a classical RF converter. The second micropower source is a 1V miniature thermogenerator based on sintered bismuth telluride thermoelements, combined with a micropower DC/DC up converter. The converter architecture includes an innovative power switch control designed for better power efficiency, and improved supply noise performance. The microbattery is a lithium, solid-state, battery post-processed on the integrated circuit. A discharge monitor with 5nW power consumption, along with a 78% efficiency charge unit interfaces the battery. These harvesting and power storage devices are foreseen as a way to provide power on a chip, allowing either permanent active security for smart card applications or sensors supply for monitoring applications for example.

Conversion device voltage comprising means (2) forming a converter DC / DC, means (7) forming an energy reservoir capable of feeding means (4), characterized in that the means forming the energy reservoir are threshold detectors to provide a trigger signal to start the converter, sampling detecting means threshold input signal (Ve) and detecting the occurrence of a voltage signal usable input converter, enabling means threshold detectors supply a start signal to the converter when the input signal is above a threshold, being supplied the input signal by a different power source of the means forming the energy reservoir.

This presented work has been conducted in a framework of a project with the objective to associate power microsources into smart cards in order to create novel functionalities. To demonstrate the feasibility of such a new powered microsystem, a demonstrator named PEA Card is under development.It is powered by two rechargeable batteries:• A microbattery on chip for security applications.• A Thin Film Power Battery inside the card packaging to recharge the microbattery and to supply user interfaces.An ASIC, used as substrate for the microbattery, manages the energy of the two power sources. It is designed to have a very low consumption. A processor and a display, powered by the embedded Power Battery, allow the user to access data without external source of energy. An RFID antenna permits a contactless charge of the two batteries.