Improvements in circuit design and, more recently, in materials and surface cleaning have contributed to a rapid development of coherent superconducting qubits. However, organic resists commonly used for shadow evaporation of Josephson junctions (JJs) pose limitations due to residual contamination, poor thermal stability, and compatibility under typical surface-cleaning conditions. To provide an alternative, we developed an inorganic SiO2/Si3N4 on-chip stencil lithography mask for JJ fabrication. The stencil mask is resilient to aggressive cleaning agents and it withstands high temperatures up to 1200 °C, thereby opening new avenues for JJ material exploration and interface optimization. To validate the concept, we performed shadow evaporation of Al-based transmon qubits followed by stencil mask liftoff using vapor hydrofluoric acid, which selectively etches SiO2. We demonstrate an average T1≈75±11 μs over a 200 MHz frequency range across multiple cooldowns for one device, and T1≈44±8 μs for a second device. These results confirm the compatibility of stencil lithography with state-of-the-art superconducting quantum devices and motivate further investigations into materials engineering, film deposition, and surface cleaning techniques.

High quality crystalline growth of a thin film on sapphire requires sufficient substrate preparation, often achieved via the use of aggressive chemical cleaning. Direct thermal reconstruction of the sapphire substrate via a CO_2 laser beam may allow for an alternative way to prepare the substrate for epitaxy without the use of any chemical processing. Within this work, we demonstrate that thermal annealing of sapphire into its (√(31)×√(31))R±9° reconstruction is a valid alternative preparation technique for sapphire substrates. TiN films grown via plasma-assisted molecular beam epitaxy upon these substrates exhibit greater crystallinity than those grown on chemically cleaned sapphire substrates. Superconducting resonators fabricated from these films exhibit similar performance, with many possessing internal quality factors at single photon levels greater than 10^6 for both substrate preparation methods.

The realization of various qubit systems based on high-quality hybrid superconducting quantum devices, is often achieved using semiconductor nanowires. For such hybrid devices, a good coupling between the superconductor and the conducting states in the semiconductor wire is crucial. GaAs/InAs core/shell nanowires with an insulating core, and a conductive InAs shell fulfill this requirement, since the electronic states are strongly confined near the surface. However, maintaining a good crystal quality in the conducting shell is a challenge for this type of nanowire. In this work, we present phase-pure zincblende GaAs/InAs core/shell nanowires and analyze their low-temperature magnetotransport properties. We observe pronounced magnetic flux quantum periodic oscillations, which can be attributed to a combination of Aharonov-Bohm and Altshuler-Aronov-Spivak oscillations. From the gate and temperature dependence of the conductance oscillations, as well as from supporting theoretical transport calculations, we conclude that the conducting states in the shell are in the quasi-ballistic transport regime, with few scattering centers, but nevertheless leading to an Altshuler-Aronov-Spivak correction that dominates at small magnetic field strengths. Our results demonstrate that phase-pure zincblende GaAs/InAs core/shell nanowires represent a very promising alternative semiconductor nanowire-based platform for hybrid quantum devices.

Efficient computing in cryogenic environments, including classical von Neumann, quantum, and neuromorphic systems, is poised to transform big data processing. The quest for high-density, energy-efficient memories continues, with cryogenic memory solutions still unclear. We present a Cryogenic Capacitorless Random Access Memory (C2RAM) cell using advanced Si technology, which enhances storage density through its scalability and multistate capability. Remarkably, the C2RAM maintains data for over a decade with its extended retention times and offers potential as an artificial synapse. This positions C2RAM as an ideal nonvolatile memory candidate for cryogenic computing applications and emerging quantum technologies.

The successful demonstration of (Si)Ge1-xSnx alloys as direct-gap materials for infrared lasers has driven intense research on group IV-based devices for nanoelectronics, energy harvesting, and quantum computing applications. The material palette of direct-gap group-IV alloys can be further extended by introducing carbon to fine-tune their structural and electronic properties, significantly expanding their functionality. This work presents heteroepitaxial growth of C(Si)GeSn alloys using an industry-standard reduced-pressure chemical vapor deposition reactor. The introduction of CBr4 as a precursor enables controlled incorporation of C atoms (<1 at.%) into the epilayer lattice, while simultaneously increasing the Sn content in the CGeSn alloy up to ≈18 at.%. Carbon plays a key role in modulating strain, stabilizing the crystal structure, and influencing material properties. By leveraging alloying and strain engineering, quaternary CSiGeSn bulk layers and CGeSn/GeSn heterostructures are epitaxially grown. The impact of C incorporation on optical emission is investigated in LEDs based on CGeSn/GeSn multiple quantum wells, demonstrating enhanced near-infrared emission at 2.54 µm, which is sustained up to room temperature.

Core-only InAs nanowires (NWs) remain of continuing interest for application in modern optical and electrical devices. In this paper, we utilize the II-VI semiconductor CdSe as a shell for III-V InAs NWs to protect the electron transport channel in the InAs core from surface effects. This unique material configuration offers both a small lattice mismatch between InAs and CdSe and a pronounced electronic confinement in the core with type-I band alignment at the interface between both materials. Under optimized growth conditions, a smooth interface between the core and shell is obtained. Atom probe tomography (APT) measurements confirm substantial diffusion of In into the shell, forming a remote n-type doping of CdSe. Moreover, field-effect transistors (FETs) are fabricated, and the electron transport characteristics in these devices is investigated. Finally, band structure simulations are performed and confirm the presence of an electron transport channel in the InAs core that, at higher gate voltages, extends into the CdSe shell region. These results provide a promising basis toward the application of hybrid III-V/II-VI core/shell nanowires in modern electronics.

As transistor scaling advances, the necessity to replace silicon with materials possessing superior carrier mobilities intensifies. Group-IV semiconductors, with a particular emphasis on GeSn alloys, are distinguished by their exceptional electron and hole mobilities, rendering them prime candidates for advanced electronic applications. The vertical gate-all-around (GAA) nanowire transistor emerges as the pivotal device architecture, offering enhanced electrostatic control and a minimized physical footprint. This paper provides a comprehensive overview of vertical GAA GeSn nanowire CMOS devices. We construct vertical GAA nanowire transistors with epitaxial GeSn heterostructures, capitalizing on advancements in material growth, precise in-situ doping, and strategic band engineering across the source, channel, and drain regions. By harnessing GeSn's superior mobilities for both electrons and holes, we have developed and fabricated both p-FETs and n-FETs. The p-FET benefits from the high hole mobility of the Ge channel and the elevated injection velocity from the GeSn source, yielding significantly enhanced performance compared to devices solely made of Ge. For n-FETs, our findings reveal that incrementally increasing the Sn content in GeSn alloys leads to continuous performance enhancements, with an 11% Sn composition achieving a fivefold increase in on-current compared to traditional Ge-based devices. These outcomes underscore the immense potential of GeSn alloys in elevating the performance and energy efficiency of next-generation nanoelectronic devices.

Neighborhood at atomic scale is important for the properties of advanced alloys. The preference or avoidance between neighboring atomic species is known as chemical short-range order (SRO). While SRO in metallic medium/high entropy alloys has garnered substantial attention recently, understanding SRO in semiconductor alloys remains underdeveloped. Motivated by theoretically predicted SRO and its dramatic impact on band structure, here we perform statistical analyses of atom probe tomography data to quantify SRO in SixGe1-x-ySny alloys (x<12 at.%, y<16 at.%). Leveraging a side-by-side experiment-theory comparison at the same spatial scale enabled by machine-learning neuroevolution potentials of first-principles accuracy, we reveal, for the first time, a notable SRO favoring Si-Si 1st nearest neighbors even at dilute Si and Sn compositions. The SRO can be tuned by varying precursors, offering a new degree of freedom for band engineering beyond composition and strain, and enabling new phase-change materials based on SRO transitions for Si electronics/photonics.

The structural and optical properties of p-doped Ge quantum wells separated by SiGe barriers are presented. The composition profile was determined by atom probe tomography and X-ray diffraction measurements. The energy and broadening of the fundamental intersubband transition were studied by Fourier transform infrared spectroscopy which revealed a strong absorption peak around 8.5 μm making this or similar heterostructures suitable for the realization of optoelectronic devices working in the fingerprint region.

A systematic investigation of the NiGeSn formation and its contact resistivity with GeSn semiconductors are studied. The method of investigation is based on the circular transmission line measurement (CTLM) geometry. The optimum NiGeSn formation temperature is 325 degrees C, offering a lower contact resistivity of 4.15 x 10-5 omega center dot cm2 on n-GeSn. The elemental diffusion mechanism during the NiGeSn formation is also discussed. In line with the research of new materials for cryogenic electronics, GeSn shows a low contact resistivity of 1.79 x 10-5 omega center dot cm2 at 5 K. These findings offer valuable insights into optimizing GeSn-based contact technologies for both low-power and cryogenic applications.

Approaches to developing large-scale superconducting quantum processors must cope with the numerous microscopic degrees of freedom that are ubiquitous in solid-state devices. State-of-the-art superconducting qubits employ aluminium oxide (AlOx) tunnel Josephson junctions as the sources of nonlinearity necessary to perform quantum operations. Analyses of these junctions typically assume an idealized, purely sinusoidal current-phase relation. However, this relation is expected to hold only in the limit of vanishingly low-transparency channels in the AlOx barrier. Here we show that the standard current-phase relation fails to accurately describe the energy spectra of transmon artificial atoms across various samples and laboratories. Instead, a mesoscopic model of tunnelling through an inhomogeneous AlOx barrier predicts percent-level contributions from higher Josephson harmonics. By including these in the transmon Hamiltonian, we obtain orders of magnitude better agreement between the computed and measured energy spectra. The presence and impact of Josephson harmonics has important implications for developing AlOx-based quantum technologies including quantum computers and parametric amplifiers. As an example, we show that engineered Josephson harmonics can reduce the charge dispersion and associated errors in transmon qubits by an order of magnitude while preserving their anharmonicity.

Chemical short-range order (SRO) in alloys denotes the statistical preference or avoidance between atomic species on neighboring lattice sites. Here, we highlight SRO as a powerful new mechanism for semiconductor alloy band engineering. Atom probe tomography reveals a significantly higher probability of Sn-Sn first nearest neighbors (1NNs) in thin-film GeSn alloys grown by molecular beam epitaxy (MBE) vs. chemical vapor deposition (CVD). Remarkably, although lower Sn concentration typically widens the bandgap, we find that the stronger presence of Sn-Sn 1NN pairs in MBE samples overrides this trend, resulting in a narrower bandgap despite having 2 at.% lower Sn content than CVD samples. First-principles modeling corroborates this effect, attributing these SRO variations to distinctive surface terminations and growth temperatures between MBE and CVD. These findings establish SRO as a new degree of freedom for semiconductor band engineering beyond composition, strain, and quantum confinement, unlocking novel device mechanisms for the post-Moore era.

As transistors continue to shrink, the need to replace silicon with materials of higher carrier mobilities becomes imperative. Group-IV semiconductors, and particularly GeSn alloys, stand out for their high electron and hole mobilities, making them attractive for next-generation electronics. While Ge p-channel devices already possess a high hole mobility, here the focus is on enhancing n-channel transistor performance by utilizing the superior electron mobility of GeSn as channel material. Vertical gate-all-around nanowire (GAA NW) transistors are fabricated using epitaxial GeSn heterostructures that leverage the material growth, in situ doping, and band engineering across source/channel/drain regions. It is demonstrated that increasing Sn content in GeSn alloys constantly improves the device performances, reaching a fivefold on-current improvement over standard Ge devices for 11 at.% Sn content. The present results underline the real potential of the GeSn alloys to bring performance and energy efficiency to future nanoelectronics applications.

Over the past three decades, the growth of Bi thin films has been extensively explored due to their potential applications in various fields such as thermoelectrics, ferroelectrics, and recently for topological and neuromorphic applications, too. Despite significant research efforts in these areas, achieving reliable and controllable growth of high-quality Bi thin-film allotropes has remained a challenge. Previous studies have reported the growth of trigonal and orthorhombic phases on various substrates yielding low-quality epilayers characterized by surface morphology. In this study, we present a systematic growth investigation, enabling the high-quality growth of Bi epilayers on Bi-terminated Si (111) 1 × 1 surfaces using molecular beam epitaxy. Our work yields a phase map that demonstrates the realization of trigonal, orthorhombic, and pseudocubic thin-film allotropes of Bi. In-depth characterization through X-ray diffraction (XRD) techniques and scanning transmission electron microscopy (STEM) analysis provides a comprehensive understanding of phase segregation, phase stability, phase transformation, and phase-dependent thickness limitations in various Bi thin-film allotropes. Our study provides recipes for the realization of high-quality Bi thin films with desired phases, offering opportunities for the scalable refinement of Bi into quantum and neuromorphic devices and for revisiting technological proposals for this versatile material platform from the past 30 years.

Neuromorphic computing employs a great number of artificial synapses which transfer information between neurons. Conventional two- or three-terminal artificial synapses with homosynaptic plasticity suffer from a positive feedback loop problem. Synapses with heterosynaptic plasticity are thus required to perform learning, processing and modulating simultaneously. Here, complementary metal-oxide-semiconductor compatible artificial synapses based on ferroelectric polarization modulated Schottky diodes (FEMOD) on silicon, which enables heterosynaptic plasticity with multi-functionalities, high endurance, low power consumption, and high speed, are presented. High accuracy is obtained in the supervised learning simulation of artificial neural networks due to the large number of conductance states, good linearity, and small variations of FEMOD synapses. Boolean functions are demonstrated with only one or two FEMOD devices operating at low voltage and low power consumption. The proposed device structure performs multi-functions of biological synapse and Boolean logic, thus provides high potential for the future large scale and low power neuromorphic computing applications.

Vertical gate-all-around (GAA) nanowire (NW) FETs based on Si compatible group IV GeSn alloys are presented. The NW devices with diameter of 25 nm show an almost ideal subthreshold swing (SS) of 65 mV/dec at 300 K. The increased Sn content in the GeSn channel offers a larger population of electrons in the $\Gamma$ -valley that exhibit a lower effective mass and larger mobility. This is confirmed by comparison of two fabricated devices with 10% and 8% Sn content channels, where the GeSn channel n-FETs with 10% Sn content shows larger $I_{\text{ON}}$ and higher transconductance than the one with 8% Sn content. At low temperatures, the devices show a low SS of 9 mV/dec as well as a very sharp transition from subthreshold to on-state, revealing a high potential for cryo-CMOS applications.

The effect of band edge states is the critical issue for cryogenic CMOS, which worsens the performance of conventional MOSFETs at cryogenic temperature (Cryo-T) with saturated subthreshold swing (SS), large transition region (inflection phenomenon) and limited mobility. To address these problems, we fabricated gate-all-around (GAA) Si nanowire (NW) MOSFETs using fully silicided source/drain and dopant segregation. The effect of band edge states is significantly suppressed using this technology. Thus, SS, the effective average $\mathrm{SS_{th}}$ and the transconductance (Gm) continuously improve as temperature decreases allowing us to achieve high performance NW FETs at 5.5 K with a record small SS of 2.3 mV/dec, ultra-small DIBL of 0.02 mV/V, and high Gm of 1.25mS/$\mu$m at Vd= 0.1V.

The effect of band edge states is the critical issue for cryogenic CMOS, which worsens the performance of conventional MOSFETs at cryogenic temperature (Cryo-T) with saturated subthreshold swing (SS), large transition region (inflection phenomenon) and limited mobility. To address these problems, we fabricated gate-all-around (GAA) Si nanowire (NW) MOSFETs using fully silicided source/drain and dopant segregation. The effect of band edge states is significantly suppressed using this technology. Thus, SS, the effective average $\mathrm{SS_{th}}$ and the transconductance (G <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> ) continuously improve as temperature decreases allowing us to achieve high performance NW FETs at 5.5 K with a record small SS of 2.3 mV/dec, ultra-small DIBL of 0.02 mV/V, and high G <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> of 1.25mS/$\mu$m at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</inf> = 0.1V.