The nonlinear characteristics arising from the third-order intermodulation distortion (IMD3) of MOSFETs are investigated by harmonic-balance device simulation. First, to identify the spatial location in a MOSFET, where IMD3 is mostly generated, a conventional n-MOSFET structure is simulated, and it is found that IMD3 generation is located at the top surface over the channel–drain p–n junction where a high lateral electric-field exists. Second, to alleviate the impact of IMD3, we proposed and simulated three types of n-MOSFET structures with a low lateral electric-field around the channel–drain junction. We demonstrated that a low-distortion MOSFET can be realized by optimizing the doping concentration profile at the channel–drain junction. In particular, the introduction of a thin layer of a low-doped n-type surface-channel and a low-doped n-type drain at the top of p-type well and n-type drain regions resulted in a marked IMD3 reduction of as much as 8 dBm in IMD3 power characteristics, in comparison with a conventional structure.

This chapter begins with the physical description of integrated circuit devices, considering both the physical configuration and related device properties, and considers the links between the broad range of physics and electrical behavior models that support circuit design. It deals with comments very similar to those with which it began; physics-based modeling of devices is an essential part of the development process for integrated circuit electronics. The requirements for and use of technology computer-aided design cut across a very broad landscape of design automation issues, including many fundamental physical limits. At the core are a host of process and device modeling challenges that support intrinsic device scaling and parasitic extraction. The simulation levels of process and device modeling are considered as integral capabilities that together provide the "mapping" from mask-level information to the functional capabilities needed at the electronic design automation level, such as compact models and even higher-level behavioral models.

This theoretical study investigates the nonlinear ionic current-voltage characteristics of nano-channels that have weakly overlapping electrical double layers. Numerical simulations as well as a 1-D mathematical model are developed to reveal that the electro-osmotic flow (EOF) interplays with the concentration-polarization process and depletes the ion concentration inside the channels, thus significantly suppressing the channel conductance. The conductance may be restored at high electrical biases in the presence of recirculating vortices within the channels. As a result of the EOF-driven ion depletion, a limiting-conductance behavior is identified, which is intrinsically different from the classical limiting-current behavior.

We investigate the field-effect control of ions in nanofluidic transistors (NFTs) with characteristic channel size (~100 nm) significantly larger than the system's Debye Length (~10 nm). These 100 nm NFTs achieve an ionic current modulation ratio of ~2.5, demonstrating better performance than the state-of-the-art 20 nm NFTs. The result attests a new operating regime beyond the Debye-screening limit. The relaxed constraint on channel size offers advantages in device manufacturing, testing, and reliability. It also opens up new applications in biological sensing and sample preparation.

In this paper, using a fully-coupled, three-dimensional electro-thermal device simulator, we study the mechanism of efficiency degradation at high current operation in planar GaN-based light emitting diodes (LED). In particular, the improvement of the efficiency degradation using thicker conductive GaN substrates has been demonstrated. First, it is found that local Joule heating inside thin conductive GaN substrates degrades internal quantum efficiency (IQE) and increases the series resistance. Then, we introduced thicker conductive GaN substrates and simulated distributions of the current density and temperature inside the substrate. It is found that the maximum current density inside the GaN substrate decreases by about six times for a 100-µm-thick substrate compared to that for a 5-µm-thick substrate. Therefore, the maximum junction temperature decreases, and then IQE and the driving voltage are improved. The present study proves that thick GaN substrates are effective to improve the properties of planar LEDs at high current operation.

In this work, we present a methodological approach to analyze an enhanced dielectrophoresis (DEP) system from both a circuit analysis and electrothermal view points. In our developed model, we have taken into account various phenomena and constraints such as voltage degradation (due to the presence of the protecting oxide layer), oxide breakdown, instrumentation limitations, and thermal effects. The results from this analysis are applicable generally to a wide variety of geometries and high voltage microsystems. Here, these design guidelines were applied to develop a robust electronic actuation system to perform a multiplexed bead-based protein assay. To carry out the multiplexed functionality, along a single microfluidic channel, an array of proteins is patterned, where each element is targeting a specific secondary protein coated on micron-sized beads in the subsequently introduced sample solution. Below each element of the array, we have a pair of addressable interdigitated electrodes. By selectively applying voltage at the terminals of each interdigitated electrode pair, the enhanced DEP, or equivalently 'ultra'-DEP (uDEP) force detaches protein-bound beads from each element of the array, one by one, without disturbing the bound beads in the neighboring regions. The detached beads can be quantified optically or electrically downstream. For proof of concept, we illustrated 16-plex actuation capability of our device to elute micron-sized beads that are bound to the surface through anti-IgG and IgG interaction which is on the same order of magnitude in strength as typical antibody-antigen interactions. In addition to its application in multiplexed protein analysis, our platform can be potentially utilized to statistically characterize the strength profile of biological bonds, since the multiplexed format allows for high throughput force spectroscopy using the array of uDEP devices, under the same buffer and assay preparation conditions.

In this paper, we study the hole transport properties in strained-SiGe channel p-MOSFETs (sSG pMOSFETs) with a Si-cap layer, which is introduced to avoid degradation of interface quality between gate oxide and channel. By using device simulation considering Ge diffusion, quantum confinement effects, surface roughness scattering and Coulomb scattering due to interface charges, and also experimental measurement, we clarify the roles of a Si-cap layer in sSG pMOSFETs, and furthermore propose its optimized design to obtain a higher device performance. We also demonstrate that the insertion of a Si-cap layer is effective to reduce an OFF-state leakage current owing to an increased band gap energy in the Si-cap layer. (C) 2013 Elsevier Ltd. All rights reserved.

By increasing the strength of the negative dielectrophoresis (DEP) force, we demonstrate a significantly improved electrokinetic actuation and filtering microsystem. A pinhole-free, nanometer-scale, thin film oxide was deposited using atomic layer deposition, as a protective layer to protect the electrodes from corrosion, when applying high AC voltages (>20 Vpp) at the electrodes. The electrodes were capacitively coupled to the electrolyte buffer by the application of a high frequency AC voltage signal, thus avoiding electric field degradation and the consequent reduction in dielectrophoresis force due to the presence of the insulating oxide layer. In this work, we demonstrated the use of this DEP-enhanced device for two microfluidic applications. First, we demonstrate an on-chip platform for the depletion of cells and highly abundant serum proteins in blood, which is a prerequisite to assay low-abundance protein biomarkers. For the second application, we show 100% detachment of anti-IgG and IgG bound beads (which is on the same order of magnitude in strength as typical antibody-antigen interactions) from the surface, upon the application of the enhanced negative DEP force. This capability offers the possibility of performing a bead-based multiplexed assay against multiple antigen targets where in a single microfluidic channel various regions are immobilized with a different antibody, each targeting a different antigen.

This paper analyzes aging effects on various design hierarchies of a sub-45nm commercial processor running realistic applications. Dependencies of aging effects on switching-activity and power-state of workloads are quantified. This paper presents an “instance-based” simulation flow, which creates a standard-cell library for each use of the cell in the design, by aging each transistor individually. Implementation results show that processor timing degradation can vary from 2% to 11%, depending on workload. Lifetime computational power efficiency improvements of optimized self-tuning is demonstrated, relative to a one-time worst-case guardbanding approach.

By increasing the strength of the negative dielectrophoresis force, we demonstrated a significantly improved electrokinetic actuation and switching microsystem that can be used to elute specifically bound beads from the surface. In this work using atomic layer deposition we deposited a pinhole free nanometer-scale thin film oxide as a protective layer to prevent electrodes from corrosion, when applying high voltages (>20 V(pp)) at the electrodes. Then, by exciting the electrodes at high frequency, we capacitively coupled the electrodes to the buffer in order to avoid electric field degradation and, hence, reduction in dielectrophoresis force due to the presence of the insulating oxide layer. To illustrate the functionality of our system, we demonstrated 100% detachment of anti-IgG and IgG bound beads (which is on the same order of magnitude in strength as typical antibody-antigen interactions) from the surface, upon applying the improved negative dielectrophoresis force. The significantly enhanced switching performance presented in this work shows orders of magnitude of improvement in on-to-off ratio and switching response time, without any need for chemical eluting agents, as compared to the previous work. The promising results from this work vindicates that the functionality of this singleplexed platform can be extended to perform a multiplexed bead-based assay where in a single channel an array of proteins are patterned each targeting a different antigen or protein.

This work investigates the robustness of a stacked or cascoded driver under electrostatic discharge (ESD) events. Using output driver circuits in an actual I/O system with predrivers and rail-based power clamps, the impacts of all possible predriver connections and stacked-driver sizing are examined with the very fast transmission line pulse. It is verified that, when the input of the predriver connected to the top MOSFET is grounded, the failure current (IT2) is improved by ~ 110%, compared to the worst case where both predriver inputs are tied to VDD. Also, a simple trigger circuit which guarantees the electrical connection for better ESD immunity is proposed.

With the aid of negative dielectrophoresis (nDEP) force in conjunction with shear force and at an optimal sodium hydroxide (NaOH) concentration we demonstrated a switch-like functionality to elute immuno-bound beads from the surface. At an optimal flow rate and NaOH concentration, nDEP turned on results in bead detachment, whereas when nDEP is off, the beads remain attached. This platform offers the potential for performing a bead-based multiplexed immunoassay where in a single channel various regions are immobilized with a different antibody, each targeting a different antigen. As a proof of concept we demonstrated the ability of nDEP to provide this switching behavior in a singleplex assay for the interactions that were in the same order of magnitude in strength as typical antibody-antigen interactions.

In this work, we demonstrate a novel and cost-effective approach to implement a disposable microfluidic contactless impedance cytometer. Conventional methods for single cell impedance cytometry use microfabricated electrodes in direct contact with the buffer to measure changes of its electrical impedance when cells pass through the applied electric field. However, this approach requires expensive microfabrication of electrodes, and also, the fabricated electrodes cannot be reused without thorough and time-consuming cleaning process. Here, we introduce a novel approach to allow for single cell impedance cytometry using electrodes that can be reused, without the need for microfabrication of the electrodes. This disposable device can be potentially inserted onto a printed circuit board (PCB) which has a non-disposable, yet inexpensive, electronic reading apparatus. This significantly reduces the manufacturing costs, making it suitable for low resource settings, such as point-of-care testing in the developing countries.

In this paper with the aid of negative dielectrophoresis force in conjunction with shear force and at an optimal sodium hydroxide concentration we demonstrated a switchlike functionality to elute specifically bound beads from the surface. At an optimal flow rate and sodium hydroxide concentration, negative dielectrophoresis turned on results in bead detachment, whereas when negative dielectrophoresis is off, the beads remain attached. This platform offers the potential for performing a bead-based multiplexed assay where in a single channel various regions are immobilized with a different antibody, each targeting a different antigen. To develop the proof of concept and to demonstrate the switchlike functionality in eluting specifically bound beads from the surface we looked at two different protein interactions. We chose interactions that were in the same order of magnitude in strength as typical antibody-antigen interactions. The first was protein G-IgG interaction, and the second was the interaction between anti-IgG and IgG.

We report the use of an array of electrically gated ~200 nm solid-state pores as nanofluidic transistors to manipulate the capture and passage of DNA. The devices are capable of reversibly altering the rate of DNA capture by over 3 orders of magnitude using sub-1 V biasing of a gate electrode. This efficient gating originates from the counter-balance of electrophoresis and electroosmosis, as revealed by quantitative numerical simulations. Such a reversible electronically tunable biomolecular switch may be used to manipulate nucleic acid delivery in a fluidic circuit, and its development is an important first step toward active control of DNA motion through solid-state nanopores for sensing applications.

Silicon-controlled rectifier (SCR) devices are used as local clamping ESD devices. However, conventional designs suffer from slow turn-on, which causes problems in sub 10 ns charged-device model (CDM) protection, especially in deeply scaled technologies. In this paper, a double-well field-effect diode (DWFED) and an improved field-effect diode (FED) are designed to address this challenge. They are fabricated and characterized in 45 nm silicon-on-insulator (SOI) technology and experimentally demonstrated to be suitable for pad-based local clamping under a normal supply voltage (Vdd) range (at or below 1 V) in high-speed applications. ESD protection capabilities are investigated using very fast transmission line pulse (VF-TLP) tests to predict the device performance in CDM events. FED’s advantages in improving transient turn-on behavior and reducing DC leakage current are analyzed and compared with the regular SCR and the DWFED. Technology CAD (TCAD) simulations are used to interpret turn-on behavior and guide design. The improved devices may be implemented in a local clamping scheme that expands the ESD design window for advanced technology nodes.

The five invited papers and 11 contributed papers in this special issue discuss topics such as process variation, device variability, hierarchical modeling tools, and address challenges such as device mismatch and SRAM noise margin variability.