Memristor-based neuromorphic computing offers a promising pathway for efficient in-memory processing. However, the scalability and reliability of such systems are severely compromised by parasitic resistances (including line and input resistances) in crossbar arrays, which cause significant IR-drop during vector-matrix multiplication (VMM). Existing research often suffers from high computational latency or relies on the precise extraction of parasitic parameters, which is impractical and computationally expensive for large-scale integration. To overcome these limitations, we propose a Parameter-Agnostic Adaptive Compensation (PAAC) method based on a distributed linear approximation model. By analyzing the circuit characteristics, we conquered the challenge of coupling between parasitic effects and output current, deriving a simplified linear relationship that requires no prior knowledge of specific resistance values. The PAAC method involves only a single-step pre-calibration experiment to determine a global compensation factor, achieving an ultra-low computational complexity during inference. We validated the method using a comprehensive two-stage strategy: board-level hardware experiments confirmed its feasibility by reducing current distortion from 71% to 2%, while extensive large-scale HSPICE simulations verified its scalability, restoring classification accuracy from 89% to 95%. This work provides a robust, low-overhead solution that eliminates the dependency on precise parameter modeling, facilitating the realization of large-scale, high-precision neuromorphic hardware.

Due to the Von Neumann bottleneck of traditional CMOS computing, there is an urgent need to develop in-memory logic devices with low power consumption. In this work, we demonstrate ferroelectric diode devices based on the TiN/Hf0.5Zr0.5O2/HfO2/TiN structure, implementing 16 Boolean logic operations through single-step or multi-step (2-3 steps) cascade and achieving attojoule-level one-bit full-adder computation. The TiN/Hf0.5Zr0.5O2/HfO2/TiN ferroelectric diode exhibits non-destructive readout and bidirectional rectification characteristics, with the conduction mechanism following Schottky emission behavior in the on-state. Based on its bidirectional rectification characteristics, we designed and simulated the circuit scheme of 16 Boolean logic and one-bit full-adder through cascaded operations. Both the input and output logic values are represented in the form of resistance, without the need for additional form conversion circuits. The state writing is performed by pulse-controlled polarization flipping, and the state reading is non-destructive. The logic circuits in this work demonstrate superior performance with ultralow computing power consumption in simulation. This breakthrough establishes a foundation for developing energy-efficient and scalable in-memory computing systems.

Abstract Reliable visual perception under extreme illumination (underexposure/overexposure) and the trade-off between device operation and photoresponse tunability remain challenges for wearable-compatible vision systems. Inspired by the adaptive gain-control mechanism of the vertebrate retina, we report a hardware-algorithm codesign framework based on defect-engineered ZnO synaptic thin-film transistors for in-sensor visual preprocessing and reservoir computing. On flexible polyimide substrates, a low-temperature (150 °C) defect-engineering strategy combining an Al2O3 planarization layer with a controlled air anneal drives the ZnO channel into a partially passivated state, reducing the defect-related O 1s component from 41.37% to 13.09% while retaining trap-related states required for programmable synaptic plasticity. The resulting synaptic TFTs achieve pA-level off-state currents and gate-programmable paired-pulse facilitation tunable from 163% to 112%. Building on this gate-tunable defect-mediated photoresponse, we design a simulated 20 × 20 pixel-level adaptive preprocessing array in which calibration-based dynamic gate-bias control enables physical-layer gain modulation to mitigate overexposure and enhance underexposed signals. This device-assisted physical-layer preprocessing yields a 5.8 dB improvement in peak signal-to-noise ratio and a 0.29 gain in the structural similarity index, restoring downstream machine-vision accuracy by 30.56 percentage points. Furthermore, exploiting the intrinsic fading memory of the defect-engineered ZnO channel, in-sensor physical reservoir computing is realized with a 96.58% recognition accuracy on the MNIST data set. This material-engineered strategy offers a potential pathway toward robust visual perception in unpredictable optical environments for wearable-compatible electronics.

Abstract Neuromorphic vision systems based on memristors offer an energy-efficient approach to artificial vision, yet traditional pixel(s)-to-one-memristor architectures remain inefficient in dynamic image processing due to limited temporary storage. Here, inspired by human visual working memory, we propose a one-pixel-multiple-memristor (1PnR) architecture with a rolling exposure strategy for fast sequential image acquisition. Furthermore, a data-in-situ computing network for efficient image processing is developed. With network weights mapped to voltage vectors and applied to the image storage memristor array, direct computation is enabled where the image is stored, and the energy-intensive data transmission is eliminated. A hardware prototype of the 1PnR architecture achieved 95.7% recognition accuracy on the Weizmann human action flow dataset. Compared to CMOS-based systems, this architecture is estimated to have a 2000× reduction in latency for image sensing and storage, and a 160× reduction in energy consumption image processing, demonstrating significant potential for future neuromorphic visual systems.

Logic-in-Memory computing (LiM) has emerged as a key approach to overcome the von Neumann bottleneck, and hafnium-based ferroelectric diode (Fe diode) is a promising candidate for this application. For further performance optimization, we fabricated Fe diode devices with two strcutures: TiN/HZO/TiN and interlayer-enhanced TiN/HZO/HfO2/TiN. The HfO2 interlayer devices exhibit improved retention characteristics while maintaining bidirectional rectification behavior and a welldefined logic window, enabling stable logic operations. We demonstrated a circuit scheme of implementing both IMP and NIMP logic functions in a single operation with an ultra-low operating power consumption of 20.65 aJ. Additionally, by configuring different device combinations, all 16 Boolean logic functions can be realized based on Fe diodes. This work highlights the potential of interlayer-enhanced Fe diodes, offering a simple, easy-to-integrate, and low power consumption approach for developing high-performance LiM systems.

The “memory wall” bottleneck in the Von Neumann architecture has driven the demand for in-memory computing devices. Ferroelectric memory has emerged as a strong contender for next-generation in-memory computing devices due to its advantages of high speed and low power consumption. However, conventional perovskite materials encounter difficulties in terms of scalability and compatibility with CMOS. Hafnium oxide-based ferroelectric materials, particularly Hf0.5Zr0.5O2 (HZO), address these issues. In this work, we fabricated ferroelectric diodes based on a W/HZO/W plug structure and verified that the current in the low-resistance state conforms to the Schottky emission transport mechanism. The device demonstrates stable polarization characteristics, intrinsic bidirectional rectification characteristics, and a discernible memory window, while facilitating non-destructive readout. We proposed a 2-bit multiplier scheme based on ferroelectric diodes, which requires only 11 devices and 16 operations, with a total power consumption as low as ∼11 fJ. The resistance state encoding has enabled the logic computation scheme that functions without additional state transitions or complex peripheral control circuits. Furthermore, the bidirectional rectification characteristics of the devices inherently enable sneak-path suppression in crossbar arrays, which eliminates the need for external selector devices. This work demonstrates the potential of ferroelectric diodes in self-selective crossbar arrays and logic-in-memory systems, driving the development of low-power memory-logic integration.

High-performance flexible HfO2-based ferroelectric devices with low thermal budget are essential for the large-scale integration and application of flexible electronic systems. In this work, the ferroelectricity of Hf0.5Zr0.5O2 (HZO) devices under a low annealing temperature of 400( degrees)C was enhanced by stress effect. Compared with Si-based HZO devices, flexible HZO devices exhibit a higher remanent polarization (P-r) value of 28.5 mu C/cm(2) and superior endurance, with only a 5.6% degradation in P-r after 1010 cycles. Furthermore, the flexible HZO devices were annealed under bending, resulting in an increased Pr value of 31.4 mu C/cm(2) and a reduced coercive field (2E(c)) of 2.6 MV/cm. This work provides effective technical support for achieving high-performance flexible HZO devices.

Ferroelectric thin film transistors (FeTFTs) have attracted great attention for in-memory computing applications due to low power consumption and monolithic three-dimensional integration capability. Herein, we propose a planar integrated highly-reliable metal-ferroelectric-metal-insulator-semiconductor FeTFTs device, in which the weak erase issue is suppressed by implanting a floating gate, and the interface defects are reduced by simplifying the fabrication process. These lead to significant improvements in device performance, including large memory window (4.3 V), high conductance dynamic range (1400), high endurance (1012 ), and low variation (cycle-to-cycle: 2.5 %/device-to-device: 3.5 %). Moreover, we fabricated a 16 x 16 FeTFTs pseudo-crossbar array for in-memory computing and experimentally demonstrated full hardware implementation of multi-layer perceptron for the classification of four fundamental arithmetic operation symbols. This work provides a potential hardware solution for implementing a highly-efficient in-memory computing system based on highly-reliable FeTFTs array. (c) 2025 Published by Elsevier Ltd on behalf of The editorial office of Journal of Materials Science & Technology.

RRAM-based neural network accelerators offer significant improvements in energy efficiency and throughput for machine learning and artificial intelligence. However, it is challenging to transfer trained neural network weights to RRAM arrays precisely due to non-ideal characteristics such as read noise and write variability. A write-verify strategy is commonly employed to adjust the RRAM cells within acceptable error margins. However, this process is time-consuming and resource-intensive. In this work, a high-speed programming strategy based on threshold division is proposed, inspired by magnitude-based network pruning. The relationship between threshold conductance and programming error is systematically investigated by allowing a larger programming error for cells below the threshold. Results of experiments on MLP and LeNet-5 networks demonstrate that the programming speed is enhanced by 3.41 times and 2.39 times, respectively. This strategy provides a novel method for fast transfer of weights in large-scale RRAM-based neural network accelerators.

Dynamic memristors with short-term memory have been widely researched for their high biomimetic properties to mimic the leaky and integration functions of biological neurons. However, the limited reliability and poor switching window still hinder the implementation of dynamic memristors in a neuromorphic system. Here, we propose a highly reliable dynamic memristor with nanolayered NbO2 material based on the transition effect between two-electron emission processes. The introduced additional oxygen defects effectively enhance the electron emission effect and therefore enlarge the switching window over 10(7), accompanied by a low variation below 2%. Meanwhile, the designed conduction transition avoids the structural damage and the direct connection between two electrodes, benefiting the high endurance (>10(9)) and low operating energy (19 fJ). Subsequently, we confirm the conduction transition mechanism during the dynamic behavior by data analysis, device surface expansion detection, and oxygen-controlled fabrication. The proposed mechanism is mathematically verified by a constructed compact model, which can be used not only to instruct the device fabrication but also to simulate neuron design. Based on the developed neuron with dynamic memristors, we construct a spiking neural network. The interaction between different aspects of the memristor in the network is discussed, which helps to achieve a reasonable compromise among the network accuracy (94.63%), energy consumption, and peripheral circuit requirements.

In the last decade, HfO2-based ferroelectric capacitors (FeCaps) have undergone significant advancements, particularly within the realm of nonvolatile ferroelectric random access memories (FeRAMs). Nonetheless, the READ operation in FeRAMs is inherently destructive, rendering it unsuitable for neuromorphic computing. In this study, we have engineered tunable nonvolatile capacitances within FeCaps, featuring nondestructive readout functionality. Robust capacitance states can be read at a zero d.c. bias (V-bias) with different a.c. signals, not only preventing the alteration of their stored state but also benefiting to the low power consumption. Moreover, the capacitance memory window (C-MW) at V-bias of zero can be effectively modulated through electrode engineering, leading to a larger C-MW when there is a greater disparity in work functions between the electrodes. Furthermore, we provide a comprehensive investigation into synaptic behavior of TiN/Hf0.5Zr0.5O2/Pt FeCaps, demonstrating their excellent cycle-to-cycle uniformity, retention, and endurance characteristics, which confirm their high reliability in maintaining nonvolatile capacitance states. These findings underscore the significant potential of FeCaps in advancing low-power neuromorphic computing.

Threshold switching (TS) memristor with a simple structure and high biomimetic offers a more promising way to implement an efficient artificial neuron than traditional methods. To accommodate the complex environments in practical applications, previous memristor-based neurons typically incorporate auxiliary circuits to ensure tunability within circuits. However, this addition not only heightens the design complexity but also reduces the efficiency. In this work, we investigate the conduction process under different thresholds in an NbOx -based memristor and further demonstrate its potential merits in human face recognition. The negative threshold voltage of the device can be linearly modulated by positive stimuli. The conduction mechanisms under different threshold states are systematically investigated by experiments and theoretical analysis, showing that the defects concentration controlled by the electrical field is attributed to the threshold modulation. The revealed mechanism is instructive for device optimization, offering an oxygen-related fabrication method. Based on such a device, we construct a tunable spiking neuron whose threshold can be modulated by only one preoperation on the neuron without other burdensome units. By modulating the threshold based on the light intensities-a lower threshold for the bright condition and a higher threshold for the dark condition-the temporal features of the neuron outputs can be maintained at a normal condition to ensure the correct recognition under different environmental luminance. The function of the proposed tunable neuron is further evaluated in a network for human face recognition. The network finally reaches a 93.25% accuracy with tunable threshold neurons, significantly surpassing the 71.87% with fixed-threshold neurons.

The performance and reliability of ferroelectric thin films at temperatures around a few Kelvin are critical for their application in cryo-electronics. In this work, TiN/Hf0.5Zr0.5O2/TiN capacitors that are free from the wake-up effect are investigated systematically from room temperature (300 K) to cryogenic temperature (30 K). We observe a consistent decrease in permittivity (epsilon(r)) and a progressive increase in coercive electric field (E-c) as temperatures decrease. Our investigation reveals exceptional stability in the double remnant polarization (2P r) of our ferroelectric thin films across a wide temperature range. Specifically, at 30 K, a 2P r of 36 mu C/cm(2) under an applied electric field of 3.0 MV/cm is achieved. Moreover, we observed a reduced fatigue effect at 30 K in comparison to 300 K. The stable ferroelectric properties and endurance characteristics demonstrate the feasibility of utilizing HfO2 based ferroelectric thin films for cryo-electronics applications.

Surface electronic structures of the photoelectrodes determine the activity and efficiency of the photoelectrochemical water splitting, but the controls of their surface structures and interfacial chemical reactions remain challenging. Here, we use ferroelectric BiFeO3 as a model system to demonstrate an efficient and controllable water splitting reaction by large-area constructing the hydroxyls-bonded surface. The up-shift of band edge positions at this surface enables and enhances the interfacial holes and electrons transfer through the hydroxyl-active-sites, leading to simultaneously enhanced oxygen and hydrogen evolutions. Furthermore, printing of ferroelectric super-domains with microscale checkboard up/down electric fields separates the distribution of reduction/oxidation catalytic sites, enhancing the charge separation and giving rise to an order of magnitude increase of the photocurrent. This large-area printable ferroelectric surface and super-domains offer an alternative platform for controllable and high-efficient photocatalysis.

The interface difference between HZO and the upper and lower electrodes induced by the sequence of the process flow could lead to the general asymmetry in the structure and performance of metal-ferroelectric-metal (MFM) capacitors, which may cause serious reliability problems. In this letter, we have exploited a special high pressure annealing (HPA) process, called alcohol-thermal method (ATM), to improve the symmetry of TiN/HZO/TiN capacitors. The original control device exhibits asymmetric leakage current and coercive fields. This has been significantly improved by the ATM, which was performed at temperature of 240°C and atmospheric pressure of 70 atm, in C2H6O ambient. The enhancement of ferroelectricity can be attributed to the reduction of the thickness and defects of the non-ferroelectric layers in the device. The improvement of symmetry leads to the operation ability under low voltages, which is critical to the endurance of devices. Under the electric field of 2.4 MV/cm with 10 MHz frequency, the lifetime of the TiN/ HZO/TiN device after HPA process was measured up to 1010 cycles. This work provides an effective way to improve symmetry and ferroelectricity of hafnium-based ferroelectric capacitors.

Neuromorphic machines are intriguing for building energy-efficient intelligent systems, where spiking neurons are pivotal components. Recently, memristive neurons with promising bio-plausibility have been developed, but with limited reliability, bulky capacitors or additional reset circuits. Here, we propose an anti-ferroelectric field-effect transistor neuron based on the inherent polarization and depolarization of Hf 0.2 Zr 0.8 O 2 anti-ferroelectric film to meet these challenges. The intrinsic accumulated polarization/spontaneous depolarization of Hf 0.2 Zr 0.8 O 2 films implements the integration/leaky behavior of neurons, avoiding external capacitors and reset circuits. Moreover, the anti-ferroelectric neuron exhibits low energy consumption (37 fJ/spike), high endurance (>10 12 ), high uniformity and high stability. We further construct a two-layer fully ferroelectric spiking neural networks that combines anti-ferroelectric neurons and ferroelectric synapses, achieving 96.8% recognition accuracy on the Modified National Institute of Standards and Technology dataset. This work opens the way to emulate neurons with anti-ferroelectric materials and provides a promising approach to building high-efficient neuromorphic hardware.

Selector devices are indispensable components of large-scale memristor array systems. The thereinto, ovonic threshold switching (OTS) selector is one of the most suitable candidates for selector devices, owing to its high selectivity and scalability. However, OTS selectors suffer from poor endurance and stability which are persistent tricky problems for application. Here, we report on a multilayer OTS selector based on simple GeSe and doped-GeSe. The experimental results show improving selector performed extraordinary endurance up to 10(10) and the fluctuation of threshold voltage is 2.5%. The reason for the improvement may lie in more interface states which strengthen the interaction among individual layers. These developments pave the way towards tuning a new class of OTS materials engineering, ensuring improvement of electrical performance.

Surface electronic structures of the photoelectrodes determine the activity and efficiency of the photoelectrochemical water splitting, but the control of surface structures and interfacial chemical reactions remain challenging. Here, ferroelectric BiFeO 3 is used as a model system to demonstrate a controllable water splitting reaction by large-area constructing the hydroxyls-bonded surface. The up-shift of band edge positions at this ferroelectric surface enables and enhances the holes and electrons transfer through the hydroxyl-active sites, leading to enhanced oxygen or hydrogen evolutions, respectively. Furthermore, the printing of ferroelectric super-domain with microscale checkboard up/down electric fields enhances the photogenerated carriers separation and gives rise to an order of magnitude increase of the photocurrent. This large-area printable ferroelectric surface and super-domain offer an alternative platform for controllable and efficient photocatalysis.

Ovonic threshold switching (OTS) selector is becoming the most suitable candidate for selector devices in memristor crossbar array, owing to its high selectivity and fast response time. However, device endurance and variance are persistent tricky problems for application. In this article, a novel symmetric multilayer OTS selector based on simple GeSe and SbTe-doped GeSe was investigated. The results showed improving selector performed extraordinary endurance up to 1010 and the fluctuation of threshold voltage is 1.5 %. These developments pave the way towards tuning a new class of OTS materials engineering, ensuring improvement of electrical performances.

Memory devices with high speed and high density are highly desired to address the ‘memory wall’ issue. Here we demonstrated a highly scalable, three-dimensional stackable ferroelectric diode, with its rectifying polarity modulated by the polarization reversal of Hf 0.5 Zr 0.5 O 2 films. By visualizing the hafnium/zirconium lattice order and oxygen lattice order with atomic-resolution spherical aberration-corrected STEM, we revealed the correlation between the spontaneous polarization of Hf 0.5 Zr 0.5 O 2 film and the displacement of oxygen atom, thus unambiguously identified the non-centrosymmetric Pca2 1 orthorhombic phase in Hf 0.5 Zr 0.5 O 2 film. We further implemented this ferroelectric diode in an 8 layers 3D array. Operation speed as high as 20 ns and robust endurance of more than 10 9 were demonstrated. The built-in nonlinearity of more than 100 guarantees its self-selective property that eliminates the need for external selectors to suppress the leakage current in large array. This work opens up new opportunities for future memory hierarchy evolution.