This paper investigates a thin low-pass filtering antenna array based on dual-polarized Vivaldi elements. The low-pass filtering in the antenna elements reduces the requirement for the front-end filtering between the antenna and the microwave electronics, resulting in improved overall out-of-band suppression, size reduction, and lower cost. The array employs a novel stacked-PCB structure, where simple two-sided PCBs are stacked on top of each other. The via-connected metal layers of all PCBs form a tapered slotline along the surface normal of the PCBs. The filtering effect is realized by corrugating the tapered slotlines, which provides effective, space-saving integration of the filters that fit into a half- wavelength lattice. According to unit-cell simulations, the proposed antenna array operates at 6-18.5 GHz, and the stopband extends from 21 GHz to 37 GHz. The antenna array provides a - 10-dB active reflection coefficient (ARC) with beam-steering angles within +/- 60 degrees in E- and D-planes, and - 6 dB within +/- 55 degrees in the H-plane. At stopband frequencies, the attenuation with respect to simulated total efficiency is at least 20 dB. The operation of the proposed antenna array is confirmed by measurements of an 11x12 antenna array prototype, which show that the gain suppression level in the stopband is more than 30 dB up to 37 GHz, and more than 20 dB up to 40 GHz.

We introduce a novel joint transmit (Tx) and receive (Rx) beamforming method and relevant performance metrics for in-band full-duplex (IBFD) antenna systems, addressing two major challenges: self-interference (SI) leakage from the transmitter to the receiver and nonlinear gain compression in the receiver's low-noise amplifiers (LNAs). Conventional methods treat Tx and Rx beamforming separately, often failing to balance SI suppression with sufficient Tx gain. In contrast, our approach achieves two key objectives. First, it maximizes Tx array antenna gain while ensuring that SI at the LNA input remains below a predefined threshold, preventing saturation and maintaining linearity. Second, it suppresses residual SI at the receiver output, improving the signal-to-SI ratio by effectively separating the desired signal from residual interference. This method is validated using a commercial RF system-on-chip evaluation board and 3 x 5 Tx and Rx Vivaldi antenna arrays operating in the 3 GHz to 6 GHz band. Experimental results show that the conventional Tx maxGain beamformer achieves approximately 22 dB isolation between closely spaced Tx and Rx arrays. In contrast, the proposed Tx beamforming method provides over 45 dB isolation, with a Tx array gain of up to 10 dBi. Overall, the joint Tx-Rx beamforming method achieves more than 80 dB isolation with a 10 dBi Rx array gain for the IBFD system, representing a significant improvement over conventional methods.

We present a procedure and experimental setup using a state-of-the-art commercial RF system-on-chip (RFSoC) to evaluate self-interference cancellation in full-duplex array antennas. Our focus is on assessing the capacity of the system's interference cancellation abilities, namely how effectively the technology can perform nulling in the presence of hardware imperfections and practical testing conditions. This step is crucial for evaluating complex array transceivers that comprise multiple non-linear components, such as power- and low-noise amplifiers, and that require advanced beamforming strategies to maximize antenna gain, effective radiated power, receiving sensitivity, etc, while canceling self-interference. Our initial experimental setup includes a 1 × 5 Vivaldi antenna array operating in the 3 - 6 GHz band, connected to the digital transceiver system on the RFSoC board. We introduce a calibration procedure to compensate for DAC-induced errors and synchronize the transmit channels during measurements. This calibration procedure shows a cancellation limit of up to 63 dB.

A Vivaldi antenna array is designed for large phased array applications in the 3-6 GHz frequency range and is fed by a novel coaxial probe through the ground plane. The simulated infinite array active reflection coefficient is below -10 dB for an up to +/- 60 degrees scan in the E-plane and +/- 50 degrees in the H-plane, across the entire frequency range. The measured active reflection coefficient and array pattern for a small-scale 1 x 5 Vivaldi array are in good agreement with the simulations, which validate the infinite array model including the probe feeding concept. Furthermore, the 3D printing and silver-coating fabrication process proves useful for rapid and cost-effective prototyping.

A novel approach to on-chip temperature sensors for non-invasive thermal characterization and monitoring of packaged GaN MMICs is presented. The proposed sensor is fully compatible with commercial GaN foundry processes and enables improved reliability estimation of highly integrated systems. A dedicated test structure is developed to demonstrate the capabilities of the sensor, and an accurate calibration method of its temperature response is proposed. This combination allows for continuous temperature monitoring during operation with electrical acquisition of temperature transients. The method also enables the thermal characterization of the device and package.

This article compares the power-handling capabilities of narrowband second-order absorptive bandstop and reflective bandstop filters (BSFs) that have not been explored previously. The analysis considers two distinct perspectives: the maximum voltage and current that each filter can handle, as well as the average power dissipation. Both electrical and electrothermal analyses are conducted. Closed-form expressions are derived for the second-order absorptive and reflective BSF (RBSF) topologies, delineating voltage and power distribution among their resonators as a function of input power. Two second-order microstrip filters with lumped components are designed, fabricated, and measured to validate the analyses. These filters, centered at 500 MHz, are tailored specifically for direct, nonloading voltage measurement using an oscilloscope. Thermal profile measurements are also taken using an infrared (IR) camera, confirming theoretical trends that the absorptive BSF (ABSF) has a higher average power-handling capability (PHC) compared to the RBSF.

This work presents an interference-adaptive Gallium Nitride (GaN) low-noise amplifier (LNA) front-end with orthogonal frequency and linearity tuning for applications in communication base stations, radar and electronic warfare (EW). The system operates between 2–6 GHz and provides a sub 5 ms tuning time for an input power tuning range of 40 dB. The orthogonal tuning consists of two phases: 1. frequency tuning with four tunable bandpass and bandstop filters for interference rejection, 2. linearity tuning with a combination of coarse tuning through look-up table (LUT) and fine-tuning through incremental adaptation to trade off power with linearity. GaN LNA’s linearity can be adjusted between P textsubscript 1dB,IN = -10 and 1.5 dBm with output P textsubscript 1dB up to 25 dBm (11.5 dB range) with the LNA power changing from 500 mW to 2 W (x4 increase). The average LNA power with orthogonal frequency and linearity tuning decreases by 56% as compared with the system operating at the worst-case no tuning condition. Two systems involving commercial filters and custom cavity resonator-based filters were constructed. The filters further increase the system P textsubscript 1dB,IN by the filter rejection of the interference signal. The rest of the controls consume about 10% of the worst-case condition LNA power.

The optimal antenna array excitation vector is derived that maximizes the (realized) array gain in a particular direction while preventing the coupled input power to the low-noise amplifiers on the receive side to exceed a certain maximum threshold level. This is very useful for in-band full-duplex systems where the hardware complexity for self-interference cancellation must be minimized. In this approach, the perfect nulling of interference on the RX side is not required, sparing degrees of freedom for the TX beamformer. We evaluate the performance of the proposed TX beamforming algorithm by showing numerical results of the 25 x-polarized TX and 25 RX with 0.5$\lambda$ element spacing and $\lambda$ gap distance between the TX and RX sub-array.

One of the major challenges in communication, radar, and electronic warfare receivers arises from nearby device interference. This article presents a 2–6-GHz gallium-nitride (GaN) low-noise amplifier (LNA) front end with onboard sensing, processing, and feedback utilizing microcontroller-based controls to achieve adaptation to a variety of interference scenarios through power and linearity regulations. The utilization of GaN LNA provides high-power handling capability (30 dBm) and high linearity (OIP3 = 30 dBm) for radar and EW applications. The system permits an LNA power consumption to tune from 500 mW to 2 W ( $4\times $ increase) in order to adjust the linearity from $P_{\text {1 dB,IN}}=-10.5$ to 0.5 dBm ( $10\times $ increase). Across the tuning range, the noise figure increases by approximately 0.4 dB. Feedback control methods are presented with backgrounds from control theory. The rest of the controls consume $\leq 10\%$ (100 mW) of nominal LNA power (1 W) to achieve an adaptation time < 1 ms.

This article investigates a dielectric-loaded Vivaldi-type antenna array that is formed inside a plastic block. It utilizes the inverted body-of-revolution (BoR) structure, where cone-shaped cavities are formed in a dielectric material and metalized from the inside. The metalized cavities form an array of inverted BoR elements that are fed by a single printed circuit board. In contrast to previous work, this paper uses a solid, shaped plastic block instead of foam as a dielectric material and exploits its considerably higher permittivity to reduce the height of the elements. The reduced profile provides an excellent polarization purity in the class of tapered slotline (TSL) antennas while a 3:1 bandwidth is maintained with an active reflection coefficient (ARC) $\leq -10$ dB. The shaping of the dielectric block decreases the scan loss of the array and prevents detrimental surface waves. The proposed array can steer the beam up to ± 50° in all planes without exceeding −10 dB ARC. The proposed dielectric loading may be applied also to other antenna types, such as conventional BoR antennas. The excellent electrical performance and manufacturability of the array are confirmed by fabricating and measuring a prototype.

A novel technique for miniaturizing planar signal-interference coupled-resonator-based filters is proposed in this paper. The presented technique employs circular and logarithmic spiral resonators coupled with their scaled negative images. We demonstrate significant size reduction of approximately 2x compared to the state-of-the-art, with minimal penalty on loss and notch depth. Besides these benefits, the proposed technique also enables additional design degrees of freedom for the filter size, attenuation level and sharpness of its in-band notches. In addition, we demonstrate that by scaling the resonators’ coupled negative images, we can further reduce the filter size. This paper explores these basic design principles and demonstrates proof-of-concept UHF bandpass filter prototypes with tunable in-band notches.

This article presents a wideband, dual-polarized antenna array with inverted BoR elements. The antenna structure is based on the conventional body-of-revolution (BoR) element, but the structure is inverted; i.e., instead of metallic cones, the elements are metalized cavities inside a dielectric block. This structure allows a more lightweight and low-cost design since all-metal parts are not needed. In addition to the inverted BoR structure, this paper proposes a feeding system that is fully integrated into a 5-mm-thick standard printed circuit board. The designed antenna operates at 2–6 GHz, providing 3:1 impedance bandwidth with an active reflection coefficient (ARC) < −10 dB. The ARC<−10 dB criterion is fulfilled for all beam-steering angles up to ±50° in all planes. The operation of the simulated antenna array was verified by measuring a built prototype. The measurement results are in good agreement with the simulations. However, the radiation efficiency of the prototype was approximately 11% inferior than that of the conventional all-metal BoR array due to conduction losses caused by the metalization of the used dielectric.

This work analyzes the nonlinear effects in the track and hold circuit applied in high-speed ADCs or RF sampling receiver (RX) front-ends. Non-ideal effects inside the main sampling NMOS switch are studied. Parasitic varactor and sampling on-resistance modulation effects are analyzed through frequency domain Volterra series and the EKV MOS transistor model. Polynomial curve fitting is applied showing that the on-resistance modulation dominates. Finally, a novel bootstrap circuit is proposed with a fast settling time and high bootstrap voltage in a 22nm FD-SOI CMOS technology, with its settling time analyzed using the Elmore delay model.

This letter presents a wideband bandpass filter (BPF) with a tunable and switchable in-band notch. This allows the RF front end to pass the signal of interest uninterrupted in the absence of an in-band interferer and reject part of the passband in case a narrowband interferer exists. The BPF is based on a two-path architecture, loaded with resonators on one of the paths to deliver an absorptive notch. The resonators are tuned with varactor diodes and are deactivated when the diodes are in forward bias. The implemented proof-of-concept hardware operates in the 4.8–7.8-GHz frequency range, with an in-band notch tunable between 5 and 6.25 GHz, when activated. The transmission lines were implemented as striplines, resulting in a measured insertion loss of 0.6 dB.

This article presents an electric-based methodology for thermal characterization of semiconductor technologies. It is shown that for technologies such as gallium nitride (GaN) high electron mobility transistors, which exhibit several field induced electron trapping effects, the thermal characterization has to be performed under specific conditions. The electric field is limited to low levels to avoid activation of trap states. At the same time, the dissipated power needs to be high enough to change the operating temperature of the device. The method is demonstrated on a test structure implemented as a GaN resistor with large contact separation. It is used to evaluate the thermal properties of samples with different silicon carbide suppliers and buffer thickness.

This paper presents waveguide interconnects implemented in an embedded wafer level ball grid array (eWLB) packaging technology. The interconnects operate at D-band (110-170 GHz), hence are enabling the realization and commercialization of high-data-rate systems. The interconnects rely on implementing radiating structures on the technology's redistribution layers instead of using conventional ball grid arrays for the transmission of the RF signal to/from the package. The interconnects interface with standard WR-6.5 waveguides. Moreover, they do not require any galvanic contacts with the waveguide. The interconnects achieve a measured insertion loss of 2.8 dB over a bandwidth of 33%. The adopted eWLB packaging technology is suitable for low-cost high-volume production and allows heterogeneous integration with other technologies. This paper proposes cost-effective high-performance interconnects for THz integration, thus addressing one of the main challenges facing systems operating beyond 100 GHz.

Applying a spectrally efficient modulation to a wideband signal provides an extremely high data rate potential in millimeter-wave communication. In reality, wideband systems, as reported in open literature, typically suffer from insufficient signal-to-noise ratio (SNR) and thus are not able to support high-order modulation. In a recent experimental study, we have identified that a high noise floor from frequency-multiplied local oscillator (LO) sources is a major data rate limitation in wideband systems. In this paper, we present a detailed study with a mathematical model to describe the influence of the LO noise on a communication signal through frequency conversion. Followed by experimental investigations using multigigabit 64-quadrature amplitude modulation signals, measurements are performed at frequency up- and down-conversions. Both cases show SNR degradation on the frequency-converted signals as the corresponding LO noise floor increases. We provide experimental proof that the nature of the LO noise floor is white, with nearly the same amount of phase and amplitude noises. Various ways to reduce the white LO noise floor through the new hardware design are discussed providing design requirements and considerations.

A 110-170 GHz transceiver is designed and fabricated in a 130 nm SiGe BiCMOS technology. The transceiver operates as an amplifier for transmitting and simultaneously as a fundamental mixer for receiving. In a measured frequency range of 120-160 GHz, a typical output power of 0 dBm is obtained with an input power of +3 dBm. As a fundamental mixer, a conversion gain of -9 dB is obtained at 130 GHz LO, and a noise figure of 19 dB is achieved. The transceiver is successfully demonstrated as a FMCW radar front-end for distance measurement. With a chirp rate of 1.6×1012 Hz/s and a bandwidth of 14.4 GHz, a range resolution of 2.8 cm is demonstrated, and transmission test is shown on different objects.

An analog predistorter and power amplifier (PA) MMIC chipset has been designed to improve the overall linearity for applications in wireless communication at the E-band. The circuits have been implemented in a commercial 0.1 mu m InGaAs pHEMT process. The PA delivers an output referred 1-dB gain compression (OP1 dB) of 24 dBm, saturated output power of 27 dBm, and OIP3 of 32 dBm between 71 and 76 GHz. In combination with the analog predistortion circuit, the combined chipset improves carrier to third-order intermodulation ratio by 20 dB at an average output power of 21 dBm and at the same time increasing the OP1 dB by 2 dB to 26 dBm.

A differential variable gain amplifier (VGA) for wideband baseband signals has been designed, analyzed, and implemented in a 0.25-mu m InP double heterojunction bipolar transistor technology with f(T)/f(max) of 370/650 GHz. The 3-dB frequency bandwidth is measured to be 40 GHz with a maximum gain of 31 dB, resulting in a gain bandwidth product (GBP) of 1.4 THz, four times higher than previously reported GBP from a Gilbert cell-based VGAs. Furthermore, it measures a gain control range of 44 dB, a noise figure of 6.2 dB, an output third-order intercept point of 17 dBm, and a total power consumption of 350 mW from a single -7-V supply. With pseudorandom binary sequence test pattern signals, a clear open eye at 44 Gb/s was observed. The complete circuit, including on-chip integrated bias network and pads, measures 0.77 mm(2). We analyze the VGA for the 3-dB bandwidth and GBP by the use of zero-value time constants method to analytically identify the maximum GBP with respect to the design parameters and current bias.