This work investigates HBM performance in GaN-on-SiC RF HEMTs. Forward and reverse G-S Schottky diodes are evaluated in RF multi-finger HEMTs with different widths and using inside or outside through-substrate vias (TSVs). HBM zaps on D-S HEMTs are conducted. Finally, benchmarks with GaN-on-Si HEMTs are proposed in terms of G-S Schottky diodes and D-S HEMTs.

Gallium nitride (GaN)-on-Si technologies for advanced RF applications have been raising the attentions in semiconductor industries, which accompany with RF electrostatic discharge (ESD) reliability challenges. Both positive and negative ESD stress polarities are equally important to be investigated. Four scenarios of the positive and negative human body model (HBM) stresses on a gate-tied-to-source configuration (G S $_{\mathbf {\textit {MI}{S}-\textit {HE}\textit {MT}}}$ ) and a gate-tied-to-drain configuration (G $\text{D}_{\mathbf {\textit {MI}{S}-\textit {HE}\textit {MT}}}$ ) were conducted in GaN-on-Si MIS-HEMTs. A failure mechanism unveiled in the negative G S $_{\mathbf {\textit {MI}{S}-\textit {HE}\textit {MT}}}$ which is different from the constant-power 2DEG failure mechanism in the typical positive G S $_{\mathbf {\textit {MI}{S}-\textit {HE}\textit {MT}}}$ , was demonstrated by the measured HBM transient I-V characteristics and the subsequent DC I-V traces. The specific ON-state failure mechanism is related to the constant-voltage gate dielectric failures, resulting from a unique HBM discharge mechanism without the existence of depletion region in the 2DEG channel. This causes the degradation of the HBM failure voltages on the devices. Thus, the lower HBM failure powers are required to destroy the gate dielectric layer, as compared to the high failure powers to induce the 2DEG burnouts.

The paper reports extensive experimental study and simulations to provide an in-depth understanding on the impact of different stress scenarios on ESD robustness of GaNRF HEMTs. These include different terminal combinations, bias configurations, and polarities of human body model (HBM) pulses. The different current discharge paths for each stress scenario play the most vital role in determining its HBM ESD robustness. Transient HBM I-V characteristics have been verified with TCAD simulations which illustrate the on-state gate Schottky diode at high HBM stress voltages contribute to high HBM robustness of the GaN RF HEMTs. The different stress scenarios result in 3 types of HBM failure mechanisms.

With the integrated circuit technology evolution towards 25D and 3D stacking, wafer-level and bare-die-level electrostatic discharge testing is becoming a necessity. In this work, we use our Low-Impedance Contact CDM tester to measure integrated circuit products and assess the possibilities and potential issues of CDM testing of wafers and bare dies.

We report on our extensive experimental and simulation study to understand ESD failure mechanisms in RF GaN-on-Si (MIS)HEMTs. As opposed to ESD clamp transistors in LV CMOS technologies, a mis-correlation between standard-defined HBM ESD robustness and commonly used TLP failure current was observed in GaN (MIS)HEMTs. Using transient HBM IV characteristics, a novel discharge model is proposed to explain the transient discharge mechanism. The TCAD and SPICE simulations confirmed that the observed mis-correlation between TLP and HBM is attributed to 2DEG channel resistance modulation in response to HBM ESD transient voltage waveforms.

In this paper, Gallium Nitride (GaN) Metal-Insulator-Semiconductor (MIS)-HEMTs are compared with conventional Schottky Metal-Semiconductor HEMTs in terms of DC and ESD performance. Measurement results indicate TLP failures are highly related to 2DEG channel driving capability. The impacts of different gate interfaces in the GaN (MIS)-HEMTs on failure mechanisms are the key factor of final ESD robustness.

This article presents practical design considerations and methodologies for a 28-GHz front-end module (FEM) in 22-nm fully depleted silicon on insulator (FD-SOI) CMOS technology for the fifth generation (5G) wireless communication. The design adopts a gain-boosting technique that is comprehensively analyzed with a transformer-based stacked-FET power amplifier (PA). Then, the co-design of the transmit/receive (T/R) switch with the PA and low-noise amplifier (LNA) is investigated, and an electrostatic-discharge (ESD)-aware T/R switch incorporating PA circuitry is proposed to leverage the Tx- and Rx-mode performance. Moreover, the robustness of standalone PA and Tx-mode FEM is simulated and experimentally verified. Furthermore, the ground return paths and supply parasitic paths of the adopted single-ended LNA together with the proposed T/R switch are studied, properly simulated, and assessed. Finally, the proposed PA topology is first verified standalone, exhibiting 32-dB power gain ( $G_{p}$ ), an 18.2-dBm output 1-dB compression point (OP1 dB), and a 31.1% power-added efficiency (PAE) at OP1 dB (PAE1 dB). Using this PA in the FEM yields a Tx-mode OP1 dB/PAE1 dB of 16 dBm/19.4%, and an average output power (Poutavg)/PAE of 10.1 dBm/8.3% for a 100-MHz bandwidth 256-QAM single-carrier signal at an error-vector magnitude (EVM) of −30 dB. In the Rx mode, noise figure (NF) and input-referred third-order intercept point (IIP3) are 3.2 and −5.4 dBm, respectively. A 2-kV human-body model (HBM) ESD protection of the FEM is predicted in transient simulations and measured with transmission line pulse (TLP) tests.

The low-impedance contact CDM (LICCDM) ESD tester can be used for wafer-level CDM testing. However, compared to the industry standard field-induced CDM (FI-CDM), it shows some differences. We investigate solutions to mitigate these differences which are mainly the wafer chuck influence and the probe reflections due to matching.

A 28 GHz front-end module (FEM) for 5G communication is implemented in 22 nm FD-SOI technology. Competitive performance for both TX and RX modes is achieved simultaneously with robustness in TX mode and ESD protection. The key for these features is the transmit/receive (T/R) switch incorporating PA circuitry, offering high linearity and robustness in TX mode, low NF in RX mode, and ESD-protection capability. The PA output stage uses a 3-stacked-FET topology to achieve high output power. Several matching techniques are implemented to equally distribute the large output voltage swing among the three stacked FETs. P sat and PAE max in TX mode are 17.2 dBm and 21.5%, respectively. NF and IIP 3 in RX mode are 3.2 dB and -5.4 dBm, respectively. With a 100 MHz bandwidth 256-QAM single-carrier signal the FEM achieves an EVM of -30 dB with average output power of 10.1 dBm and average PAE of 8.3 %. The reliability of the FEM in TX mode is assessed, demonstrating the robustness of the FEM. The ESD measurement of the FEM shows 2 kV human-body-model (HBM) ESD protection.

A Gate-All-Around (GAA) nanosheet (NS) transistor is a candidate for sub-5nm bulk Si CMOS. The impact of the new architecture and relevant process options on intrinsic ESD performance needs to be studied. The first measured results show GAA NS ESD diode performance is strongly influenced by dual epitaxy process options.

Standard charged device model (CDM) ESD simulators used today cannot be used at wafer level and suffer from high zap-to-zap peak current variability at low voltages. The low-impedance contact CDM provides a solution to these problems. In this paper we evaluate its performance and propose a model for the setup.

This paper presents state-of-the-art CMOS devices and circuits for THz applications, including a dielectric resonator antenna (DRA), a power detector, a heterodyne receiver, and a frequency doubler. The DRA operates at a higher-order mode of TE δ,1,7 so that it can provide measured gain improvement of 6.7 dB over a traditional on-chip patch antenna at 327 GHz. The heterodyne receiver composed of an on-chip patch antenna, a triple-push harmonic oscillator and a single-balanced mixer shows measured voltage conversion gain of -1.7 dB at 335.8 GHz while only consuming 52.8 mW from a 0.9-V supply. The doubler manipulates current flows around transistors to provide differential output without needing an additional balun. Some of these key circuits and components are set up with commercial VDI transmitter modules to successfully demonstrate THz transmissive imaging systems with the best spatial resolution of 1.4 mm at 335.8 GHz.

A balunless frequency doubler (FD) architecture which can provide differential output without any additional balun required is proposed in this paper. The architecture manipulates the desired second-harmonic currents around the doubler core by a multifunction network to avoid any leakage current path from the output current loop. Therefore, the output currents extracted from the same current loop can have the same amplitude and phase. As the output currents flow into and out of the same loads, respectively, the induced output voltages can be perfectly differential without needing to add a balun. A 60-GHz FD realized in a 90-nm CMOS technology is designed to verify the proposed FD architecture. The measured amplitude and phase imbalances of the differential output are only 0.2 dB and 0.5°, respectively, while providing −5.5-dB conversion gain at an output frequency of 60 GHz. The proposed FD only consumes 15.9 mW from a 1-V supply. The proposed doubler architecture can be theoretically extended to realize a frequency multiplier with a multiplication factor larger than 2.

This paper presents a low-cost and broadband bondwire interconnect for chip-to-chip and chip-to-carrier communications. Four transmission lines and three signal bondwires form a three-path interconnect structure which can greatly reduce the bondwire effect. Ground bondwires are also carefully deployed to have good ground connection between chips or chip and carrier. An interconnect from a 0.18-μm CMOS chip to a Glass-Integrated-Passive-Device (GIPD) carrier is designed to verify the idea. Measured results of three samples show that the insertion loss and return loss can be better than 3 dB and 11.2 dB from DC up to 92 GHz.

A current-switched superconducting field-cycling NMR spectrometer has been designed and built for studying the role of quantum tunnelling in molecular dynamics. The instrument is designed for work in the solid state with sample temperatures extending from 4K up to 300K. The maximum field-switching rate is 10Ts-1. Among the samples studied in this thesis is the nuclear spin-relaxation and proton tunnelling. Concerted double proton transfer in the hydrogen bonds of carboxylic acid dimers is well established as the model system for translational quantum tunnelling. The model system has been chosen to illustrate the smooth quantum-to-classical transition and at all temperatures the proton transfer is characterised by a single correlation time. Quadrupolar interactions introduce an additional relaxation to the proton spin polarisation. The enhanced relaxation of the proton spin appears as a dip in the proton magnetisation curve. This technique is employed to measure the quadrupolar transition frequency of 14N and 35Cl and determine the structure of heroin hydrochloride. The introduction of a second spin species has a significant effect on the spin-lattice relaxation. Compared with homonuclear systems, the spectral density acquires additional components characterised by the sum and difference Larmor frequencies of the two nuclei. Further, instead of a single relaxation time, there are four elements of a relaxation matrix. Therefore, the magnetisation recovery becomes bi-exponential and the initial polarisation state of the second nucleus strongly affects the magnetisation recovery of the nucleus which is being observed. We shall report on the results of spin-lattice relaxation investigations on 1H-13C, 1H-19F systems. The role of heteronuclear interactions in spin-lattice relaxation and the newly developed methodology of field-cycling relaxometry will be discussed. This represents the first 13C field-cycling NMR experiment and the first to measure the field dependence of the off-diagonal element of the relaxation matrix.

This paper describes theoretical foundation and details of the new compact modeling techniques used in the advanced surface-potential-based compact MOSFET model PSP, jointly developed by the Pennsylvania State University and Philips Research. Specic topics include surface potential equation, generalized symmetric linearization method and non-uniformity of the vertical impurity prole.

The vibrational density of states and phonon specific heat of Si nanocrystals are studied by means of a lattice dynamical calculation. The vibrational density of states of Si nanocrystals is distinct from the bulk one at low and high frequencies owing to the finite-size effect. At low frequencies there is an excess of the vibrational modes, while there is a deficit at high frequencies. At low frequencies the dependence of the vibrational density of states on frequency is intermediate between linear and quadratic. The specific heat of Si nanocrystals is enhanced as compared to that of the bulk with a maximal excess at around 90 K. The dependence of the specific heat on temperature deviates from the known T-3-law for crystalline systems at low temperatures.