The duration and interval of the input signal in two terminal memristor based reservoir systems is constrained by the decay time of a conventional memristor. Here, we demonstrate that the third terminal of a Solid Electrolyte $\text{ZnO}/\text{Ta}_{2}\mathrm{O}_{5}$ Thin-film Transistor (SE-FET) can be used to control the decay time by using a variable read voltage, without any additional circuit elements. Using this approach, we have benchmarked the performance of our SE-FET based RC system for a task of recognition of spoken digits with a high accuracy of 99.4%.
We optimized the structural parameters of the metasurface (MS) for enhanced bottom-emitting organic light-emitting diodes (B-OLEDs). MS consists of mixed metallic nanoslot arrays. The performance of MS-integrated B-OLED is estimated by out-coupling efficiency and reflection of the ambient light. The layer thicknesses of the capping layer and the MS which affect the excitation of surface plasmon are optimized and the width and length of nanoslot are determined by reducing reflectance caused by localized SP. The optimized metasurface enhances performances by 16% over the conventional B-OLED.
Practical quantum computers require coordinated operation on a large number of qubits $(\sim 10^{4})$, posing significant implementation challenges. In this paper, we summarize our recent work on scalable CMOS circuits to route control signals in a silicon MOS quantum dot spin qubit. We also present a cryogenic compact model enabling circuit design and simulation at cryogenic temperatures. The proposed design is an important step toward implementation of scalable solid-state quantum processors.
We address our recent activities on TiN/HfZrO2 (HZO)/TiN MFM capacitors, HZO/Si FeFETs for memory applications, and reservoir computing using HZO/Si FeFETs for AI applications. We have shown that MFM capacitors with 4-nm-thick HZO realizes low operating voltage and high read/write endurance. We have pointed out the importance of a large amount of electron traps in HZO on the FeFET memory characteristics. Also, we have demonstrated reservoir computing using FeFETs for applications of speech recognition.
Dynamic performance has been compared systematically among 3300V scaled IGBTs with scaling factor (k) from 1 to 10 by TCAD simulations. Even with much stronger Injection Enhancement (IE) effect, Dynamic Avalanche (DA) in scaled IGBTs is proven to be more suppressed than in $\mathrm{k}=1$ case, and it's demonstrated that IGBT scaling is able to break through the trade-off between lower on-state voltage drop and better switching controllability.
