Three-dimensional (3D) stacking using hybrid bonding is the most scalable method for 3D integration. As the hybrid bonding pad width is reduced to adopt a higher number of interconnections, the ability to extract the contact resistivity at the bonding interface with high accuracy is critical. Using specific electrical test structures and a dedicated methodology, we extract the contact resistivity for hybrid bonding pad widths down to 400 nm for a Cu/SiO2 hybrid bonding integration. Very low values around 10−11 Ω cm2 were obtained for our reference process, close to the those of Cu grain boundaries. A comprehensive analysis of the experimental contact resistivity is performed to understand its increase with the Cu recess within the bonding pads. Based on thermomechanical simulations and experimental results, the influence of both the pad thickness and initial dishing on the interface closure is discussed, for bonding pad width down to 100 nm. These analyses enable us to propose process conditions to reach low contact resistivity with low sensitivity to wafer-to-wafer overlay for hybrid bonding stacking using bonding pad widths down to 100 nm.

RF Front-End Modules (FEM) for both smartphones and infrastructure are today deployed thanks to several technologies (GaAs, GaN, LDMOS, SiGe and RFSOI). RFSOI technology has already completely replaced GaAs for RF switches integration, but due to its very good cost/performances trade-off, RFSOI technology is also a good candidate to enable RF FEM System On Chip (LNA, PA and RF Switch on the same die). We present in this paper the development on 300-mm wafer of a cost-optimized 40-nm PDSOI technology targeting 5G wireless networks from sub-6 GHz up to mmW frequencies. Elementary devices and circuits measurements are reviewed to illustrate achievable performances.

A novel dual isolation scheme with both Shallow Trench Isolation (STI) and local oxidation, so called Dual Isolation by Trenches and Oxidation (DITO), is presented to maximize the stress induced by SiGe channel and the back-biasing efficiency at the same time in FDSOI technology. DITO integration experimentally demonstrates +36% pMOSFET drive current at same leakage, which is translated into −23% ring-oscillator delay reduction at a supply voltage of V dd =0.8V. It is found that this gain is attributed to 0.45GPa saved compressive stress in the longitudinal direction, compared to the standard STI isolation. On top of that, DITO enables the Vt tuning in an extended range for both nMOS and pMOS independently through back-bias application in both reverse and forward modes. +29% and 1 decade leakage extensions are provided by this full range Vt tuning compared to the standard single STI and well FDSOI architecture where only one back-bias mode is allowed. DITO thus leverages highly-stressed and highly-tunable devices for both high performance and low power applications.

Conducting Bridge Random Access Memories (CBRAM) are a promising substitute for FLASH technology but problems with limited retention of the low resistance ON state still hamper their massive deployment. Depth resolved X-ray Absorption Spectroscopy has been used to describe the chemical state of the atoms of the active electrode (in this case Ag) and to reveal the role of Sb as stabilizer of the metallic state.

The local structure around Sb dopants in the electrolyte of conducting bridge random access memories with Ag:GeSx composition has been investigated by grazing incidence X‐ray absorption spectroscopy (GIXAS). Sb is shown to be strongly bound to the matrix via bonds to S ions and a well‐defined second coordination shell. The GIXAS analysis on Ag revealed an increased amount of metallic Ag in samples containing Sb. These data explain the improved behaviour, in terms of data retention, of this class of materials upon Sb addition.

Conductive bridging random access memories (CBRAMs) are one of the most promising emerging technologies for the next generation of non-volatile memory. However, the lack of understanding of the switching mechanism at the nanoscale level prevents successful transfer to industry. In this paper, Ag/GeSx/W CBRAM devices are analyzed using depth selective X-ray Absorption Spectroscopy before and after switching. The study of the local environment around Ag atoms in such devices reveals that Ag is in two very distinct environments with short Ag-S bonds due to Ag dissolved in the GeSx matrix, and longer Ag-Ag bonds related to an Ag metallic phase. These experiments allow the conclusion that the switching process involves the formation of metallic Ag nano-filaments initiated at the Ag electrode. All these experimental features are well supported by ab initio molecular dynamics simulations showing that Ag favorably bonds to S atoms, and permit the proposal of a model at the microscopic level that can explain the instability of the conductive state in these Ag-GeSx CBRAM devices. Finally, the principle of the nondestructive method described here can be extended to other types of resistive memory concepts.

In this paper we present the impact of Sb doping of the GeS2 electrolyte in W/GeS2/Ag based conductive bridge random access memory (CBRAM) on the memory performance. In particular, the CBRAM resistance window, R-ON and R-OFF values versus programming current, power consumption and reliability are analyzed in depth.We demonstrated that the Sb concentration governs the optimal operating conditions. In particular, high Sb doping allows low programming current operation (suitable for low power applications), while low Sb content improves the R-OFF/R-ON ratio (needed in particular for nonvolatile field-programmable gate array applications). Finally, we observed that the high temperature retention could be improved by increasing the Sb doping. This result was interpreted by means of ab initio calculations, indicating that Sb reduces the dissolution rate of the Ag-based conductive filament in the electrolyte. (C) 2014 Elsevier B.V. All rights reserved.

In this paper, we report the growth of ZrO2 thin films on TiN substrates using Plasma Enhanced Atomic Layer Deposition (PEALD) process starting from cyclopentadienyltris(dimetylamino)zirconium and oxygen plasma as precursor and reactant, respectively. The material properties – structure, morphology and composition – are investigated as a function of process parameters such as number of cycles, deposition temperature and plasma conditions. Electrical performances – in terms of breakdown field and leakage currents – are investigated as a function of deposition temperature on Au/ZrO2/TiN capacitors, giving an evidence for an impact of the crystallinity and impurities. © 2014 The Electrochemical Society. [DOI: 10.1149/2.012403jss] All rights reserved.

The Mott insulator compound GaV4S8 exhibits resistive switching (RS) properties under electric pulses which could be used in the domain of data storage for future replacement of Flash technology. In this work, we present the characterization and the resistive switching performances of three devices containing GaV4S8 thin films with various electrode sizes and geometries, i.e. planar interdigit electrodes and Metal/Insulator/Metal Au/GaV4S8/Au structures. First, we evidence the good quality of the interfaces between GaV4S8 layers and gold electrodes through transmission electron microscopy observations which allows reliable electrical characterizations. Then, we demonstrate a downscaling effect as the resistive switching amplitude ΔR/R=(Rhigh−Rlow)/Rlow increases from a few percents to more than 600% as the electrode size decreases from 50×50μm2 to 2×2μm2. Finally we show that other performances such as cycling endurance, reaching more than 65,000 RS cycles, data retention time till 10years or writing speed below 100ns confirm the high potential of GaV4S8 as active material in future resistive random access memories or Mott memories.

In this work, we present an experimental and theoretical analysis of scaled (down to 10nm) Al2O3/CuTeGe based CBRAM. We focus on the understanding of the physical mechanisms responsible for the failure of high and low resistance states at high temperature. Using a numerical model combined with ab-initio calculations, we elucidate for the 1st time at our knowledge the role of the filament morphology on the resistance instability. We demonstrate that an optimized filament shape (tuned by adjusting the operating conditions) significantly improves the memory window stability at high temperatures.

This work investigates the resistance switching dynamics of GeS2-based CBRAM devices under a large range of voltage levels to address SET, RESET, disturb and retention regimes. We studied GeS2 and Sb-doped GeS2 1T-1R devices with Ag top electrode. We demonstrated that Sb doping improves SET speed to 30ns at 2.2V and 10 years disturb immunity at -0.3V without degrading RESET performances. We claim that the switching kinetics at low and high fields are governed by different physical mechanisms, allowing to improve independently the SET/RESET and disturb memory features.

We report here on the deposition of GaV4S8 thin layers by radio frequency (RF) magnetron sputtering in pure argon using a GaV4S8 target synthesized by spark plasma sintering. Thin layers were deposited at low deposition pressure and RF power, respectively 5.33 Pa and 60 W (i.e. 3 W cm(-2)). Since as-deposited thin layers were sulfur-poor and amorphous, a one hour ex-situ annealing at 873 K in a sulfur-rich atmosphere was performed to restore the stoichiometric composition GaV4S8 and the expected crystalline structure. Chemical analyses and high resolution transmission electron microscopy observations of thin layers are consistent with a GaV4S8 phase without any secondary phase. Rietveld refinements of the X-ray diffraction (XRD) patterns confirm the good crystalline quality of the annealed deposited film constituted of crystallites exhibiting an average grain size in the 32-36 nm range. Moreover, an excellent agreement was obtained between Rietveld refinement performed on GaV4S8 powder and thin films XRD data. (C) 2012 Elsevier B.V. All rights reserved.

This chapter discusses in detail a RS HfO2-based memory cell with a metal-insulator-metal (MIM) vertical structure in which the HfO2 was deposited by Atomic Layer Deposition (ALD). The author carries out a statistic study on the effect of the HfO2 deposition process conditions on the resistive switching behavior. The chapter investigates the transient currents during 5-ns resistive switching operations. It proposes a short voltage pulse induced electroforming. The chapter models the current transport in metal-oxide-metal structures to gain an in-depth insight into the electroforming process. It reports the fabrication and electrical characterization of two-terminal multistate memory devices based on VO2/TiO2 thin film microcantilevers. The chapter reports on the feasibility of the Ge2Sb1Te4, Ge3Sb4Te8 and Ge2Sb2Te4 alloys and the effect of vacancies on their physical properties. It aims to determine. Controlled Vocabulary Terms atomic layer deposition; cantilevers; MIM structures

In this work, for the first time at our knowledge, the improvement of chalcogenide-based CBRAM performance and reliability by Sb doping of the GeS 2 electrolyte is presented. An original analysis, based on in-depth physico-chemical characterization, device electrical measurements, empirical model and first principle calculations, is shown. We argue that optimized ~10% Sb doping in the GeS 2 electrolyte allows to achieve SET speed of 30ns at 2.2V (i.e. 0.66pJ SET programming power), while assuring 10 years data retention at 125°C, >10 5 cycling and high robustness to Sn-Pb soldering profile. Finally, the improved thermal stability of the filament in the GeS 2 -Sb matrix is clearly elucidated by means of molecular dynamics calculations.

In this work, we study the impact of Ag doping on GeS 2 -based CBRAM devices employing Ag as active electrode. Several devices with Ag doping varying between 10% and 24% are extensively analyzed. First, we assess switching voltages and time-to-set as a function of Ag concentration in the electrolyte layer. Subsequently, we evaluate data retention at different temperatures. The results show that a Ag doping increase in the GeS 2 yields a strong improvement on data retention performance, increasing the 10-years data-ret temperature from 68°C for the 10% Ag doping to 100°C for the 24%, without any significant increase of the set voltage (50mV higher).

In this paper, we present a thorough physical-chemical analysis of an engineered PCM stack, where the integration of C-doping and the use of a Ti top layer allow obtaining an Amorphous As-Deposited (A-AD) phase stable against Back End-Of-Line (BEOL) thermal budget. This PCM stack is then integrated in devices, which are extensively tested in order to validate a novel pre-coding technique compliant to the Pb-free soldering reflow issue. Finally, an original design to optimize the distribution dispersion is presented.

The study of metal-insulator transitions (MITs) in crystalline solids is a subject of utmost importance, both from the fundamental point of view and for its obvious relevance to the understanding of the transport properties of a vast class of technologically useful materials, including doped semiconductors. This chapter presents the results of NN simulations on the properties of liquid and amorphous GeTe including thermal conductivity and the homogeneous and heterogeneous crystallization of the amorphous. Phase change materials (PCM), recently used extensively in non-volatile rewritable memory devices, undergo a stable, rapid and reversible transition between a crystalline and an amorphous atomic structure. The coefficients for the Arrhenius function were derived by fitting the simulation results to the experimental data for the crystallization velocity. PCM, and especially Ge-Sb-Te (GST) alloys are leading candidates for such an innovative generation of non-volatile memory. Controlled Vocabulary Terms atomic structure; metal-insulator transition; phase change materials; semiconductors