At the nanometer scale, electrolyte solutions behave differently compared to their bulk counterparts. This phenomenon forms the basis for the field of nanofluidics, which is dedicated to studying the transport of fluids within and around objects with dimensions of less than 100 nm. Despite the increasing importance of nanofluidics for a wide range of chemical and biochemical applications, the ability to study this field in undergraduate laboratories remains limited due to challenges associated with producing suitable nanoscale objects. This article outlines a straightforward procedure, using easily accessible materials and chemical reagents, to create nanofluidic membranes, called nanowood, containing channels with diameters less than 100 nm. We describe the fabrication process of nanofluidic channels in wood and demonstrate the presence of these nanochannels based on conductance measurements using electrochemical impedance spectroscopy.

TiO2-IrO X alloyswith a range of compositions synthesized by atomic layer deposition(ALD) were configured as anodes for water and chloride oxidation.The effects of the alloys' average composition on oxygen evolutionreaction (OER) and chloride evolution reaction (CER) activity wereinvestigated and correlated with their nanoscale structures and electricaltransport properties. A higher electronic conductivity and superiorelectrochemical performance were obtained for the TiO2-IrO X alloy films with 38% iridium in comparisonwith alloy films of either lower or higher IrO X content. This composition exhibits the lowest activation overpotentialsand Tafel slopes for both the OER and CER of the alloy compositionsinvestigated with values for the CER approaching those of IrO X (no TiO2 component present).The 38% Ir composition also exhibits the largest photovoltage, thatis, 650 mV, during water oxidation experiments on TiO2-IrO X alloy/n-silicon Schottky photoanodes. Thecomposition dependence of (photo)electrocatalyst properties is foundto correlate with observed trends for phase separation of the alloysinto locally TiO2- and IrO2-rich regions. Conductiveatomic force microscopy and chemical mapping using energy dispersiveX-ray spectroscopy in scanning transmission electron microscopy indicategreater phase separation for the 38% IrO X composition than for the others synthesized.

In this work, we investigate the physical and electrical properties of WS2 thin films grown by a plasma-enhanced atomic layer deposition process, both before and after device fabrication. The WS2 films were deposited on thermally oxidized silicon substrates using the W(NMe2)2(NtBu)2 precursor and a H2S plasma at 450 °C. The WS2 films were approximately 8 nm thick, measured from high-resolution cross-sectional transmission electron imaging, and generally exhibited the desired horizontal basal-plane orientation of the WS2 layers to the SiO2 surface. Hall analysis revealed a p-type behavior with a carrier concentration of 1.31 × 1017 cm−3. Temperature-dependent electrical analysis of circular transfer length method test structures, with Ni/Au contacts, yielded the activation energy (Ea) of both the specific contact resistivity and the WS2 resistivity as 100 and 91 meV, respectively. The similarity of these two values indicates that the characteristics of both are dominated by the temperature dependence of the WS2 hole concentration. Change in the material, such as in sheet resistance, due to device fabrication is attributed to the chemicals and thermal treatments associated with resist spinning and baking, ambient and UV exposure, metal deposition, and metal lift off for contact pad formation.

III-V RF devices operating at cryogenic temperature are highly desirable for application areas such as space communication or quantum computing. In the case of quantum computation, integration of the readout and control electronics close to the quantum bit (Qubit) stage is needed to allow scaling of the number of Qubits needed for practical applications. Many characteristics of high frequency operation at cryogenic temperature in novel III-V devices are not fully understood. In this study, we will focus on the behaviour of defects at or near the interface between the high dielectric constant (high-k) oxide and InGaAs semiconductor at cryogenic temperature and how it may affect the full device operation at low temperature. The thermal budget constraints associated with the processing III-V semiconductor devices prohibit the use of high temperature thermal treatments to reduce oxide defect densities in the high-k. This leads to defective oxides presenting higher instability, variability, and degradation issues than in the Si/SiO2 system. The methods developed to investigate defects in the Si/SiO2 metal oxide semiconductor (MOS) system generally attribute the divergence in capacitance voltage (CV) and conductance voltage (GV) from the ideal CV and GV characteristics mostly to interface state defects (ITs) [1], which is not the case of the III-V MOS system. As a consequence, attempts to fit the multi-frequency CV and GV response of III-V MOS structures in the weak inversion regime, using interface states alone, cannot recreate the experimental data. In this study, we present an advanced MOS defects characterisation method capable of discerning between the contributions of oxide defects (sometimes labelled ‘border traps’) and ITs. The method relies on the fully physics based simulation of MOS systems, including inelastic tunnelling from the semiconductor to localized defects in the oxide [2] to reproduce the experimental multi-frequency CV and GV characteristics. The simulations include physical models accurately describing the carrier capture/emission processes by oxide traps, and which incorporate tunneling into the dielectric in conjunction with lattice relaxation at the interface/border trap sites [3, 4]. The results will show that the simulations are able to reproduce the room temperature experimental data (both CV and GV) of InGaAs/Al2O3 MOS structures in all bias regions. This new method enables the precise extraction of the density, energy and spatial distribution away from the interface of electrically active oxide defects from different experimental results. Results will also be presented showing how the multi-frequency CV and GV response of n-InGaAs/Al2O3 and p-InGaAs/Al2O3 MOS structures change with reducing temperature. Measurements at 223K show a marked reduction in the CV and GV dispersion with frequency in the accumulation and depletion regions, consistent with a phonon assisted tunnelling interaction of electrons and holes with defects in the Al2O3. Reduction in the measurement temperature to 10K still demonstrates a residual dispersion of the capacitance and conductance with frequency, which is more marked in the case of the p-InGaAs/Al2O3 MOS structure. The models and trap distributions extracted from room temperature will be applied to the reduced temperature measurements (233 K and 10 K) to investigate the validity of the models and to gain further understanding of defect behaviour and associated device implications at cryogenic temperatures. [1] E. H. Nicollian and J. R. Brews, “MOS Physics and Technology,” John Wiley & Sons, New York, 1982. [2] A. Palma, et al. Phys. Rev. B Condens. Matter Mater. Phys., 56 (15), pp. 9565-9574 (1997). [3] E. Caruso, et al. IEEE Trans. Electron Devices, 67 (10), pp. 4372-4378 (2020) [4] G. Sereni, et al. “IEEE Trans. Electron Devices, vol. 62, no. 3, pp. 705–712, (2015).

A manufacturing-compatible 300 mm chamber reactor for atomic layer deposition or chemical vapour deposition, and pre-fitted with H 2 /H 2 S gases that can be uniformly delivered to the wafer surface, is employed to thermally convert Pt to PtS in a H 2 /H 2 S gaseous atmosphere for 7 hours at a chamber temperature of 550 degrees C. Prior to conversion, platinum layers 5 nm thick are uniformly deposited by electron beam evaporation onto -30 nm of amorphous aluminium sesquioxide deposited by atomic layer deposition on, (a) p -type silicon, and (b) c-plane sapphire. Structural characterisation is performed by high-resolution cross-sectional transmission-electron microscopy, scanning-electron microscopy and Raman spectroscopy, confirming the formation of continuous films of polycrystalline platinum monosulfide (PtS) with a -15 nm thickness. Electrical characterisation is performed by 4-point resistivity and Hall-effect transport measurements on van der Pauw structures of PtS on aluminium sesquioxide on c-plane sapphire, and by back-gate junctionless MOSFET device measurements for PtS on aluminium sesquioxide on p -type silicon, showing that PtS behaves as a semiconductor with a mobility of -16 cm 2 /V.s and with an n -type carrier concentration of -1.2 x 10 15 cm -3 . Advanced commercial-grade Sentaurus simulations, alongside density-functional theory calculations, agree well with the experimental observations and suggest a large bandgap of -1.58 eV may be possible that could lead to a low off-current and a high I on /I off ratio, suggesting that PtS may be an advanced material candidate for future device integration with CMOS and for 3D integration applications in Beyond-CMOS and More-than-Moore technologies. (c) 2021 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY license ( http://creativecommons.org/licenses/by/4.0/ )

Direct growth of transition metal dichalcogenides over large areas within the back-end-of-line (BEOL) thermal budget limit of silicon integrated circuits is a significant challenge for 3D heterogeneous integration. In this work, we report on the growth of MoS2 films (similar to 1-10 nm) on SiO2, amorphous-Al2O3, c-plane sapphire, and glass substrates achieved at low temperatures (350 degrees C-550 degrees C) by chemical vapor deposition in a manufacturing-compatible 300 mm atomic layer deposition reactor. We investigate the MoS2 films as a potential material solution for BEOL logic, memory and sensing applications. Hall-effect/4-point measurements indicate that the similar to 10 nm MoS2 films exhibit very low carrier concentrations (10(14)-10(15) cm(-3)), high resistivity, and Hall mobility values of similar to 0.5-17 cm(2) V-1 s(-1), confirmed by transistor and resistor test device results. MoS2 grain boundaries and stoichiometric defects resulting from the low thermal budget growth, while detrimental to lateral transport, can be leveraged for the integration of memory and sensing functions. Vertical transport memristor structures (Au/MoS2/Au) incorporating similar to 3 nm thick MoS2 films grown at 550 degrees C (similar to 0.75 h) show memristive switching and a stable memory window of 10(5) with a retention time >10(4) s, between the high-low resistive states. The switching set and reset voltages in these memristors demonstrate a significant reduction compared to memristors fabricated from pristine, single-crystalline MoS2 at higher temperatures, thereby reducing the energy needed for operation. Furthermore, interdigitated electrode-based gas sensors fabricated on similar to 5 nm thick 550 degrees C-grown (similar to 1.25 h) MoS2 films show excellent selectivity and sub-ppm sensitivity to NO2 gas, with a notable self-recovery at room temperature. The demonstration of large-area MoS2 direct growth at and below the BEOL thermal budget limit, alongside memristive and gas sensing functionality, advances a key enabling technology objective in emerging materials and devices for 3D heterogeneous integration.

In this work, we investigated the spatial distribution of failure sites in large area Pt/HfO 2 /Pt capacitors using simple neural networks as classifiers. When an oxide breakdown (BD) occurs due to severe electrical stress, a mark shows up in the top metal electrode at the location where the failure event took place. The mark is the result of a microexplosion occurring inside the dielectric film. Large area devices need to be studied because the number of generated spots must be the required for statistical analysis. The obtained results using multilayer perceptrons with different number of neurons and hidden layers indicate that the largest breakdown spots tend to concentrate towards the center of the device. This observation is consistent with previous exploratory analysis carried out using spatial statistics techniques. This exercise shows the suitability of multilayer perceptrons for investigating the distribution of failure sites or defects on a given surface.

We investigate the interplay between the series (S) and parallel (P) equivalent circuit representations of the MOS system conductance (G) and capacitance (C) in inversion. Experimental and simulated data for Si and InGaAs MOSCAPs are firstly analyzed mathematically. It is found that by interpreting the measured data in both the series and parallel mode, five independent values are obtained for the magnitude and frequency of the maxima and minima points of the -omega dC(S,P)/d omega and G(S,P)/omega functions versus angular frequency (omega). The significance and application of the approach is presented and discussed.

A new process to crystallize amorphous silicon without melting and the generation of excessive heating of nearby components is presented. We propose the addition of a molybdenum layer to improve the quality of the laser-induced crystallization over that achieved by direct irradiation of silicon alone. The advantages are that it allows the control of crystallite size by varying the applied fluence of a near-infrared femtosecond laser. It offers two fluence regimes for nanocrystallization and polycrystallization with small and large crystallite sizes, respectively. The high repetition rate of the compact femtosecond laser source enables high-quality crystallization over large areas. In this proposed method, a multilayer structure is irradiated with a single femtosecond laser pulse. The multilayer structure includes a substrate, a target amorphous Si layer coated with an additional molybdenum thin film. The Si layer is crystallized by irradiating the Mo layer at different fluence regimes. The transfer of energy from the irradiated Mo layer to the Si film causes the crystallization of amorphous Si at low temperatures (∼700 K). Numerical simulations were carried out to estimate the electron and lattice temperatures for different fluence regimes using a two-temperature model. The roles of direct phonon transport and inelastic electron scattering at the Mo-Si interface were considered in the transfer of energy from the Mo to the Si film. The simulations confirm the experimental evidence that amorphous Si was crystallized in an all-solid-state process at temperatures lower than the melting point of Si, which is consistent with the results from transmission electron microscopy (TEM) and Raman. The formation of crystallized Si with controlled crystallite size after laser treatment can lead to longer mean free paths for carriers and increased electrical conductivity.

This paper reports on the study of inverted metal-oxide semiconductor (MOS) structures formed through mechanical exfoliation of MoS2 flakes onto Al2O3 or SiO2 layers grown on degenerately doped p type silicon substrates. Using Au/Ni metal top contacts, multi-frequency capacitance and conductance characterisation were performed to investigate electrically active defects in the MoS2/oxide structures. This data has been paired with physics-based ac simulations which indicate close to ideal interfacial properties.

Large area metal-insulator-metal (MIM) structures are prone to exhibit weak electrical regions when they are subjected to severe stress conditions. Although the root cause of this problem is hard to identify, it has been attributed to non-uniform oxide thickness, variable dielectric permittivity, correlated defect generation, and fringe effects in capacitors. In this paper, we explore the application of artificial neural networks (ANNs) to the spatial localization of such weak regions. To this end, HfO2-based MIM structures were electrically stressed with the objective of generating a large number of breakdown spots. These spots are statistically distributed both in size and location over the device area. Two-input/two-output ANNs with different number of neurons and hidden layers were assessed with the purpose of identifying the best and simplest option for detecting where the most severe damage occurs. The obtained results are compatible with previous studies based on spatial statistics techniques. The method can be applied to other systems that exhibit multiple localized failure events.

Transition metal dichalcogenides (TMDs) are two-dimensional (2D) layered materials covalently bonded within the layers, but with only weak van-der-Waals (vdW) interactions between individual monolayers [1]. Substantial progress has been made in better understanding of these materials, from the nature of their defects [2] to the achievement of large area epitaxially grown films [3-5]. These materials have attracted great attention for applications such as next-generation electronics - including sub-60 mV sub-threshold slope transistors, flexible electronics, and optoelectronics, novel applications in spintronic devices [6] and the use of heterostructures of TMDs for tunnel field effect transistors (TFETs) [7]. However, issues including control of channel and source/drain doping have impeded their implementation into device. Similar to three-dimensional semiconductors, doping of the TMDs is required to modulate carrier concentration, to achieve Ohmic contacts, and to generate n -type and p -type materials which are required for complementary metal-oxide-semiconductor (CMOS) technology and TFET applications. One of the most studied TMDs is MoS 2 . The transition metals Nb and Re are two candidate dopants for MoS 2 with theoretical results showing their suitability as p - and n -type dopants, respectively [8]. Experimental results have confirmed that Nb substitutes at the Mo-site and acts as a p -type dopant in MoS 2 [9-11]. While Re has been confirmed as an n -type dopant, with the additional benefit of reducing sulfur vacancies and defect-related gap states [12-13]. This study reports on the band structure and electrical characteristics of doped and unintentionally doped chemical vapor transport (CVT) grown MoS 2 bulk crystals. We present a direct determination of the valence band structure of the MoS 2 and the impact of transition metal doping (Nb and Re) using high-resolution angle-resolved photoemission spectroscopy (ARPES). Structural defects in the form of vacancies are widely known to strongly alter the MoS 2 electronic structure. Therefore, we have performed highly-efficient density functional theory (DFT) based simulations to provide insight into the impact of vacancies in addition to the incorporation of transition metal dopants on the MoS 2 band structure. Unfolded band structures obtained through our simulations [14], in comparison with the experimentally obtained occupied band structure of doped and un-doped MoS 2 have shown excellent agreement and revealed that there has been significant distortion to the band structure due to the presence of vacancies, as well as the introduction of degenerate Nb-doping. Scanning tunneling microscopy (STM) studies revealed high quality crystals with point defects established by our first-principle calculations to be mainly Mo vacancies. We also report our Hall effect analysis to obtain the electrical metrics for the crystals. Secondary ion mass spectrometry (SIMS) shows the impurities present in the crystals, which is then used to explain the difference in transport behaviour and dopant types between similar crystals from different material sources. Figure 1. (a) Unfolded band structure of un-doped MoS 2 with Mo vacancy obtained by DFT calculations shown using contour plot of total weight intensity. Black curve: primitive-cell of pristine MoS 2 band structure. Mo vacancy induced localized states are located close to the valence band edge - shown by white rectangles. (b) ARPES spectra for a non-intentionally-doped MoS 2 crystal acquired along the high symmetry Γ-K direction overlapped with DFT results showing excellent agreement considering the effect of a Mo vacancy. (c) DFT-obtained STM images of a pristine MoS 2 (left), and Mo vacancy in MoS 2 (right). (d) Charge density difference between pristine MoS 2 and MoS 2 with Mo vacancy. Red and blue indicate charge accumulation and depletion, respectively, at Mo vacancy sites. Figure 2. In situ STM, XPS and LEED measurements of MoS 2 . (a) Large-scale STM image with bright and dark defects (300×300 nm). (b) STM image (100×100 nm) with line profiles over the defects 1, 2, and 3. (c) STM image illustrates atomic resolution with interatomic distance 0.32 nm. (d) & (e) corresponds to the binding energies of Mo 3d and S 2s, and S 2p core levels, respectively. (f) LEED showing highly ordered structure. References: [1] Applied Materials Today, 9 , 504, 2017. [2] ACS Nano, 8 , 2880, 2014. [3] 2D Materials, 4 , 045019, 2017. [4] 2D Materials, 4 , 025044, 2017. [5] ACS Nano, 9 , 474-80, 2015. [6] Nature Nanotechnology, 7 , 699-712, 2012. [7] Applied Physics Letters, 103 , 053513, 2013. [8] Physical Review B, 88 , 075420, 2013. [9] AIP Advances, 6 , 025323, 2016. [10] Nano Lett, 14 , 6976-6982, 2014. [11] Applied Physics Letters, 104 , 092104, 2014. [12] Applied Physics Letters, 111 , 203101, 2017. [13] Advanced Functional Materials, 28 , 1706950, 2018. [14] npj 2D Materials and Applications, 3 , 33, 2019. Figure 1

This work demonstrates that when inelastic tunneling between oxide traps and semiconductor bands is considered, the traps with energy aligned to the semiconductor bandgap play a significant role in the frequency dispersion of the capacitance-voltage (C-V) and conductance-voltage (G-V) characteristics of metal-oxide-semiconductor (MOS) systems. The work also highlights that a nonlocal model for tunneling into interface states is mandatory to reproduce experiments when carrier quantization in the inversion layer is accounted for. A model, including these ingredients, is used to evaluate the energy and depth distribution of oxide traps in a n-In0.53Ga0.47As/Al2O3 MOS system and is able to accurately fit the C-V frequency dispersion from depletion to weak inversion. The oxide trap distribution determined from the C-V response predicts the corresponding G-V dispersion with frequency.

In this work, we describe how the frequency dependence of conductance (G) and capacitance (C) of a generic MOS capacitor results in peaks of the functions G/ω and - ωdC/dω. By means of TCAD simulations, we show that G/ω and -ωdC/dω peak at the same value and at the same frequency for every bias point from accumulation to inversion. We illustrate how the properties of the peaks change with the semiconductor doping (N D ), oxide capacitance (C OX ), minority carrier lifetime (τ g ), interface defect parameters (N IT , σ) and majority carrier dielectric relaxation time (τ r ). Finally, we demonstrate how these insights on G/ω and -ωdC/dω can be used to extract CO X , N D and τ g from InGaAs MOSCAP measurements.

Forming gas annealing is a common process step used to improve the performance of devices based on transition-metal dichalcogenides (TMDs). Here, the impact of forming gas anneal is investigated for PtSe2-based devices. A range of annealing temperatures (150, 250, and 350 °C) were used both in inert (0/100% H2/N2) and forming gas (5/95% H2/N2) environments to separate the contribution of temperature and ambient. The samples are electrically characterized by circular transfer length method structures, from which contact resistance and sheet resistance are analyzed. Ti and Ni are used as metal contacts. Ti does not react with PtSe2 at any given annealing step. In contrast to this, Ni reacts with PtSe2, resulting in a contact alloy formation. The results are supported by a combination of X-ray photoelectron spectroscopy, Raman spectroscopy, energy-dispersive X-ray spectroscopy, and cross-sectional transmission electron microscopy. The work sheds light on the impact of forming gas annealing on TMD-metal interfaces, and on the TMD film itself, which could be of great interest to improve the contact resistance of TMD-based devices.

In this work, we present a comprehensive theoretical and experimental study of quantum confinement in layered platinum diselenide (PtSe2) films as a function of film thickness. Our electrical measurements, in combination with density functional theory calculations, show distinct layer-dependent semimetal-to-semiconductor evolution in PtSe2 films, and highlight the importance of including van der Waals interactions, Green’s function calibration, and screened Coulomb interactions in the determination of the thickness-dependent PtSe2 energy gap. Large-area PtSe2 films of varying thickness (2.5–6.5 nm) were formed at 400 °C by thermally assisted conversion of ultra-thin platinum films on Si/SiO2 substrates. The PtSe2 films exhibit p-type semiconducting behavior with hole mobility values up to 13 cm2/V·s. Metal-oxide-semiconductor field-effect transistors have been fabricated using the grown PtSe2 films and a gate field-controlled switching performance with an ION/IOFF ratio of >230 has been measured at room temperature for a 2.5–3 nm PtSe2 film, while the ratio drops to <2 for 5–6.5 nm-thick PtSe2 films, consistent with a semiconducting-to-semimetallic transition with increasing PtSe2 film thickness. These experimental observations indicate that the low-temperature growth of semimetallic or semiconducting PtSe2 could be integrated into the back-end-of-line of a silicon complementary metal-oxide-semiconductor process.

In this work, the connection between the generation of catastrophic breakdown (BD) spots in metal-insulator metal capacitors with a high-permittivity dielectric film (HfO2) and their spatial distribution was investigated. To gain insight into this issue, large area devices (10(4) mu m(2)) were constant voltage stressed at high electric fields (3.5 MV/cm) with the aim of generating a large number of spots in a single device. The set of BD spots was analysed as a point pattern with attributes (their sizes) using the methods of spatial statistics. Our study reveals that beyond the visible damage on the top metal electrode, the spots exhibit soft inhibitory regions around them where the creation of new spots is less likely. The origin of these inhibitory regions is ascribed to structural modifications of the dielectric layer in the vicinity of the spots caused by the huge thermal effects occurring at the very moment of the BD event.

The connection between the spatial location of catastrophic breakdown spots occurring in metal-insulator-metal capacitors with a high-permittivity dielectric film (HfO2) and their respective sizes is investigated. Large area structures (10(4)-10(5) mu m(2)) are used for this correlation assessment since, for statistical considerations, a large number of spots in the same device is imperatively required. The application of ramped or constant voltage stress across the capacitor generates defects inside the dielectric that result in the formation of multiple failure sites. High power dissipation takes place locally, leaving a permanent mark on the top electrode of the device. The set of marks constitutes a point pattern with attributes that can be analyzed from a statistical viewpoint. The correlation between the spot locations and their sizes is assessed through the mark correlation function and the method of reverse conditional moments. The study reveals that for severely damaged devices, there exists a link between the spot location and size that leads to a short range departure from a complete spatial randomness (CSR) process. It is shown that the affected region around each failure site is actually larger than the visible area of the spot. A structural modification of the dielectric layer in the vicinity of the spot caused by the huge thermal effects occurring just before the microexplosion might be the reason behind this extension of the damage.

This paper details the application of phosphorus monolayer doping of silicon on insulator substrates. There have been no previous publications dedicated to the topic of MLD on SOI, which allows for the impact of reduced substrate dimensions to be probed. The doping was done through functionalization of the substrates with chemically bound allyldiphenylphosphine dopant molecules. Following functionalization, the samples were capped and annealed to enable the diffusion of dopant atoms into the substrate and their activation. Electrical and material characterisation was carried out to determine the impact of MLD on surface quality and activation results produced by the process. MLD has proven to be highly applicable to SOI substrates producing doping levels in excess of 1 × 1019 cm−3 with minimal impact on surface quality. Hall effect data proved that reducing SOI dimensions from 66 to 13 nm lead to an increase in carrier concentration values due to the reduced volume available to the dopant for diffusion. Dopant trapping was found at both Si–SiO2 interfaces and will be problematic when attempting to reach doping levels achieved by rival techniques.