In this work, the effect of the multiple conductions of a GaN based Metal-Insulator-Semiconductor High Electron Mobility Transistor (MIS-HEMT) when operating in a temperature range from 200K to 450K are evaluated experimentally. From 200K till 350 K the transfer curve of the 600nm gate length device shows the Zero Temperature Coefficient (ZTC) point clearly. However, for temperatures over 350 K, the threshold voltage (V TH ) shift towards higher gate voltage, which prevents the presence of ZTC bias point. This behavior is better explained through the transconductance (gm) curve where the HEMT and MOS conductions of the devices are being affected differently by temperature, resulting in a competition of effects that changes the behavior of the device in both, gm max and V TH as a function of temperature.
This study investigates carrier mobility and its degradation factors as a function of temperature for 2-level stacked nanowire MOSFETs in the temperature range of 120 K to 400 K. The Y-function method was employed to obtain low-field carrier mobility and mobility degradation factors with temperature. Results show that decreasing temperature increases the peak value of transconductance for all device geometries. The decrease in temperature also affects the gate voltage value at which the peak of transconductance and the peak of low-field carrier mobility is reached. As the temperature decreases, the gate voltage required to reach these peak values increases. The first order degradation factor was found to decrease with the increase in temperature, and the second order factor increased with temperature.
This work presents the electrical characterization of Ω-gate SOI nanowire MOSFETs in the temperature range from 82 K to 330 K. Devices with different fin widths and channel lengths are compared. The comparison is performed using experimental data looking for some of the fundamental electrical parameters such as threshold voltage, inverse subthreshold slope, and carrier mobility over the temperature. For short-channel devices with L=40 nm an analysis of the mobility degradation coefficients over the temperature is performed.
This article presents a low-cost ultraviolet radiation sensor using epoxy-resin optical filters over MOS tunneling diodes as photodetectors with Al/SiN x O y (2.1 nm)/Si-p structure. The epoxy-resin optical filters were manufactured by casting in silicone molds a mixture of Bisphenol-A Diglycidyl Eter Resin and low density Ciclic Alyphatic polyamine diluted in Anhydrous Benzyl Alcohol. The separation of the total UV radiation (UVA+UVB+ UVC) for wavelength lower than 400 nm was obtained from the difference between the photocurrents (ΔI ph ) measured for the transparent epoxy-resin (0.0 wt%) and the epoxy-resin with 1.0 wt% benzophenone, respectively. A dimensionless correction factor (CF) was obtained to discount the effect of the background VIS radiation for wavelength higher than 400 nm. As a result, the CF parameter obtained was (0.89 ± 0.01) and the corrected UV photocurrent difference was 0.89ΔI ph = (3.83 ± 0.04) mA. For this case, the responsivity was evaluated as the ratio between the corrected UV photocurrent difference and the total UV irradiance (λ ≤ 400 nm which resulted in a), high value of (0.74 ± 0.05) A/W compared to the ones reported in literature.
In this paper, a comparison between the basic current mirror configurations (Common Source, Cascode, and Wilson) based on nMOS Junctionless Nanowire Transistors (JNTs) is performed for the first time through TCAD simulations. Those building blocks are biased at the same conditions in the output stage by a fixed voltage, while a normalized current is applied in the input stage. In that regard, the main figures of merit of the current mirrors, such as current transfer ratio and small signal output resistance, are analyzed in order to understand the analog behavior of the JNT and its application as a current source building block.
This work presents a Love wave (LW) sensor platform based on the concept of “frugality”. The implementation of the whole “frugal” platform used conventional and cheap components like an electronic circuit made with PCB manufacturing, an Arduino microcontroller, a PDMS microfluidic mold made by additive manufacturing, or by xurography. The main innovation of this work lies in the use of a transducer with a biofilm based on exopolymers (EPS) released by microalgae and obtained by simple centrifugation and ultrafiltration of their culture medium. It was shown that the EPS adhered easily to the surface of the LW sensor which allows their deposition using a single layer. The acoustic characterization showed the validity of such a LW wave sensor platform to be operational for biochemical detection in liquid medium. The implementation of the entire “frugal” platform as a portable mobile laboratory was demonstrated. This preliminary work opens the way to new frugal platforms, usable for a wider audience and which would be of great interest for the popularization of sensors in environmental monitoring.
Microelectronics is at the heart of all digital developments, including connected objects and industry 4.0., giving it a leading role in the evolution of our connected societies with several types of challenges. The first is technical, leading to an exponential growth of all circuits and systems. The second is related to the energy consumption. The latter is also growing exponentially, generating à problem that will eventually become an impassable wall within a decade. It is therefore necessary to revisit the main areas of microelectronics, namely: - the design of new circuit architectures, - the creation of new elementary components at the nanoscale and less energy consuming, - a higher conversion efficiency of power electronics and integrated electronics, - a rise in frequency in order to increase the flow of data while not affecting consumption, - the introduction of a three-dimensional assembly for components, circuits and boards. All these approaches should contribute to increasing performance while decreasing energy consumption. For this purpose, it is necessary to increase the quality and quantity of skills. Companies worldwide find themselves at the limit of their recruitment needs, with jobs in shortage in the five areas mentioned. The training structures must produce engineers, technicians and doctors capable of facing these challenges by providing the necessary skills including knowledge and know-how. This paper deals with these needs and challenges and presents an approach carried out at the level of the French microelectronics and nanotechnology network within the framework of a proactive policy.
In this paper, the trade-off between transistor channel length and the presence (or not) of the uniaxially strained SOI FinFETs for designing Operational Trasconductance Amplifier (OTA) is studied. It is studied SOI FinFETs with channel length of 150 nm (where the uniaxially strain is more effective improving the transconductance - gm) and 900 nm (where the Early Voltage is higher, improving the ouput conductance - g D ). Once that the intrinsic voltage gain is Av = gm/g D , the trade-off above is analyzed in OTA designing characteristics as Av, GBW (product gain bandwidth), PM (phase margin), and PD (power dissipation). Two strategies for designing were used: the same transistor efficiency gm/I D and the same bias conditions I SS . The general analysis shows that strained SOI FinFET with 150nm of channel length stands out in almost all electrical characteristics compared to 900 nm, once that in spite of the Early Voltage is lower for short devices, the channel strain improves the gm and besides the channel area is lower.
This work presents a study on the dark current of Quantum Bragg Mirrors Detectors based on In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As heterostructures. Three devices were investigated, with the first one having a single quantum well that serves as a reference. The other two have symmetric superlattices acting as quantum Bragg mirrors. The dark current was measured for each device as a function of the applied bias voltage, at temperatures ranging from 100K to 300K. The influence of quantum Bragg mirrors on the dark current and the estimation of activation energy of each device were analysed using Levine’s model.
This paper aims to develop a sensor based on a graphene optical system. Thus, the diffractive pattern generated will be superimposed on the glottic surface of the patient. Therefore, your light spots, as well as your pathologies, can be detected and used as a metric.
This paper aims to present for the first time an analysis of the switching properties of Resistive Random-Access-Memory devices in relation to the capacitance variation of the Metal-Insulator-Metal structure. A capacitance spread was observed when a set of pulses with varying widths and amplitudes was applied to operate the devices in the Multi-Level-Cell regime. The devices demonstrate an increase in the capacitance from 2.0338 to 2.0344 pF/μm 2 from the pristine state to the maximum pulse width increment. This allows the devices to exhibit multiple capacitive reactance states, demonstrating the quantization of the conductance, required for the application in in-memory computing systems.
Electronic device speed and energy consumption restrictions have motivated the scientific community to seek alternatives to these limitations. All-optical digital circuits and systems are a natural alternative to this problem. The devices based on photonic crystals through various published works have revealed their great potential for this type of application due to the high speeds with low energy consumption reached. The combination of switches N and P allows the construction of several logic gates and combinational circuits. However, switches must produce more robust results that may require daisy chaining multiple devices together. This work evaluates the impact of changes in the design and operation of switches N and P through changes in the interference system, pulse duration, and analysis of the effects of various types of curvatures in the proposed systems. The presented results show that some changes can increase the performance of switches and allow the construction of more complex devices more efficiently.
The use of implantable devices for biomedical applications has been made possible by the ubiquity of vibration sensors and accelerometers, coupled with advances in microfabrication technologies. Among these devices, implantable auditory prostheses, such as hearing aids and cochlear implants, have emerged as a viable alternative to traditional external devices, which can cause discomfort to users. To meet the requirements for implantable auditory devices, a piezoelectric microelectromechanical systems (MEMS) accelerometer has been developed, which includes an AlN (Aluminun Nitrate) piezoelectric signal generator attached to a silicon proof mass. This paper presents the fabrication route developed at the Assembly, Packaging and System Integration Division from Renato Archer Center for Information Technology (DIMES/CTI), including anisotropic etching of silicon cavities, flip chip assembly and signal extraction routes, to seal a silicon proof mass sample (accelerometer) fabricated by a third party.
In this work, a Ta x N y thin film was used to manufacture resistors. The film was deposited by RF sputtering on an 96% polished alumina substrate, and it has a thickness, sheet resistance and resistivity of 150 nm, 181.63 Ω/sq and 2.72 mΩcm, respectively. Here, two types of resistor configurations were developed. The first one, is a set of resistors composed of five resistors with fixed length (L) and varying width (W) values. The second one is a set with TLM (Transfer Length Method) type configuration, which consists of six resistors in series with a fixed width (W) value and varying length (L) values. Both resistor configurations, shown a dependence almost linear with the resistance and a reproductive behavior, which allows uniformity in the manufacturing process. This study show that it is possible to use Ta x N y films to manufacture resistors that permit you to tune the resistance values according to the needs of your application, for example in Multi-chip module (MCM).
In this work we present a far-infrared asymmetric quantum Bragg mirror detector (QBMD) based on GaAs/AlGaAs. The heterostructure is designed to explore a transition at 111 meV (11,2 μm) between the ground state and a leaky electronic state in the continuum. The calculated photovoltaic photocurrent shows a good agreement with the expected absorption.
In this work, we estimate the oscillator strength of the optical transitions in quantum Bragg mirror detectors (QBMDs) and determine which structure provides its maximum value. The thicknesses of the quantum wells (QWs) and barriers of the probed structures strongly influence the wavefunctions and, thus, the optical transitions of the active region. For this reason, the structure geometry must be carefully chosen to achieve high oscillator strength at the desired operation energy. Since the QBMD has several QWs and barriers to be optimized, we have performed a series of approximately 350,000 simulations to map the transition energy and the oscillator strength to fully understand the role played by the thickness of each layer of a base structure with 7 quantum wells in total. Due to the computational cost of conducting these simulations for every possible configuration, we shifted to genetic algorithms to find optimal solutions with less constraints in the simulation. Finally, we present a validation of our genetic algorithm, which shows that it consistently finds high-performing structures as validated by the high oscillator strength values obtained. Overall, our study highlights the promising potential of genetic algorithms as a powerful tool for optimizing the properties of QBMDs.
There is a huge field of research involving graphene, both for the study of its properties and on its countless applications. As a result, graphene with different sizes and morphologies have been obtained by several techniques, as is the case of 3D graphene foams obtained by CVD, chemical routes, and recently by laser-induced graphene (LIG). In this work, a pressure sensor based on LIG, using Polyimide (Kapton) tape adhered to polydimethylsiloxane (PDMS) films as precursor material is manufactured. The laser used to trace the graphene lines is a low cost commercial laser of 405 nm and 500mW. The formation of graphene on the Kapton adhered to PDMS, allows a great flexibility and greater sensitivity to pressure. So, the best parameters were established in thickness, laser scanning speed and focus, to obtain graphene foam traces with good quality and high conductivity for a better response as a pressure sensor. A sheet resistance of 85Ω/□ and pressure sensitivity was obtained.
The device physics of organic thin-film transistors is still an active area of research. Many works focus on the peculiarities of charge transport in organic semiconductors. However, the absence of doping and the use of a thin-film device architecture already distinguish OTFTs from silicon based field-effect transistors. In this study, we reveal that even in the absence of any terminal bias, the intrinsic organic semiconductor in OTFTs draws a significant amount of background charges from the source contact. These injected charges result in the formation of a potential barrier along the access path to the transistor channel, which plays a critical role in current flow. We present an analytical expression for the electrostatic potential along this crucial path, enabling the refinement of existing compact models for OTFTs.
Flexible substrates are being sought after as an alternative to meet the demand of the integrated circuit industry. Polyimide (PI) is a promising option due to its excellent mechanical and electrical properties. This study uses PI as a substrate to test different copper (Cu) seed deposition processes via sputtering. Results showed that deposition time, pressure, and power have the greatest impact on film thickness and sheet resistance. Reliability was evaluated through peel tape tests after deposition, temperature cycling, and highly-accelerated stress testing (HAST). Most failures occurred in non-plasma treated samples, and there was a 17% increase in failure after temperature cycling. Film detachments were observed in all experiments after HAST, which may be attributed to moisture between PI and Ti/Cu caused by their different thermal expansion coefficients.
For decades, chipmakers brought digital logic ICs (integrated circuit) with an exponentially increasing complexity and computing power to market. This was made possible by continuously shrinking the size of the basic component of logic ICs, i.e., by MOSFET scaling. Over the years, MOSFET scaling passed through several stages with a new stage beginning when the scaling method used at the previous stage was approaching its limits. In the present paper, we provide an overview of these stages of scaling, discuss the transition from the conventional planar MOSFET to the FinFET architecture in the early 2010s, and converse about the upcoming introduction of another new MOSFET architecture, the SNC (stacked nanosheet channel) MOSFET. Here, special emphasis is put on transistors using two-dimensional (2D) materials for the stacked channels.
