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    International Interconnect Technology Conference

    International Interconnect Technology Conference

    Conference

    年发文量

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    论文(405)

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    1Ru ALD with Bulk-Like Resistivity for Interconnects
    Michael Breeden,Victor Wang,Ravindra Kanjolia,Mansour Moinpour,Jacob Woodruff,Harsono Simka,Andrew Kummel

    Ruthenium is viewed as a promising alternative to Cu and Co interconnect metals at M0/M1 interconnect layers due to its lower effective resistivity in highly-confined layers and vias, as well as its resistance to diffusion into porous low-k dielectrics and to electromigration. Atomic layer deposition of Ru has been reported with a variety of precursors, but the search for a Ru ALD process with a close-to-bulk (~7 μΩ·cm) resistivity is ongoing, with special interest in a process that can selectively-deposit low-resistance Ru films without passivants. In this work, Ru films with close-to-bulk resistivity deposited using Ru(CpEt)2 were investigated using four-point-probe resistivity measurements, Xray photoelectron spectroscopy (XPS) for chemical analysis, X-ray diffraction/reflectometry (XRD/XRR) for grain size and thicknesses, and scanning electron microscopy (SEM) and atomic force microscopy (AFM) for film morphology.

    2022引用:2
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    2Performance Improvement for Cu Interconnects by SAM and ELD Technologies
    Y. Kikuchi,M. Iwashita, H. Nagai, H. Komatsu, Y. Ozaki, K. Fujita, G. Pattanaik,H. Kawasaki, K. Iwai

    SAM (Self-Assemble-Monolayer) is a material with selectively growth on only metal or dielectric film. Moreover, SAM can have functionality such as growth inhibitory property of ALD film and Cu barrier property. The barrier/liner metal at Via bottom can be removed by SAM which has an ALD film growth inhibitory property, and by using the ELD-Cu(Electro-Less-Deposition) Pre-Via-Fill process, Cu volume at Via can be increased and Via resistance can be reduced. In this study, we have introduced the process that can reduce the process steps and reduce Via resistance by using SAM with Cu barrier properties.

    2022引用:1
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    3A New Methodology for Modeling Air-Gap TDDB
    Yu Fang,I. Ciofi,Ph. Roussel,A. Lesniewska,R. Degraeve,D. Tierno,I. De Wolf,K. Croes

    We present a methodology for predicting line-to-line reliability of Air-Gap schemes, which accounts for line-edge roughness and electric field enhancement. Our model is calibrated to the intrinsic reliability properties of the Air-Gap interface dielectrics, which are characterized by performing time-dependent dielectric breakdown measurements on planar capacitors. We validate our model to experimental TDDB data from Ru/Air-Gap semi-damascene interconnects and predict that deeper Air-Gaps, extending into the bottom interlayer dielectric, can significantly boost the reliability of Air-Gaps schemes.

    2022
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    4MP18–26 Ru Direct-Etch Integration Development with Leakage Improvement and Increased Aspect Ratio
    Ankit Pokhrel,Giulio Marti,Martin O’Toole,Gayle Murdoch,Anshul Gupta,Stefan Decoster,Souvik Kundu,Elisabeth Camerotto,Quoc Toan Le,Arame Thiam,Alicja Lesniewska,Seongho Park,

    Ru semi-damascene has been recently considered as a promising candidate to replace the conventional Cu dual damascene to meet the continued RC scaling needs in sub-2nm technology nodes. In this work, Ru lines with critical dimension of 9–10 nm and AR 3–6 targeting MP18-MP26 were fabricated in IMEC 300-mm pilot line using EUV-SADP technique and subsequent direct etch of Ru films for the first time. We demonstrate the optimizations made in patterning, metal etch, and clean that enabled the successful fabrication of Ru lines. Single line resistance of 10μm Ru with AR 3 shows that >90% of the devices meet the resistance target of <700 Ω/μm for MP20–26 and ~50% for MP18. Leakage current measurements between the core-defined and gap-defined Ru lines show >90% of devices meet the leakage target of 10 −11 A/μm.

    2022引用:5
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    5Selective and Tunable Slurry for Advanced Packaging Epoxy Mold Compound
    Shogo Arata, Chiaki Noda, Yasuhiro Ichige, Satoyuki Nomura, T. S. Widodo, N. Tsunoda,X. F. Brun

    Chemical mechanical polishing (CMP) process have been heavily utilized in throughout the semiconductor manufacturing processes from front-end to back-end for decades. However, CMP process is still in its early stage for advanced packaging because of the difficulties observed with implementation of CMP process such as: low removal rate, poor selectivity, and elevated surface roughness and defects on the organic polymer film. Nevertheless, CMP process is becoming an essential part of the 2D advanced packaging and beyond in order to achieve smaller pitch and improve re-distribution layer (RDL) process.In this paper, we focus on highly tunable removal rate and selectivity, and low defectivity performance slurry for epoxy mold compound (EMC) with silica filler and Cu pads.

    2022
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    高被引作者

    作者引用发文
    Matthew J. Breitwisch5191
    Zsolt Tokei38424
    K. Fischer2252
    T. Mule2252
    P. Yashar2252
    Vinay Chikarmane2252
    Christopher J. Wilson2049
    c adelmann1958
    Eric Beyne1924
    Muhannad S Bakir (Muhannad Bakir)1885

    高产作者

    作者引用发文
    Zsolt Tokei38424
    Kristof Croes15517
    Zs. Tokei10115
    Ivan Ciofi10214
    Olalla Varela Pedreira12313
    Junichi Koike10911
    Nick Lanzillo6910
    Huai Huang1249
    Christopher J. Wilson2049
    t spooner1229

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