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    Microelectronics Reliability

    Microelectronics Reliability

    JournalISSN 0026-2714eISSN 1872-941X中科院 工程技术 3区

    年发文量

    研究主题

    论文(15157)

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    1Active Thermography-Based Detection of Thermistor Joints Using Difference Shadow Method and Deep Learning Algorithm
    Jiayi Yuan,Zhenzhi He,Bo Sun,Tianchi Chen,Guanglan Liao,Xiangning Lu
    2026
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    2Optimizing Gate Voltage of SiC MOSFETs to Enhance the Lifetime and Reliability of an H-ANPC Inverter
    Mohammad A. Abbaszada, Nanditha Gajanur,Sudip K. Mazumder

    SiC MOSFETs offer significant advantages over their silicon counterparts, including higher breakdown voltage, faster switching speed, and better thermal conductivity, making them well-suited for high-frequency, high-voltage, and high-temperature applications in power electronics. Nevertheless, the long-term reliability of SiC MOSFETs remains a major challenge, as device failures can lead to system-level malfunctions, unplanned outages, and elevated safety risks, particularly in mission-critical applications. To assess their reliability under typical converter stresses, a hybrid-active neutral point clamped (H-ANPC) inverter is used. The H-ANPC inverter efficiently balances switching losses and thermal stress, providing higher efficiency and better thermal management, making it ideal for high-power applications requiring robust, long-term reliability. This article proposed an active gate voltage control (AGVC) technique, which is used to develop a scheme for optimizing gate voltage to improve the reliability and lifetime of SiC MOSFETs within the H-ANPC inverter. To determine the lifetime models of SiC MOSFETs in the H-ANPC inverter, two accelerated tests (ATs), the inverter-like accelerated test (IAT), and the time-dependent dielectric breakdown (TDDB) test are applied. Although the IAT-based lifetime model indicates SiC MOSFET reliability, gate voltage variations make it crucial to assess impacts on gate oxide degradation by the TDDB-based lifetime model. The article includes detailed explanations of the experimental setups for IAT, TDDB, and the H-ANPC inverter, along with an analysis of the results and lifetime modeling. Also, the AGVC scheme (AGVCS) is tested within the IAT framework, and results are provided. Together, these insights highlight strategies for enhancing the reliability and lifetime of SiC MOSFETs in H-ANPC inverter applications.

    2026
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    3Maximum Likelihood Weibull Analysis of Repetitive Short-Circuit Stress in Asymmetrical Trench SiC MOSFETs
    Krisztián Kovács,Michal Minárik, Jozef Kozárik,Martin Weis,Juraj Marek

    The repetitive short-circuit (R-SC) endurance of asymmetrical trench SiC MOSFETs is characterized through a maximum likelihood Weibull statistical framework with 90% Fisher-information confidence intervals, applied to a test matrix spanning two DC-link voltages (400V and 600V), six pulse durations per voltage, and four case temperatures (25, 75, 100, and 125°C) at two selected operating points. The Weibull shape parameter β as a function of pulse duration is identified as a quantitative statistical signature of the underlying degradation behavior, with a strictly monotonically decreasing β(tp) profile at 400V (verified by the Mann–Kendall trend test at the 1% significance level) and a non-monotonic profile at 600V featuring a local minimum within the degradational regime followed by a sharp rise within the catastrophic transition window. The temperature-dependent analysis reveals a sign reversal of the pairwise apparent activation energy of the scale parameter at both operating conditions, with global linear Arrhenius regression coefficients of R2=0.164 and R2=0.528 that rule out a single-Arrhenius lifetime model over the tested case-temperature range. Post-stress transfer characteristics provide an independent electrical signature: the change in subthreshold swing and the threshold-voltage shift follow qualitatively different pulse-duration dependences, which a single trapped-charge population could not produce. The convergence of these complementary signatures — voltage-dependent β(tp) profile, sign reversal of the pairwise activation energy, quantile-dependent power-law exponent, and the divergent evolution of the two static-parameter metrics — is consistent with two competing degradation mechanisms whose relative weight depends on pulse duration, applied voltage, and case temperature. The engineering implication is that the population spread quantified by the B99/B1 ratio reaches a factor of 30.3 at 400V and 14µs, requiring derating prediction based on the lower-tail percentile rather than on the median in regimes of strong β(tp) decline.

    2026
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    4Material–thickness Response Mapping and Competing Thermal-Expansion Mechanisms in Polymer-Lined Cu-filled Through-Glass Vias
    Liang Cao, Ke Chen,Xiaohui Guo
    2026
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    5Backside Power Delivery As a Thermal Remedy for Buried-Oxide Self-Heating in 3 Nm Complementary Forksheet CMOS
    Bhubesh Chander Joshi, Ajeet Kumar
    2026
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    立即登录,查看全部 15157 篇论文

    高被引作者

    作者引用发文
    Michael Pecht588479
    Alan S Willsky34251
    Gaudenzio Meneghesso2269158
    Enrico Zanoni2118147
    Yan Cheong Chan195234
    Yi-Shao Lai193855
    Mauro Ciappa181563
    Matteo Meneghini1558108
    Guoqi Zhang (Kouchi)153576
    Adelmo Ortiz-Conde152717

    高产作者

    作者引用发文
    Gaudenzio Meneghesso2269158
    Enrico Zanoni2118147
    Matteo Meneghini1558108
    M.K. Stojcev25394
    Francesco Iannuzzo117686
    Lavika Goel84280
    Michael Pecht588479
    Guoqi Zhang (Kouchi)153576
    M.N. Gopalan31966
    P. Perdu46065

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