A low phase noise fractional-N frequency synthesizer for CMOS UHF RFID reader is introduced in this paper. The phase noise requirements are summarized for the EPC global C1G2 and ETSI multi-protocol operation. A low drop-output regulator is presented to improve the phase noise performance of the VCO. Based on the error-feedback delta-sigma modulator,a coefficient reconfiguring technology has been introduced to improve the phase noise performance at intermediate frequency band. The proposed circuit is implemented with 0.18 μm RF CMOS process. The fractional-N frequency synthesizer achieves a phase noise of-108 dBc/Hz and-129.8 dBc/Hz at 200 kHz and 1 MHz offset from the carrier respectively. The whole chip draws 9.6 mA from the multiple power supply configuration.
A low phase noise VCO(voltage controlled oscillator)for single chip UHF RFID Reader is proposed.The regulator and filtering technology are adopted in order to suppress the noise from VDD and shot the second harmonic of current source for phase noise reduction in 1/f3 region.Meanwhile,proper L with a relative better Q value is chosen to improve phase noise in 1/f2 region.Low noise bandgap is also added in the propose VCO.The VCO is implemented using UMC0.18 μm MM/RF CMOS technology.Compared with the traditional VCO,simulation result shows the phase noise reduction is around 5 dB in all frequency regions.The center frequency of proposed VCO is 1.8 GHz with the tuning rage of 11% while the power consumption is 7.2 mA at 3.3 V.The VCO has phase noise of-127 dBc/Hz@1 MHz.
A low phase noise CMOS LC VCO working at 1.8 GHz with quadrature prescaler for single-chip UHF 860 - 960 MHz RFID reader is proposed in this paper. The symmetrical filtration technology is adopted to suppress noise for complementary cross coupled LC VCO. FOM method is applied in low-noise VCO design. Injection locked prescaler with ring oscillator core can provide wide locking range. The proposed LC VCO and prescaler are implemented in IBM 0.18 mum RF CMOS technology. The measurement results show that the VCO achieves a phase noise of -132 dBc/Hz at 1 MHz offset from 1.8 GHz while drawing 10.5 mA from a 3.3 V power supply. The tuning range of the proposed LC VCO covers from 1.71 GHz to 2.19 GHz. The locking range of the proposed prescaler is 66.35% with in-phase and quadrature outputs.
According to requirements of EPC RFID Class-1 Generation-2 Protocols,a 3-order II-type charge pump phase locked loop(CPPLL) with a 250 kHz reference frequency was proposed,which acted as a frequency synthesizer for single-chip UHF RFID reader.The proposed CPPLL was implemented in MOSIS IBM 0.18 μm RF/MM CMOS technology.Post simulation results showed that the PLL had an output frequency ranging from 760 MHz to 1.12 GHz,and a phase noise of-113.1 dBc/Hz and-120.4 dBc/Hz at 250 kHz and 500 kHz offset,respectively,for 900 MHz operating frequency,while drawing 9.4 mA of current from a 3.3 V power supply.
A low phase noise CMOS LC VCO with prescaler for monolithic UHF RFID reader was proposed.A symmetrical filtration technology was adopted to suppress noise for complementary cross coupled LC VCO.Injection locked prescaler with ring oscillator core can provide wide locking range.Implemented with UMC 0.18 μm RF/MM CMOS technology, the proposed LC VCO covers a tuning range from 1.283 GHz to 2.557 GHz, and the prescaler has a locking range of 66.35% with in-phase and quadrature output.Test results showed that the PLL had a phase noise of -132.25 dBc/Hz at 3 MHz offset from 895.5 MHz, while drawing 8 mA of power from a 3.3 V supply.
Using forward genetic analysis, we identified the insertion of an intracisternal A particle (IAP) retrotransposon element in the plasma membrane calcium ATPase 2 gene (Pmca2/Atp2b2) in the joggle mouse, a novel mutant that displays ataxic gait by postnatal day 12. Expression of Pmca2 mRNA in the joggle mouse is only 5% of that in the wild type mouse. The insertion is located 15 bp downstream of the donor splice site of the exon containing the initiation codon. Chimeric mRNA composed of the 5'-region of Pmca2 and the IAP element were detected, indicating that some of the primary transcripts are terminated by polyadenylation signals in long terminal repeats of the IAP element. We also identified cryptic splice sites in the IAP element that are likely involved in aberrant splicing of the Pmca2 primary transcripts that leads to rapid degradation of mRNA through nonsense mediated mRNA decay. Ataxia was observed in compound heterozygous mice carrying the joggle mutation and the wriggle mutation, a previously reported missense Pmca2 mutant. Thus, we attributed ataxia in joggle mice to reduced expression of Pmca2, resulting from insertion of the IAP element.
A multi-protocol,programmable input interface circuits by SMIC18 mixed-signal process was proposed,which applied in high-performance digital chips.Simulated by Cadence SPECTRE and tested,the results indicate that the chip can interface with ICs that under JEDEC multi-protocols with a programmable delay,and switch freely.According to different protocols,the circuits is configurable to choose special buffer for input,so 10 JEDEC standards are glued on the same block,involving HSTL with 200 MHz and LVTTL with 5 V tolerant.
A general purpose output Buffer with ESD for IO blocks of ASIC and FPGA is proposed in this paper.The output buffer is supplied by three power sources,and its driving ability can be exactly controlled by the digital signal so that it supports 16 selectable IO standards.The output Buffer and its ESD are implemented with SMIC 0.18 μm MM CMOS technology.The simulation results show that the output Buffer could be worked at 250 MHz for all IO standards and the transport lag is between 660 ps and 1180 ps.
A differential low noise amplifier applied in ASK receiver is designed and fabricated in UMC 0.18 ¿m CMOS process. The amplifier employs a differential cascode structure with source degeneration stage for single input and differential output, and avoids using balun when connected to mixer. This low noise amplifier has a measured forward gain of 18.2 dB and a noise figure of only 1.65 dB, thus can significantly improves entire receiver performance. Input and output matching is -28 dB and -24 dB, respectively, while input third-order intercept point (IIP3) is -9.8 dBm. The total power dissipation is 6.5 mW at 1.8 V supply and the die area is 0.6 mm × 0.9 mm.
A 6th-order programmable fully differential Chebyshev low-pass filter for 860-960 MHz UHF RFID reader was implemented based on TSMC's 0.25μm RF CMOS process.A fully balanced differential difference amplifier using common-mode feedback(CMFB)strategy was employed in this circuit.Circuit simulation showed that the cut-off frequency of the filter could be controlled to 400 kHz、600 kHz、800 kHz、1000 kHz and 1.3 MHz by a 3bit controller,and a spot noise of 20 nV/(Hz)~(1/2)at 1 MHz and 1 dB input compression point of 15 dBm were achieved for the circuit,which dissipates 4.86 mA of current from a single 3.3 V power supply.
A wide locking range injection-locked prescaler based on CMOS ring oscillators in the 0.25-¿m CMOS process is described. The prescaler¿s free-running frequency is 1.47 GHz, and the locking range covers from 1 GHz to 2.4 GHz with in-phase and quadrature output. The prescaler dissipates 1.9 mA from a 3.3-V power supply.
The joggle mouse is a recessive ataxic mutant carrying an unknown mutation in a C3H/He (C3H)-derived chromosomal segment. Taking advantage of the mouse genome database, we selected 127 DNA microsatellite markers showing heterozygosity between C3H and C57BL/6J (B6) and a first round of screening for the joggle mutation was performed on B6-jog/+ partial congenic mice (N4). We identified 4 chromosomal regions in which 13 microsatellite markers show heterozygosity between C3H and B6. Then, we analyzed the genotype of these 4 chromosomal regions in mice that showed the joggle phenotype and mapped the jog locus between markers D6Mit104 (111.4 Mb) and D6Mit336 (125.1 Mb) (an interval of 13.7 Mb) on chromosome 6. By using a partial congenic strain together with the mouse genome database, we successfully mapped the chromosomal localization of the jog locus much more efficiently than by conventional linkage analysis.
While establishing a new mouse strain, we discovered a novel mutant mouse that exhibited ataxia. Mating experiments showed that the mutant phenotype was due to a single autosomal recessive gene, which we have termed joggle (gene symbol: jog). The ataxia becomes apparent around postnatal day 12, when the mice first attempt to walk, and worsens thereafter. The life span of the mutant mouse is comparable to that of the wild-type mouse. After 21 days of age, the cerebellum weights of the jog/jog mice are significantly lower than those of the wild-type mice. These observations indicate that jog/jog mutant mice could be useful models for biomedical research.