To better understand the crystallization mechanism of phase change material, the phase field method is used for the first time in simulations of the switching dynamics of RF switches. This method allows reproducing the nucleation and growth of the crystalline phase during amorphization and crystallization of the PCM. In this work, the quenching behavior of GeTe is compared with that of GST. The presented observations are consistent with the expected crystallization behavior and kinetics of each material. This work demonstrates the interest of the phase field model in PCM RF Switches simulation and highlights the interest of using GeTe rather than GST to obtain better amorphization quality in phase change materials.

One of the most widely used active materials for phase-change memories (PCM), the ternary stoichiometric compound Ge2Sb2Te5 (GST), has a low crystallization temperature of around 150 degrees C. One solution to achieve higher operating temperatures is to enrich GST with additional germanium. This alloy crystallizes into a polycrystalline mixture of two phases, GST and almost pure germanium. In a previous work [R. Bayle et al., J. Appl. Phys. 128, 185 101 (2020)], this crystallization process was studied using a multi-phase field model (MPFM) with a simplified thermal field calculated by a separate solver. Here, we combine the MPFM and a phase-aware electrothermal solver to achieve a consistent multi-physics model for device operations in PCM. Simulations of memory operations are performed to demonstrate its ability to reproduce experimental observations and the most important calibration curves that are used to assess the performance of a PCM cell. (c) 2024 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).

In this article, we propose for the first time a Gerich GeSbTe stack targeting a segregationtolerant phasechange memory (PCM) device ensuring hightemperature data retention (HTDR). We cointegrated an optimized GeN underlayer (GeN UL) with a Gerich GeSbTe material that is known to trigger phase segregation at temperatures compatible with the backendofline (BEOL) thermal budget. A channel inside the GeN layer is reliably created after the low-voltage initialization step, reducing the active volume rather independently of the cell’s critical dimension. Using statistical results from 4-kb arrays, we demonstrate a 40% programming current reduction with respect to devices without underlayer. Moreover, we present a reduced drift of the low resistance “SET” state, known to affect Ge-rich PCM alloys, and HDTR up to 250. Based on TEM/EDX analyses and TCAD simulations, we show how the combination of a reliable initialization step and the specific properties of our stack led to an innovative Ge/Sbrich GeSbTe alloy featuring promising performances.

A self-consistent model for the simulation of Gerich Ge 2 Sb 2 Te 5 phase change memories is presented. Combining the multi-phase field model and a phase-aware electro-thermal solver, it reproduces the multi-physics behavior of the material. Simulations of memory operations are performed to demonstrate its ability to reproduce experimental observations.

A key attribute for Phase-Change Memories to be used for neuromorphic computing is the possibility to create intermediate resistance states by the progressive crystallization during the successive application of set pulses. To complete an experimental approach, we studied progressive crystallization by simulation. Insight on the real mechanisms of progressive crystallization is obtained by coupling Joule heating, diffusion of heat and a phase change model relying on the Phase Field Method.

In this work, we present the extensive electrical characterization of 4kb Phase-Change Memory (PCM) arrays based on “Wall” structure and Ge-rich GeSbTe (GST) material, integrating a SiC dielectric with low thermal conductivity surrounding the heater element for enhanced cell thermal efficiency. We investigate the effects of the introduction of such dielectrics on the electrical performances of the device and we provide a promising path to achieve energy-efficient PCM cells supporting our results by electro-thermal TCAD simulations.

In this study we report for the first time the control of conductance level in PCM cells by means of a frequency modulation of progressive SET pulses. We show that by applying a train of progressive SET pulses, the conductance increases gradually and eventually saturates to a value G sat . The latter can be tailored by changing the duty cycle of the pulse train. We propose a simple physics-based model to explain this effect. First, we simulated the thermal condition in the active region and showed that the increase of conductance was due to nucleation of a spherical hollow region around a central core, where re-amorphization takes place during programming. Based on this we illustrate that the frequency modulation can be analytically described by an equilibrium equation where the increase of conductance is balanced by the intrinsic chalcogenide resistance drift. The model is in very good agreement with data and shows that a fine tuning of the PCM device can be achieved. A frequency blind modulation of the programming pulse is believed to be much easier to be implemented in neuromorphic circuits as synaptic device [1] [2].

In this paper we compare the performances of SiN with respect to an optimized SiC encapsulation in Wall based Phase-Change Memory (PCM) integrating a Ge-rich Ge-Sb-Te alloy (GGST) suitable for high temperature stability in automotive applications. Thanks to the electrical characterization of 4 kb arrays, 3D electro-thermal simulations and TEM analyses performed on programmed devices, we demonstrate the higher programming efficiency in SiC-based PCM devices, thanks to the lower thermal conductivity of the optimized encapsulation. Indeed, the uniform temperature profile achieved in the active layer of SiC encapsulated PCM leads to a retention of one hour at 250 degrees C. A theoretical model is here proposed to describe the electro-thermal behavior of the device, linking the electrical properties, such as the resistance as a function of current characteristics, to the thermal conductivity of the materials that constitute the device. Finally, thanks to our findings, we provide some guidelines to achieve drastic current reduction via the thermal engineering of the next generation PCM technology.

In this article, we demonstrate at array level and in industrial-like devices, the extreme scaling down to nanometric dimensions of the phase-change memory (PCM) technology due to an innovative self-nanoconfined PCM (SNC PCM) device. We show how such solution based on an optimized GeN/GeSbTe stack enables programming down to 50 $\mu \text{A}$ and endurance up to more than $10^{{8}}$ cycles in 4-kb arrays, with the huge advantage of having no dependence on the critical lithography dimension used. We further demonstrate that the high thermal confinement achieved in such extremely confined PCM makes the engineering of the SET pulse becoming fundamental in order to ensure a reduced SET resistance drift. Moreover, due to physicochemical analyses and 3-D TCAD electrothermal simulations, we demonstrate the SNC phenomenon, revealing an effective scaling of the PCM down to around 12 nm and how it improves the thermal efficiency of the device due to a reduced current density and thermal stress in the system.

The ternary alloy GeSbTe is widely used as material for phase-change memories. Thanks to an optimized Ge-rich GeSbTe alloy, the crystallizion temperature of the alloy is increased and the stability requirements of high working temperature required for automotive applications are fullfilled, but the crystallization of the Ge-rich alloy proceeds with a composition change and a phase separation. We have developed a multi-phase-field model for the crystallization of the Ge-rich GeSbTe alloy and we have coupled it to an electro-thermal solver. This model is able to capture both the emergence of a two-phase polycristalline structure starting from an initially amorphous material, and the melting and recrystallization during the device operations.

The ternary alloy of germanium, antimony, and tellurium (GST) is widely used as a material for phase-change memories. In particular, the stoichiometric compound Ge2Sb2Te5 exhibits a rapid congruent crystallization. To increase the temperature at which spontaneous crystallization erases the stored information, alloys that are enriched in germanium have been investigated. Their crystallization is accompanied by segregation and eventually the nucleation of a new, germanium-rich phase. In order to model the redistribution of alloy components and the time evolution of the microstructure during device operations, we develop a multi-phase-field model for the crystallization of GST that includes segregation and couple it with orientation fields that describe the grain structure. We demonstrate that this model is capable to capture both the emergence of a two-phase polycrystalline structure starting from an initially amorphous material, and the melting and recrystallization during the SET and RESET operations in a memory cell of the “wall” type.

In this paper we present the engineering of highly Sb-rich Ge-Sb-Te phase-change materials integrated in state-of-the-art Phase-Change Memory devices in 4Kb arrays. Thanks to an innovative composition called “delta” or δ-GST, high speed performance and high material stability under cycling is achieved in arrays and demonstrated by both physicochemical analysis and electrical characterization. Finally, the origin of the outstanding high speed in our innovative compound is revealed.

Copper ions drift is modeled in the case of hybrid bonding integration. The continuity equation is coupled to the Poisson’s equation and a copper ion concentration saturation is assumed. A 1D geometry simulation is initially realized to validate the model and 2D geometry simulations of hybrid bonding are analyzed by looking the time to percolate (TTP).

In this paper we present the optimization of the thermal confinement of a heater-based Phase-Change Memory (PCM) integrating a Ge-rich Ge-Sb-Te alloy (GGST) by the engineering of the encapsulation dielectric layer. Lower thermal conductivity of a SiC-based encapsulation layer wrt SiN, is demonstrated to improve the thermal confinement during programming operations in the PCM cell. Thanks to electrical characterization of 4Kb PCM arrays, we investigate the performance of thermally improved PCM devices, showing higher programming efficiency, higher SET programming speed and data retention higher than 250°C. The results are supported by 3D electro-thermal simulations, highlighting the effects of the higher thermal confinement achieved. These results confirm the outstanding improvement of the performances achievable in state-of-the-art PCM thanks to the thermal engineering of the cell.

In this paper we analyze recent progress in Phase-Change Memory (PCM) technology targeting both Storage Class Memory and embedded applications. The challenge to achieve a high temperature data retention without compromising the device programming speed can be addressed by material engineering. We show that volume and thermal confinement improvement of the phase-change material enables a high (10-fold) reduction of the programming current, achieved also by the optimization of the device architecture, in particular in the case of a confined structure. It leads to a higher cell efficiency proven by a 6x reduction of the programming current density wrt a standard PCM structure. Furthermore, we demonstrate the reduction of thermal losses by the tuning of the thermal conductivity of the dielectrics surrounding the phase-change material. Finally, we propose some considerations about the PCM ultimate scaling and the reliability at such dimensions, showing that the engineering of the bottom electrode/phase-change material interface can lead to a reduced variability in scaled devices.

Phase change memory can provide a remarkable artificial synapse for neuromorphic systems, as it features excellent reliability and can be used as an analog memory. However, this approach is complicated by the fact that crystallization and amorphization differ radically: crystallization can be realized in a very gradual manner, very similarly to synaptic potentiation, while the amorphization process tends to be abrupt, unlike synaptic depression. Addressing this non-biorealism of amorphization requires system-level solutions that have considerable energy cost or limit the generality of the approach. This work demonstrates experimentally that an adaptation of the memory structure associated with an initialization electrical pulse followed by a sequence of identical fast pulses can overcome this challenge. A single device can then naturally implement gradual long-term potentiation and depression, much like synapses in biology. This study evidences through statistical measurements the reproducibility of the approach, discusses its physical origin, as well as the importance of the device architecture and of the initial electrical pulse. Through the use of system-level simulation, it is shown that this device is especially adapted to a neuroscience-inspired learning. These results highlight how nanodevices can be suitable for bioinspired applications while retaining the qualities of industrial technology.

In this paper, a new continuous multilevel compact model for phase-change memory (PCM) is proposed. It is based on the modified rate equations with the introduction of a variable related to material melting. The model is evaluated using a large set of dynamic measurements and shows a good accuracy with a single model card. All fitting parameters are discussed, and their impacts are detailed. Full circuit simulation is performed. Good convergence and fast simulation time suggest that this new compact model can be exploited for PCM circuit design.

In this paper we investigate the impact of N-doping in optimized Ge-rich Ge2Sb2Te5 materials on device programming and storing performance. We integrate these alloys in state-of-the-art Phase-Change Memory (PCM) cells and we analyze the efficiency of the SET operation in N-doped and undoped memory cells, comparing voltage based programming with current based programming. This aspect is extensively investigated through electrical characterization, physico-chemical analysis and electro-thermal simulations. The thermal stability of these devices is finally evaluated and high temperature data retention is granted enabling PCM for embedded applications.

This letter studies the intrinsic variability in oxide-based resistive RAM technology, highlighting the presence of a short range (≈40) correlation of resistances among cycles (for both low resistance state and high resistance state). Experimental results demonstrate the existence of a resistance correlation, and an analytical model is proposed in order to explain the findings. The presence of the correlation seems to indicate that the conductive filament, which is believed to be the basis of resistive RAM behavior, keeps for a limited number of cycling operations a memory of its morphology. The extension of this correlation depends on the programming conditions.