Here, we show a process of AlGaN/GaN atomic layer etching with a high synergy of >91%. Achieved by means of a cyclical HBr and Ar process, highly controllable layer removal was observed within the atomic layer etching window and is attributed to careful parameter calibration plus lower reactivity of the HBr chemistry. Such etching is a valuable component in the production of high-performance enhancement-mode GaN field effect transistor devices.

In this article, we report the optimization of ohmic contact formation on AlGaN/GaN on low-resistivity silicon. For achieving this, a strategy of uneven AlGaN/GaN was introduced through patterned etching of the substrate under the contact. Various pattern designs (holes, horizontal lines, vertical lines, grid) and varied etch depth (above and below the 2-D electron gas) were investigated. Furthermore, a study of planar and nonplanar ohmic metallization was investigated. Compared to a traditional fabrication strategy, we observed a reduced contact resistance from 0.35 to 0.27 Omega. mm by employing a grid etching approach with a "below channel" etch depth and nonplanar ohmic metallization. In general, measurements of "below channel" test structures exhibited improved contact resistance compared to "above channel" in both planar and nonplanar ohmic metallization.

We demonstrate a quadrature branch-line coupler operating at 90 GHz on GaN-on-low resistivity silicon substrates (ρ <; 40 Ω.cm). To reduce the losses offered by the low-resistivity silicon at 90 GHz, a shielding technique is used where the silicon substrate is covered by a ground plane (Al metal). SiO 2 dielectric of thickness 10 μm is used as a spacer between the top metal and ground plane to further improve the performance of the coupler. Measured results showed return loss and isolation as low as -25 dB and -16 dB respectively, and coupling loss of -4 ± 0.5 dB from 81 GHz to 101 GHz. The output amplitude imbalance achieved was less than 1 dB. The coupler validates the shielding MMIC technology on GaN-on-low resistivity silicon substrate.

This paper presents novel multi-channel RF lateral Schottky-barrier diodes (SBDs) based on AlGaN/GaN on low resistivity (LR) (sigma = 0.02 Omega.cm) silicon substrates. The developed technology offers a reduction of 37 % in onset voltage, V-ON (from 1.34 to 0.84 V), and 36 % in ON-resistance, R-ON (1.52 to 0.97 to Omega.mm) as a result of lowering the Schottky barrier height, Phi(n), when compared to conventional lateral SBDs. No compromise in reverse-breakdown voltage and reverse-bias leakage current performance was observed as both multi-channel and conventional technologies exhibited V-BV of (V-BV > 30 V) and I-R of (I-R < 38 mu A/mm), respectively. Furthermore, a precise small-signal equivalent circuit model was developed and verified for frequencies up to 110 GHz. The fabricated devices exhibited cut-off frequencies of up to 0.6 THz, demonstrating the potential use of lateral AlGaN/GaN SBDs on LR silicon for high-efficiency, high-frequency integrated circuits applications.

The results of an investigation into the impact of in situ H-2 plasma exposure on the electrical properties of the p/n-In-0.3 Ga-0.7 Sb-Al2O3 interface are presented. Samples were processed using a clustered inductively coupled plasma reactive ion etching and atomic layer deposition tool. Metal oxide semiconductor capacitors were fabricated subsequent to H-2 plasma processing and Al2O3 deposition, and the corresponding capacitance-voltage and conductance-voltage measurements were analyzed quantitatively via the simulation of an equivalent circuit model. Interface state (D-it) and border trap (N-bt) densities were extracted for samples subjected to the optimal process, with a minimum D-it of 1.73 x 10(12) eV(-1) cm(-2) located at similar to 110meV below the conduction band edge and peak N-bt approximately aligned with the valence and conduction band edges of 3 x 10(19) cm(-3) and 6.5 x 10(19) cm(-3), respectively. Analysis of the inversion response in terms of the extraction of the activation energy of minority carriers in inversion (p-type) and the observation of characteristics that pertain to minority carriers being supplied from an external inversion region (n-type) unequivocally demonstrate that the Fermi level is unpinned and that genuine surface inversion is observed for both doping polarities. Published under license by AIP Publishing.

Ternary mixtures of water, surfactant, and oil, which spontaneously self-assemble to form isotropic, low viscosity liquid phases, are called microemulsions. The ternary phase behavior of mixtures of hydrocarbon surfactants, water, and organic oils has been extensively studied, and the principles governing such systems are well understood. The trisiloxane surfactants shown in the accompanying diagram are used in many commercial applications such as wetting agents, agricultural adjuvants, and paint additives. Despite their wide usage, study and understanding of these siloxane surfactants have been mostly limited to their wetting behavior and surface activity. Emulsification of silicone oils, especially polydimethylsiloxane, by hydrocarbon surfactants is extensively described in the patent art and in the literature. Methods and compositions to prepare microemulsions of amine functional silicone polymers are also well known. K. R. Anderson et al. prepared monodisperse emulsions of silicone oil by hydrolysis of dimethyldiethoxysilane.

Novel MMIC spiral inductors on GaN-on-low-resistivity silicon (LR-Si) substrates (sigma < 40 Omega . cm) are demonstrated with enhanced self-resonance frequency (f(SRF))and Q-factor. The developed technology improves inductor performance by suppressing substrate coupling effects using air-bridge technology above benzocyclobutene dielectric as an interface layer on the lossy substrate. A 0.83-nH spiral inductor with peak Q-factor enhancement of 57% (Q = 22 at 24 GHz) and maximum f(SRF) of 59 GHz was achieved because of the extra 5-mu m elevation in air. An accurate broad-band model for the fabricated inductors has been developed and verified for further performance analysis up to 40 GHz. The proposed inductors utilize cost-effective, reliable, and MMIC-compatible technology for the realization of high-performance RF GaN-on-LR Si MMIC circuits for millimeter-wave applications.

Surface transfer doping of diamond fundamentally requires termination of the diamond surface with a species such as hydrogen to allow the interfacial charge exchange required to establish surface conductivity. Here we show the effects of varied hydrogen plasma power on the roughness and conductivity of the (100) diamond surface. Prior to hydrogen termination, substrates were etched using tailored Cl-2 + Ar and O-2 + Ar chemistries to produce a very smooth surface of similar to 0.2 nm roughness average while also removing similar to 3.4 mu m from the top surface as measured by Atomic Force Microscopy (AFM). Use of etching post polishing provides an effective means of producing smoother diamond surfaces with reduced crystal damage as opposed to scaife polishing alone. By producing nominally identical etched surfaces, a relationship between surface conductivity and hydrogen termination plasma power was observed. Using MoO3 as a surface acceptor material, Hall measurements were performed to examine sheet resistance, carrier density and mobility within the diamond. Increased surface conductivity due to enhanced hole mobility was observed at higher hydrogen plasma power conditions, despite an associated increase in roughness of the diamond surface.

The impact of the stress in room temperature inductively coupled plasma chemical vapour deposited (ICP-CVD) SiNx surface passivation layers on off-state drain (IDS-off) and gate leakage currents (I-GS) in AlGaN/GaN high electron mobility transistors (HEMTs) is reported. IDS-off and I-GS in 2 m gate length devices were reduced by up to four orders of magnitude to approximate to 10 pA/mm using a compressively stressed bilayer SiNx passivation scheme. In addition, I-on/I-off of approximate to 10(11) and subthreshold slope of 68 mV/dec were obtained using this strain engineered surface passivation approach.

The junctionless MOSFET (JLFET) architecture has attracted much attention as an enabling technology for ultra-scaled CMOS devices [1]. The dominant scattering mechanism in JLFETs is impurity scattering due to its necessarily highly doped channel [1]. Accordingly, III-V's may offer an even greater advantage as the channel material for JLFETs than for conventional MOSFETs as they suffer less from mobility degradation due to impurity scattering [2]. Current Si CMOS devices employ non-planar architectures with high aspect ratio fins which serve to increase the on current (Ion) per chip surface area [3]. This necessitates that any incarnation of a III - V MOSFET must also exploit the vertical dimension. Additionally, it must do so by employing a `top-down' fabrication approach to remain compatible with Si CMOS processing. This requires a low Dit dielectric interface to etched III-V fin sidewalls. To date, all III-V junctionless FinFETs (JLFinFETs) demonstrated have employed fin heights which are smaller than the maximum depletion width of their respective channels, and therefore can be well modulated by the top gate only: offering little insight into the effectiveness of the gated sidewalls. We implement a low damage etch process to form high aspect ratio, In053Ga047As JLFinFETs which have record performance in terms of Ion normalized to fin width.

In this work, we report the performance of 3 mu m gate length dual barrier InAlN/AlGaN/GaN HEMTs on Si substrates with gate-drain contact separations in the range 4-26 mu m. Devices with Pt- and Ni-based gates were studied and their leakage characteristics are compared. Maximum drain current I-DS of approximate to 1Amm(-1), maximum extrinsic transconductance g(m) approximate to 203mSmm(-1) and on-resistance R-on approximate to 4.07mm for gate to drain distance L-GD=4 mu m were achieved. Nearly ideal sub-threshold swing of approximate to 65.6mVdec(-1) was obtained for L-GD=14 mu m. The use of Pt-based gate metal stacks led to a two to three orders of magnitude gate leakage current decrease compared to Ni-based gates. The influence of InAlN layer thickness on the transistor transfer characteristics is also discussed.

This study reports the impact of forming gas annealing (FGA) on the electrical characteristics of sulfur passivated, atomic layer deposited Al2O3 gate dielectrics deposited on (110) oriented n- and p-doped In0.53Ga0.47 As layers metal-oxide-semiconductor capacitors (MOSCAPs). In combination, these approaches enable significant Fermi level movement through the bandgap of both n- and p-doped In0.53Ga0.47 As (110) MOSCAPs. A midgap interface trap density (Dit) value in the range 0.87−1.8×1012 cm−2eV−1 is observed from the samples studied. Close to the conduction band edge, a Dit value of 3.1×1011 cm−2eV−1 is obtained. These data indicate the combination of sulfur pre-treatment and FGA is advantageous in passivating trap states in the upper half of the bandgap of (110) oriented In0.53Ga0.47 As. This is further demonstrated by a reduction in border trap density in the n-type In0.53Ga0.47 As (110) MOSCAPs from 1.8×1012 cm−2 to 5.3×1011 cm−2 as a result of the FGA process. This is in contrast to the observed increase in border trap density after FGA from 7.3×1011 cm−2 to 1.4×1012 cm−2 in p-type In0.53Ga0.47 As (110) MOSCAPs, which suggest FGA is not as effective in passsivating states close to the valence band edge.

This paper reviews some recent activity at the James Watt Nanofabrication Centre in the University of Glasgow in the area of plasma processing for energy efficient compound semiconductor-based transistors. Atomic layer etching suitable for controllable recess etching in GaN power transistors will be discussed. In addition, plasma based surface passivation techniques will be reviewed for a variety of compound semiconductor materials ((100) and (110) oriented InGaAs and InGaSb).

In this work, a viable passive components and transmission media technology is presented for THz-Monolithic Integrated Circuits (THz-MIC). The developed technology is based on shielded microstrip (S-MS) employing a standard monolithic microwave integrated circuit compatible process. The S-MS transmission media uses a 5-µm layer of benzocyclobutene (BCB) on shielded metalized ground plates avoiding any substrate coupling effects. An insertion loss of less than 3 dB/mm was achieved for frequencies up to 750 GHz. To prove the effectiveness of the technology, a variety of test structures, passive components and antennas have been design, fabricated and characterized. High Q performance was demonstrated making such technology a strong candidate for future THz-MIC technology for many applications such as radar, communications, imaging and sensing.

In this paper we demonstrate a THz microstrip stack antenna on GaN-on-low resistivity silicon substrates (ρ < 40 Ω.cm). To reduce losses caused by the substrate and to enhance performance of the integrated antenna at THz frequencies, the driven patch is shielded by silicon nitride and gold in addition to a layer of benzocyclobutene (BCB). A second circular patch is elevated in air using gold posts, making this design a stack configuration. The demonstrated antenna shows a measured resonance frequency in agreement with the modeling at 0.27 THz and a measured S11 as low as −18 dB was obtained. A directivity, gain and radiation efficiency of 8.3 dB, 3.4 dB, and 32% respectively was exhibited from the 3D EM model. To the authors' knowledge, this is the first demonstrated THz integrated microstrip stack antenna for TMIC (THz Monolithic Integrated Circuits) technology; the developed technology is suitable for high performance III-V material on low resistivity/high dielectric substrates.

In this paper we demonstrate various configurations of THz microstrip antenna on GaN-on low resistivity silicon substrates (ρ <; 40 Ω.cm). To reduce the losses caused by the substrate and to enhance the antenna performance, the driven patch is shielded by a ground plane and silicon nitride, with BCB as the inset layer between them. Second patch (elevated patch) is suspended in air using gold posts, which makes the design stack configuration. Here, study of various design performances has been represented by changing the shape of the antenna between rectangular and circular, optimising the BCB and stack height and evaluating performance of stack using air and BCB as dielectric. Better fabricated performance was obtained when the patch was elevated in air and by using rectangular-circular stack configuration with BCB and elevation height of 5 μm. 3D EM model showed directivity, gain, and radiation efficiency as high as 8.3 dB, 3.4 dB, and 32 % respectively, a significant improvement over single or stack configuration antenna. Better simulated gain (6.7 dB) was obtained with the BCB height of 30 μm using a single antenna and highest gain and directivity (7.5 dB and 8.8 dB respectively) for stack antenna of height 15 μm. To the authors' knowledge this is the first time such a study has been carried out at Terahertz frequency and this developed technology is suitable for high performance III-V material on low resistivity/high dielectric substrates.

In this paper, viable transmission media technology has been demonstrated for the first time on GaN on low-resistivity silicon) substrates (rho< 40 Omega.cm) at H-band frequencies (220325 GHz). The shielded-elevated coplanar waveguide (CPW) lines employ a standard monolithic microwave integrated circuit compatible air bridge process to elevate the CPW traces above a 5-mu m layer of benzocyclobutene on shielded metalized ground plates. An insertion loss of less than 2.3 dB/mm was achieved up to 325 GHz, compared with 27 dB/mm for CPW fabricated directly on the substrate. To prove the efficiency of the technology, a short-circuited stub filter with a resonant frequency of 244 GHz was used. The filter achieved an unloaded Q-factor of 28, along with an insertion loss of 0.35 dB and a return loss of -34 dB. To our knowledge, these results are the best reported to date for GaN-based technology.