This paper presents edge-triggered transceivers (ETT), enabling a 32Gb UCle-like chiplet interconnect when integrated within an active local silicon interconnect (aLSI). The ETT achieves power consumption of 0.07pJ/b and supports compact top-die TX/RX designs while optimizing 0.36pJ/b energy efficiency and 12.35Tb/s/mm2 area bandwidth density. It demonstrates a 32Gb/s die-to-die link at 0.75V with 20.46ps eye width (65% UI) and 530mV eye height across 64 lanes in a 3nm CMOS process.
Conventional management of type-1 diabetes (T1D) relies on finger-prick blood sampling or electrochemical methods, which prevent continuous monitoring and treatment. This paper presents a novel epidermal pasting bioelectronic device (PBD). The device integrates a 19fA-resolution bioluminescence analog front-end (BAFE) with TDM-SAR calibration and a hybrid-mode LED driver. It enables closed-loop realtime detection and precision treatment for T1D. The battery life reaches 48 days.
This paper presents a single-transformer multi-output isolated DC-DC converter generating three regulated rails $(+15 ~\mathrm{V},-5 ~\mathrm{V}$, and +5 V) from wide $12 / 24 ~\mathrm{V}$ inputs. By sharing a common secondary winding in a dual-doubler rectifier configuration, the design achieves three outputs using only four power transistors. Additionally, a reconfigurable two-mode inverter ensures high efficiency across both input voltage conditions. The converter reaches a peak efficiency of 68% with maximum output power of 2.5W.
Diverse AI workloads require flexible data representations and numerical formats. In this work, we present a reconfigurable 2's-complement and sign-magnitude scheme integrated within a versatile-format CIM macro supporting MX, LNS, FP, and INT for MAC operations. Implemented in a 16 nm 72 kb gain-cell array, the macro achieves record energy efficiency (120.5TFLOPS/W) and throughput density $(3.18 \text{TOPS} / \text{mm} 2)$ in MXINT8 mode.
