Doherty PA architecture has gained growing interest due to its superior efficiency when amplifying modulated signals. This tutorial will begin with Doherty PA fundamentals, along with a few intuitive insights often overlooked in textbooks and research articles. We will then highlight several key ingredients in achieving first-pass Doherty PA design success. Finally, we will delve into recent demonstrations featuring bandwidth extension, deep back-off efficiency enhancement, and size reduction.
This tutorial will begin with an overview of jitter budgets for high-performance, DSP-based transceivers, followed by an introduction to the design of high-precision clock generators and CDR circuits. Topics will include low-noise phase-locked loops (PLLs), clock distribution networks, and calibration techniques for clocks and time-interleaved analog-to-digital converters (ADCs). The tutorial will also highlight recent advancements on baud-rate phase detectors and cooperative techniques between CDR and equalizers.
With the advent of Gate-All-Around (GAA) technologies, the discretization of transistor width known to FinFET technologies is no longer required. This enables additional flexibility to optimize embedded memory and logic designs through extensive DTCO. Furthermore, power supply from the backside is becoming available and opens additional design-optimization opportunities. This tutorial will focus on the opportunities and challenges in embedded memory and logic circuit design in technologies beyond FinFET.
The pursuit of ubiquitous connectivity and the evolution of wireless communication technologies such as 5G and beyond and IoT have increased the number of connected devices rapidly and have spurred a growing demand for front-end designs that can operate across a wide frequency spectrum for various communication standards. Furthermore, the growing number of devices creates increasing interference in the environment, from unknown in-band and out-of-band blockers to self-interference in full-duplex and radar systems, and spatial blockers in phased-array and MIMO systems. In this tutorial, a review of circuit and system design techniques for mitigating various types of interference is presented and state-of-the-art performance is summarized.
This presentation starts off with a thorough introduction to optical link architectures and their important figures of merit, covering intensity modulated, direct detect, and coherent transmission approaches. Then, as a first means to realize an optical link, direct modulation relying on VCSELs is addressed. This is followed by external modulation with particular focus on Silicon Photonics and InP platforms. The lecture ends with a detailed treatment of dual-polarization, IQ modulation and coherent detection.
