Surface plasmon polaritons (SPPs) are electromagnetic excitations existing at the interface between a metal and a dielectric. SPPs provide a promising path in nanophotonic devices for light manipulation at the micro and nanoscale with applications in optoelectronics, biomedicine, and energy harvesting. Recently, SPPs are extended to unconventional materials like graphene, transparent oxides, superconductors, and topological systems characterized by linearly dispersive electronic bands. In this respect, 3D Dirac and Weyl semimetals offer a promising frontier for infrared (IR) and terahertz (THz) radiation tuning by topologically-protected SPPs. In this work, the THz-IR optical response of platinum ditelluride (PtTe2) type-II Dirac topological semimetal films grown on Si substrates is investigated. SPPs generated on microscale ribbon arrays of PtTe2 are detected in the far-field limit, finding an excellent agreement among measurements, theoretical models, and electromagnetic simulation data. The far-field measurements are further supported by near-field IR data which indicate a strong electric field enhancement due to the SPP excitation near the ribbon edges. The present findings indicate that the PtTe2 ribbon array appears an ideal active layout for geometrically tunable SPPs thus inspiring a new fashion of optically tunable materials in the technologically demanding THz and IR spectrum.

Two-dimensional (2D) materials are promising for resistive switching in neuromorphic and in-memory computing, as their atomic thickness substantially improve the energetic budget of the device and circuits. However, many 2D resistive switching materials struggle with complex growth methods or limited scalability. 2D tellurium exhibits striking characteristics such as simplicity in chemistry, structure, and synthesis making it suitable for various applications. This study reports the first memristor design based on nanoscaled tellurium synthesized by vapor transport deposition (VTD) at a temperature as low as 100 °C fully compatible with back-end-of-line processing. The resistive switching behavior of tellurium nanosheets is studied by conductive atomic force microscopy, providing valuable insights into its memristive functionality, supported by microscale device measurements. Selecting gold as the substrate material enhances the memristive behavior of nanoscaled tellurium in terms of reduced values of set voltage and energy consumption. In addition, formation of conductive paths leading to resistive switching behavior on the gold substrate is driven by gold-tellurium interface reconfiguration during the VTD process as revealed by energy electron loss spectroscopy analysis. These findings reveal the potential of nanoscaled tellurium as a versatile and scalable material for neuromorphic computing and underscore the influential role of gold electrodes in enhancing its memristive performance.

Half-metallic half-Heusler compounds with strong spin-orbit-coupling and broken inversion symmetry in their crystal structure are promising materials for generating and absorbing spin-currents, thus enabling the electric manipulation of magnetization in energy-efficient spintronic devices. In this work, we report the spin-to-charge conversion in sputtered ultrathin films of the half-Heusler compound MnPtSb with thickness (t) in the range from 1 to 6 nm. A combination of X-ray and transmission electron microscopy measurements evidence the epitaxial nature of these ultrathin non-centrosymmetric MnPtSb films, with a clear (111)-orientation obtained on top of (0001) single-crystal sapphire substrates. The study of the thickness (t)-dependent magnetization dynamics of the MnPtSb(t)/Co(5nm)/Au(5nm) heterostructure revealed that the MnPtSb compound can be used as an efficient spin current generator, even at film thicknesses as low as 1 nm. By making use of spin pumping FMR, we measure a remarkable t-dependent spin-charge conversion in the MnPtSb layers, which clearly demonstrate the interfacial origin of the conversion. When interpreted as arising from the inverse Edelstein effect (IEE), the spin-charge conversion efficiency extracted at room temperature for the thinnest MnPtSb layer reaches {\lambda}IEE~3 nm, representing an extremely high spin-charge conversion efficiency at room temperature. The still never explored ultrathin regime of the MnPtSb films studied in this work and the discover of their outstanding functionality are two ingredients which demonstrate the potentiality of such materials for future applications in spintronics.

Ge‐rich GST (GGST) alloys have been shown to fulfill the tough temperature specifications required by automotive applications. Thus, they are the most promising materials for the embedded phase‐change memory market. In this respect, the characterization of the material properties once patterned and fully integrated is instrumental to improve the process and optimize the device performance. A description of the material behavior through a realistic sequence of process steps is still missing. Herein, a statistical‐based methodology capable to extract advanced metrics for the quantification of by‐process segregation beyond ternary systems is presented, capable to quantify thermal evolution of any out‐of‐stoichiometry and segregated material beyond ternary systems. The methodology to study the physical behavior of GGST as a function of a typical back‐end‐of‐line (BEOL) process is exploited, providing a further comparison between three different BEOL‐ended GGST.

In vitro and in vivo stimulation and recording of neuron action potential is currently achieved with microelectrode arrays, either in planar or 3D geometries, adopting different materials and strategies. IrO2 is a conductive oxide known for its excellent biocompatibility, good adhesion on different substrates, and charge injection capabilities higher than noble metals. Atomic layer deposition (ALD) allows excellent conformal growth, which can be exploited on 3D nanoelectrode arrays. In this work, we disclose the growth of nanocrystalline rutile IrO2 at T = 150 °C adopting a new plasma-assisted ALD (PA-ALD) process. The morphological, structural, physical, chemical, and electrochemical properties of the IrO2 thin films are reported. To the best of our knowledge, the electrochemical characterization of the electrode/electrolyte interface in terms of charge injection capacity, charge storage capacity, and double-layer capacitance for IrO2 grown by PA-ALD was not reported yet. IrO2 grown on PtSi reveals a double-layer capacitance (Cdl) above 300 µF∙cm−2, and a charge injection capacity of 0.22 ± 0.01 mC∙cm−2 for an electrode of 1.0 cm2, confirming IrO2 grown by PA-ALD as an excellent material for neuroelectronic applications.

In this work, a comprehensive study of Ge-rich Phase Change Memory set and reset state retention realized by coupling electrical and physical characterizations is presented. The presence of amorphous residuals inside the active region of PCM devices is, for the first time, demonstrated through High Resolution Scanning Transmission Electron Microscopy. The role of such formations was studied by means of electrical character-ization and supported by modeling analysis. By comparing the low and high state resistive behavior the retention physics has been analytically modeled with the same framework for both states.

Shaping two-dimensional (2D) materials in arbitrarily complex geometries is a key to designing their unique physical properties in a controlled fashion. This is an elegant solution, taking benefit from the extreme flexibility of the 2D layers but requiring the ability to force their spatial arrangement from flat to curved geometries in a delicate balance among free-energy contributions from strain, slip-and-shear mechanisms, and adhesion to the substrate. Here, we report on a chemical vapor deposition approach, which takes advantage of the surfactant effects of organic molecules, namely the tetrapotassium salt of perylene-3,4,9,10-tetracarboxylic acid (PTAS), to conformally grow atomically thin layers of molybdenum disulphide (MoS2) on arbitrarily nanopatterned substrates. Using atomically resolved transmission electron microscope images and density functional theory calculations, we show that the most energetically favorable condition for the MoS2 layers consists of its adaptation to the local curvature of the patterned substrate through a shear-and-slip mechanism rather than strain accumulation. This conclusion also reveals that the perylene-based molecules have a role in promoting the adhesion of the layers onto the substrate, no matter the local-scale geometry.

The effect of back-end of line (BEOL) process on cell performance and reliability of Phase-Change Memory embedded in a 28nm FD-SOI platform (ePCM) is discussed. The microscopic evolution of the Ge-rich GST alloy during process is the focus of the first part of the paper. A new metric for quantification of active material modifications is introduced to better follow its evolution with process sequence. Ge clustering has been shown to occur during the fabrication, impacting the pristine resistance and the after forming cell performance. Two different BEOL processes are then benchmarked in terms of key performance. An optimized process is identified, and an extensive electrical characterization of array performance and reliability is done on the full 16MB chip. The optimized BEOL process results in a memory cell fully compatible with the requirements for demanding automotive applications.

Ge-rich GST alloys are the most promising materials for phase-change memory (PCM) to fulfill the soldering compliance and the tough data retention requirements of automotive applications. Significant efforts have been made to engineer those materials and optimize their integration inside the fabrication process of PCM. In this perspective, the physical characterization of the device and the material is instrumental in understanding the underlying physics, improving the process, and optimizing the interactions between the device, the process, and the material itself. Especially, microscopic investigations have gathered increasing interest, giving detailed descriptions of local material modulations that have a crucial role in cell programming and reliability performances. In this work, a deep analysis of Ge-rich GST microscopic alloy evolution during the integration process has been performed, exploiting analysis by EELS with TEM supported by a novel statistical data post-processing method. The new proposed statistical-based methodology also introduces new simple metrics for elemental compositional evaluations that have been exploited for process engineering.

This paper discusses the effect of back-end of line (BEOL) process on cell performance for a Phase-Change Memory embedded in a 28nm FD-SOI platform (ePCM). The impact of BEOL is first shown by describing the microscopic evolution of the active Ge-rich GST alloy during process. Ge clustering has been proven to occur during the fabrication process, impacting the pristine resistance and the after forming cell performance. Two different BEOL processes are then benchmarked in terms of key performance. An optimized process is then identified, and an extensive electrical characterization of array performance and reliability is performed on the full 16MB chip. The optimized BEOL process results in a memory cell fully compatible with the requirements for demanding automotive applications.

In this work, we review some techniques used for the characterization of ion implanted layers, with the aim to identify the best approach in various experimental conditions.With regard to dopant profiles, Secondary Ion Mass Spectrometry (SIMS) or Time-of-Flight (ToF)-SIMS are discussed. In the case of very thin layers (of the order of 10 nm) and for specific elements, ToF-SIMS is the best choice. For some devices, it is also necessary to analyse rather thick layers with low dopant concentration, and in this case dynamic SIMS gives better performances.Mass spectroscopy cannot provide information about the electrical activity of dopants. The profile of electrically active dopants can be obtained by the Differential Sheet Resistance (DSR) and Hall Resistance (HR) technique. This technique has the advantage that the carrier density and mobility are independently measured, thus providing information about the crystal quality in the layer, in addition to the dopant distribution. In the Spreading Resistance (SR) technique, a resistance profile is measured and turned into a carrier concentration profile with the aid of literature mobility data or by comparison with data from reference samples with known doping concentration. This approach may lead to wrong concentration data if the carrier mobility is degraded, for instance because of unrecovered damage.Various microscopy techniques are commonly used for the analysis of residual crystal defects, for instance the Transmission Electron Microscopy (TEM) and the Scanning Electron Microscopy (SEM) associated with selective etching. Recently, a new technique based upon micro-photoluminescence (μ-PL) measurements (so-called “EnVision”) proved to be a valid alternative to selective etching. A study about the residual damage after silicon implantation and annealing is reported. The conclusions reached by selective etching and conventional microscopy and by micro-photoluminescence are consistent with each other, but micro-photoluminescence has the advantage of providing a non-destructive analysis of large silicon areas.The best approach for monitoring metal contamination depends on the specific contaminant and hence of the contamination mechanism. Minority carrier lifetime measurements are suitable for fast diffusing contaminants (e.g. iron), whereas DLTS provides better sensitivity for slow diffusers such as molybdenum and tungsten.

The exotic electrodynamics properties of graphene come from the linearly dispersive electronic bands that host massless Dirac electrons. A similar behavior was predicted to manifest in freestanding silicene, the silicon counterpart of graphene, thereby envisaging a new route for silicon photonics. However, the access to silicene exploitation in photonics was hindered so far by the use of optically inappropriate substrates in experimentally realized silicene. Here we report on the optical conductivity of silicon nanosheets epitaxially grown on optically transparent Al2O3(0001) from a thickness of a few tens of nanometers down to the extreme two-dimensional (2D) limit. When a 2D regime is approached, a Dirac-like electrodynamics can be deduced from the observation of a low-energy optical conductivity feature owing to a silicene-based interfacing to the substrate.

In the present study, the bifiller system incorporating various amount of multiwalled carbon nanotubes (MWCNTs) and 3 wt% clay in polypropylene is investigated to obtain composites with multifunctional performance. The dispersion state of two nanofillers in the polypropylene matrix was characterized by applying TEM and Raman spectroscopy. Both composites demonstrate similar rheological behavior with a rheological percolation threshold of ϕp1 = 1.5 wt% for the monofiller (MWCNTs) and ϕp2 = 2 wt% for the bifiller systems (MWCNTs and 3% clay). The effect of two nanofillers on electromagnetic and nanomechanical properties was evaluated. Above rheological percolation both type composites show considerable electromagnetic shielding efficiency at small layer thickness due mostly to the addition of MWCNTs. The nanomechanical properties improvement is strongly dependent on the structure formed by MWCNTs in the polymer. The hardness and Young's modulus, measured by nanoindentation, is higher for the bifiller systems in comparison with the monofiller one above the rheological percolation threshold. This was attributed to the continuous network structure formed by interacted MWCNTs and infiltrated fine clay stacks. POLYM. ENG. SCI., 56:269–277, 2016. © 2015 Society of Plastics Engineers

Contaminant reduction is a key issue for SOI substrate which cannot make use of back-side gettering. H 2 annealing has been proven to be effective in Si reconstruction, influencing diffusion by breaking strained Si bonds and generating cavities for contaminant gettering. These properties could help in reducing contaminants in BCD-SOI process. Unfortunately, H 2 annealing integration can be highly critical and the process optimization has to take into account 3-D morphology evolution and contaminant reduction efficiency. Aim of this work is to understand the physical mechanisms behind Si surface reconstruction and metallic contaminants reduction.

A few key techniques for the analysis of contamination in silicon are compared for their ability to detect different impurities. Both metal and organic contamination is included in this study. In addition, common contaminants and elements recently introduced in the fabrication process are considered. For what concerns metal contamination, it is shown that different approaches are required depending on the in-depth distribution of the contaminant and hence on its diffusivity. Copper, iron, molybdenum, and tellurium are chosen as examples of contaminants with different diffusivity and solubility properties. Total reflection X-ray fluorescence (TXRF), recombination and generation lifetime measurement techniques, deep level transient spectroscopy (DLTS) and capacitance versus voltage measurements are compared. The detection of slow diffusers is found to be very critical, because a very low dose may result in a non-negligible concentration in the device region. As a consequence, the sensitivity per unit area required for these elements is difficult to reach with surface techniques such as TXRF. On the other hand, very fast diffusers such as copper can hardly be revealed in the solid solution in silicon. Copper in silicon can be revealed at the oxide-silicon interface by TOF-SIMS measurements, or by surface generation velocity measurements with the Zerbst method. For what concerns organic contamination, surface recombination velocity and gate oxide integrity tests were compared. The most relevant effects of organic contamination were observed by electrical stress of the oxide. Indeed, the fraction of capacitors with degraded breakdown voltage increased dramatically in wafers with intentional organic contamination. (C) 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

In this work we report the results of a set of experiments carried out to assess the ability of recombination lifetime measurements for the detection of palladium contamination in silicon. Palladium is found to be a very effective recombination center, so recombination lifetime measurements are a very sensitive method to detect palladium in silicon. The surface segregation of palladium was monitored by the reduction of its recombination activity in the silicon volume. The palladium segregation at the wafer surface was checked by selective etching, and by Transmission Electron Microscopy (TEM) and Energy Dispersive X-ray (EDX) analysis.After validating recombination lifetime measurements for palladium detection, we use these measurements to define suitable approaches to the prevention of palladium contamination of silicon devices. The efficiency of a diffusion barrier layer (silicon nitride) and of decontamination by wet cleaning are tested.

Various measurement techniques are compared and the most suitable methods for contamination detection are identified. The results of this study show that it is not possible to define a unique recipe that can be applied in all cases. Concerning metal contaminants, the stratigraphic in-depth distribution and hence the diffusivity of contaminants determines the most effective approach. Iron and palladium are chosen as the examples of fast diffusers, molybdenum and tungsten as slow diffusers. Fast diffusers like iron and palladium diffuse through several hundred microns during an ordinary thermal treatment. Minority carrier lifetime measurements are probably the best choice to detect these contaminants. Molybdenum and tungsten do not diffuse deep enough to be efficiently revealed by recombination lifetime measurements, but are easily revealed in the silicon volume by DLTS. Because of their low diffusivity, a very small amount of these elements per unit surface may result in a significant concentration in the near-surface region where devices are built. Ion implantation is confirmed to be an important source of metal contamination. It is shown that ion implantation can be responsible both for iron contamination and for contamination by slow diffusers, such as molybdenum and tungsten. A procedure for monitoring molybdenum and tungsten contamination in ion implantation processes by DLTS is defined and calibrated. Finally, the efficiency of some gettering techniques in reducing iron, molybdenum and tungsten contamination is discussed. Gettering is found to be active at relatively high contaminant concentrations, but low contamination levels are not gettered under our experimental conditions. Carbon implantation showed partial efficiency in gettering molybdenum and tungsten, whereas gettering did not take place after silicon implantation. (C) 2015 The Electrochemical Society. All rights reserved.

In this work palladium is characterized as a silicon contaminant by recombination lifetime, DLTS, C-V and C-t measurements of palladium-implanted wafers. Palladium introduced by ion implantation is found to remain in the solid solution in silicon after rapid thermal treatments, and to be a very effective recombination center. For this reason recombination lifetime measurements are the most sensitive method to detect palladium in silicon.Two palladium-related levels were found by DLTS in p-type material. One of these levels corresponds to a level reported in the literature as the single donor level of substitutional palladium.For what concerns MOS capacitors, palladium is responsible for negative oxide charge and for degradation of the generation lifetime.In addition, palladium is confirmed to be a very fast diffuser, which segregates at the wafer surface even with low temperature treatments (250 degrees C). Microscopy inspections showed that palladium precipitates and surface defects were formed upon segregation. (C) 2015 Elsevier Ltd. All rights reserved.

We investigate the behavior of the Xe in the Si lattice re-growth after the implantation, varying the temperature of the annealing (750-1100°C) and the Xe dose. The Xe is implanted alone or with the species generally used to form the junction in VLSI Si devices. The TEM analysis detects 3 types of defect: the stacking faults, the agglomerations of Xe and the EOR defects. Moreover some amorphous areas are left in Si for the lowest thermal budget and the highest dose of Xe. The experimental observations show that: the Xe presence blocks the epitaxial re-growth, the Xe tends to agglomerate, the higher the thermal budget the more Xe exit from the Si and finally the co-implantation increases the defects density. This study reports also results of ab-initio calculations that are able to highlight some trends of the Xe agglomerate in term of their stability and configuration.

In this paper tellurium is characterized as a silicon contaminant. Tellurium is confirmed to be a very slow diffuser, with diffusivity comparable to that of shallow dopants. For this reason, tellurium cannot be revealed by SPV measurements. On the other hand, tellurium acts as an n-type dopant, so tellurium contamination can be revealed by C-V measurements. In addition, tellurium is responsible for the formation of a positive charge at the oxide-silicon interface, and for interface states. Tellurium is also effective in degrading the generation lifetime. DLTS measurements confirmed that tellurium is responsible for two deep levels acting as electron traps. Finally, ToF-SIMS measurements proved to be able to reveal tellurium contamination at the oxide-silicon interface. (C) 2012 The Electrochemical Society. All rights reserved.