The objective of this study is to develop an in-line metrology technique that employs X-ray Photoelectron Spectroscopy to measure photoelectron intensity from patterned trench surfaces of low-k dielectric film. A mathematical model uses linear regression method to separate the intensities into individual elemental compositions of the constituent surfaces. The initial segment of the model uses measured data from CD-SEM and spectroscopic Ellipsometry to determine the respective surface areas visible to the XPS electron analyzer. The second segment derives the surface composition of the line top, trench bottom, and vertical sidewalls based on a linear relationship between photoelectron intensity, emitting area, and characteristic elemental composition of each surface. The study has verified the predicted compositions from the model through physical measurements, demonstrating excellent agreement and concurrence with the physical mechanisms expected from the applied etch and ash chemistry in a commercial CCP RIE etch chamber.

A new kind of transistor device with a graphene monolayer embedded between two n-type silicon layers is fabricated and characterized. The device is called graphene-base heterojunction transistor (GBHT). The base-voltage controls the current of the device flowing from the emitter via graphene to the collector. The transit time for electrons passing by the ultrathin graphene layer is extremely short which makes the device very promising for high frequency RF-electronics. The output current of the device is saturated and clearly modulated by the base voltage. Further, the silicon collector of the GBHT is replaced by germanium to improve the device performance. This enabled the collector current to be increased by almost three orders of magnitude. Also, the common-emitter current gain (Ic/Ib) increased from 10-3 to approximately 0.3 for the newly designed device. However, the ON-OFF ratio of the improved germanium based GBHT has so far been rather low. Further optimizations are necessary in order to fully exploit the potential of the graphene-base heterojunction transistor.

Controlled thin film etching is essential for future semiconductor devices, especially with complex high aspect ratio structures. Therefore, self-limiting atomic layer etching processes are of great interest to the semiconductor industry. In this work, a process for atomic layer etching of aluminum oxide (Al2O3) films using sequential and self-limiting thermal reactions with trimethylaluminum and hydrogen fluoride as reactants was demonstrated. The Al2O3 films were grown by atomic layer deposition using trimethylaluminum and water. The cycle-by-cycle etching was monitored throughout the entire atomic layer etching process time using in situ and in real-time spectroscopic ellipsometry. The studies revealed that the sequential surface reactions were self-limiting versus reactant exposure. Spectroscopic ellipsometry analysis also confirmed the linear removal of Al2O3. Various process pressures ranging from 50 to 200 Pa were employed for Al2O3 etching. The Al2O3 etch rates increased with process pressures: Al2O3 etch rates of 0.92, 1.14, 1.22, and 1.31 Å/cycle were obtained at 300 °C for process pressures of 50, 100, 150, and 200 Pa, respectively. The Al2O3 etch rates increased with the temperature from 0.55 Å/cycle at 250 °C to 1.38 Å/cycle at 350 °C. Furthermore, this paper examined the temperature dependence of the rivalry between the removal (Al2O3 etching) and growth (AlF3 deposition) processes using the reactants trimethylaluminum and hydrogen fluoride. The authors determined that 225 °C is the transition temperature between AlF3 atomic layer deposition and Al2O3 atomic layer etching. The high sensitivity of in vacuo x-ray photoelectron spectroscopy allowed the investigation of the interface reactions for a single etching pulse as well as the initial etch mechanism. The x-ray photoelectron spectroscopy measurements indicated that the fluorinated layer is not completely removed after each trimethylaluminum exposure. The Al2O3 atomic layer etching process mechanism may also be applicable to etch other materials such as HfO2.

A graphene-based three-terminal barristor device was proposed to overcome the low on/off ratios and insufficient current saturation of conventional graphene field-effect transistors. In this study, we fabricated and analyzed a novel graphene-based transistor, which resembles the structure of the barristor but uses a different operating condition. This new device, termed graphene adjustable-barriers transistor (GABT), utilizes a semiconductor-based gate rather than a metal-insulator gate structure to modulate the device currents. The key feature of the device is the two graphene-semiconductor Schottky barriers with different heights that are controlled simultaneously by the gate voltage. Due to the asymmetry of the barriers, the drain current exceeds the gate current by several orders of magnitude. Thus, the GABT can be considered an amplifier with an alterable current gain. In this work, a silicon-graphene-germanium GABT with an ultra-high current gain (ID/IG up to 8 × 106) was fabricated, and the device functionality was demonstrated. Additionally, a capacitance model is applied to predict the theoretical device performance resulting in an on-off ratio above 106, a swing of 87 mV/dec, and a drive current of about 1 × 106 A/cm2.

In this work an integration of two in-line deposition methods consisting of a linear hot-wire (HW) and very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) into a single in-line system for the fabrication process of highly efficient heterojunction solar cells was demonstrated. Using this continuous deposition methods, which are also well suited for roll-to-roll production, a high productivity can be achieved. In principle, the up-scaling of the electrode width is possible and no severe deterioration of the uniformity of the deposited layers is expected. With the linear configuration the homogeneity of the layer deposition has to be ensured in only one dimension (perpendicular to the movement direction of the substrate). The homogeneity in the second dimension is realized by the movement of the substrate at constant speed, thus the homogeneous deposition even on large area substrates is possible. In this work the individual steps for development of the passivation process using different in-line deposition methods were investigated. The results show that dynamic HW- and VH-PECVD technologies enables fabrication of the layers with high deposition rates and high passivation properties (carrier lifetimes > 13 ms) as well as highly efficient solar cells (efficiency > 22%).

Oxygen-free, transparent, and insulating thin films at fabrication temperatures below 100 °C are important for sensitive materials and interfaces, like organic electronics. In this work, a capacitive coupled plasma-enhanced atomic layer deposition process of aluminum nitride with trimethylaluminum as a precursor and a mixture of hydrogen/nitrogen as the reactive gas was studied at 80 and 200 °C. The film properties were characterized by spectroscopic ellipsometry, x-ray photoelectron spectroscopy, scanning electron microscopy, and electrical measurements. The growth per cycle stayed constant at around 1 Å, and the refractive index decreased slightly from 1.97 at 200 °C to 1.93 at 80 °C. While the AFM surface roughness was below 0.5 nm at 80 °C deposition temperature, scanning electron microscopy images reveal blister generation at 200 °C on silicon. The x-ray photoemission spectroscopy measurements show a layer composition of Al:N of 1.0:0.9 with a few percent of oxygen and carbon, indicating good air stability and reasonable stoichiometry. The metal-insulator-metal capacitance measurements showed a dielectric constant of 11 at both temperatures. The water vapor transmission rate for a 20 nm thick film on polyethylene naphthalate films was lower than 0.5 mg/(m2⋅day) at 38 °C/90%.

Plasma-enhanced atomic layer deposition (PE-ALD) of cobalt (Co) using cyclopentadienylcobalt dicarbonyl [CpCo(CO)2] combined with hydrogen, nitrogen, ammonia, and argon based plasma gases was investigated. The utilized ALD tool was clustered to an ultrahigh vacuum analytic system for direct surface analyses including X-ray photoelectron spectroscopy (XPS). The combination with a nondestructive surface analysis system enabled a sample transfer without vacuum break and thereby a direct qualification and quantification of the chemical surface composition under quasi in situ conditions. The authors studied the influence of process parameters (e.g., pulse times, plasma power, and substrate temperature) on film compositions and film properties. The occurrence and prevention of sputtering effects due to ion bombardment at high plasma powers were discussed. Beyond those results, precise information about the impact of different plasma gas compositions on the resulting film properties was obtained. Cobalt films grown using a hydrogen/nitrogen (H2/N2) plasma as a coreactant showed a stable film composition (CoNx) with a high Co content of 75 at. %. Using scanning electron microscopy and four point probe measurements, a moderate electrical resistivity of about 56 μΩ cm was calculated for a 20 nm film. The high sensitivity of in vacuo XPS measurements allowed investigations of interface reactions for a single PE-ALD pulse as well as investigations of the initial film growth mechanisms. The nucleation of CoNx films during PE-ALD using H2/N2 plasma as a coreactant was investigated on several substrate materials by XPS. After the very first cycle of the PE-ALD process, no Co could be detected on all the investigated substrates. XPS revealed that the plasma pulse was needed to provide active binding sites for the adsorption reaction of precursor molecules due to the formation of Si-Nx or Si-NxOy surfaces. Therefore, the plasma pulse plays an important role in the PE-ALD process of Co on silicon surfaces. The early cycles were characterized by the onset of Co—O bonds. The homogeneous film body on all substrates consisted of Co-nitride compounds.

A maskless approach of forming p‐doped regions in Si wafers using the Ga source of a standard focused ion beam (FIB) system and the moderate activation temperatures of 400–700 °C is demonstrated in this work. This simple and flexible route is accessible to many research labs and is successfully used to fabricate Si‐based diodes and field‐effect transistors (FETs). For the diodes, tunneling is found to be the forward current transport mechanism. The fabricated p‐FET structures show excellent switching behavior with a high ID,ON/ID,OFF current ratio of 5 × 106.

This work describes the fabrication of anisotropically etched, faceted pyramidal structures in amorphous layers of silicon dioxide or glass. Anisotropic and crystal-oriented etching of silicon is well known. Anisotropic etching behavior in completely amorphous layers of silicon dioxide in combination with purely isotropic hydrofluoric acid as etchant is an unexpected phenomenon. The work presents practical exploitations of this new process for self-perfecting pyramidal structures. It can be used for textured silica or glass surfaces. The reason for the observed anisotropy, leading to enhanced lateral etch rates, is the presence of thin metal layers. The lateral etch rate under the metal significantly exceeds the vertical etch rate of the non-metallized area by a factor of about 6-43 for liquid and 59 for vapor-based processes. The ratio between lateral and vertical etch rate, thus the sidewall inclination, can be controlled by etchant concentration and selected metal. The described process allows for direct fabrication of shallow angle pyramids, which for example can enhance the coupling efficiency of light emitting diodes or solar cells, can be exploited for producing dedicated silicon dioxide atomic force microscopy tips with a radius in the 50 nm range, or can potentially be used for surface plasmonics.

While conventional silicon photonic (SiP) waveguides achieve high data rates with low loss, they can only be placed on top of the chip surfaces horizontally. In this article, we present a design approach for multimode chip-to-chip interconnects with similar low-loss and high-bandwidth density properties as SiP waveguides. The state-of-the-art fabrication of optical through silicon via (OTSV) requires conventional back end of line (BEOL) processing with an additional step: metal coating lowers the loss of air-filled TSVs. Alternatively, the TSV is converted into a polymer waveguide by filling of low-loss polymer (Ormocore) to achieve <0.1 dB optical power loss over 380 mu m distance. A 3D multimode optical interconnect is measured at 40 Gbit/s with the bit error rate (BER) <10(-12) at 1550 nm wavelength. The proposed solution supplies a new path for 3D integration of optical waveguides capable of delivering high-speed data within 3D stacked chips.

Motivation: Plasma etching of low-k and ultra low-k (ULK) dielectric materials have seen a tremendous growth in deep nanoscale applications. Fluorocarbon based gases are the forerunners in etching low-k dielectrics as they are the F suppliers necessary to remove Si and C from SiCOH material. Different FC gases in combination with the additive gases contribute differently to the etch behavior of SiCOH due to differing reaction chemistry and formation of Fluorocarbon layer as an interfacial layer between plasma front and dielectric front [i]. Due to dynamic formation and etching of FC Layer happening at the dielectric surface, understanding FC layer properties in each gas plasma is the starting step to control etch rate and plasma induced damage in Low-k dielectrics. This paper aims to study and compare FC layer deposition by different gases grouped into CF4 and CF4/C4F6 family with N2, O2 and H2 as additive gases in each group. FC layer thickness, etch rate, optical properties of etched SiCOH and chemical composition of the FC layer by different plasma treatments have been presented in this work. Methodology: Dense SiCOH (k=2.75 and Open Porosity: 7%) with initial thickness of 157±3nm is deposited on 300mm Si Wafer with a thin SiO2 adhesion layer in between. These wafers are blanket etched in a commercial etch chamber with the given gas combinations (CF4, CF4/N2, CF4/O2, CF4/H2; CF4/C4F6, CF4/C4F6/N2, CF4/C4F6/O2, CF4/C4F6/H2) for same amount of time, total gas flow rate, similar power, pressure and temperature settings. Post Etch blanket wafers are subjected to various in-line and off-line metrology tools. In-line spectroscopic ellipsometer is used to model complex refractive index and thickness of individual layers. Tauc-Lorentz model best describes the FC layer whereas Cauchy model describes the dielectric [ii]. In-line XPS was carried out to probe the surface of FC layer and gain chemical information. Furthermore depth profile of etched layer is carried out by sputtering the surface with low power Ar ions to study variations in chemical composition with the layer depth. SEM is used to see the cross section profile and verify the results from above method Observation: Thickness evaluation from the dispersion models shows that the CF4 group has higher etch rate and lower FC layer thickness compared to CF4/C4F6 group. C4F6 has higher polymerization ability by the virtue of its lower F/C ratio. Amongst each group, Oxygen as additive gas shows the highest etch rate and least FC thickness followed by Nitrogen whereas Hydrogen has least etch rate but highest FC layer thickness. Under given etch conditions with CF4/C4F6/H2 plasma, deposition rate was higher than etching rate leading to stack growth (Fig.1a). Hydrogen supports polymerization by scavenging Fluorine away and aids in thicker FC films. XPS chemical composition shows Fluorine diffusion through FC layer into the dielectric layer bringing changes to its pristine structure. This affects Carbon% across the etched dielectric thickness (Fig.1b). Thicker the FC layer is, closer is the Carbon % to pristine SiCOH. Presence of surficial Nitrogen in the nitrogen containing plasmas shows nitrogen reacts with SiCOH Carbon, forms CN compounds and increases the etch rate. FC layer shows presence of CF3 radicals on the surface and decrease fast with the depth, followed by CF2 radicals. CF radicals are in larger quantity and are present deepest into the FC Layer. Presence of polymerized C-C and C-CFx bonds increases with the FC Layer depth and offset with increase of C-Si bond near the SiCOH interface. Conclusion: This paper shows comparison of Etch Rate and FC layer thickness during SiCOH etch using different gas combinations in the CCP plasma chamber. Thickness correlation between ellipsometric model data and XPS depth profile followed by SEM cross section measurement of layer thickness point towards the correctness of dispersion models for each layer. These models can be used for quick inline post etch metrology useful for process control. O2 containing plasmas are too aggressive on the dielectric with negligible FC layer formation, while H2 containing plasmas are less damaging but exhibit very small etch rate. CF4/C4F6/N2 plasma is the optimum combination for Low-k dielectric etch amongst other combinations in terms of desired etch rate and lower reduction in Carbon %. Relative concentration and penetration depth of different CFx radicals in FC film suggests its influence on film structure. References: Baklanov et.al, Journal of Applied Physics 113, 041101 (2013); doi: 10.1063/1.4765297 T. Easwarakhanthan et al., Journal of Applied Physics 101, 073102 (2007); doi: 10.1063/1.2719271 Figure 1

Through-silicon via (TSV) fabrication consists mainly of the following steps: etching, deposition of insulator, deposition of barrier and seed layers, and electrochemical plating. Depending on the application, the TSV structures differ in size, aspect ratio, density, materials, and technology. Each application has its own requirements which affect the whole processing scheme. The most important parameters for TSV fabrication are aspect ratio and contact density. Their values are specific to each application. In this chapter, we present a specific process flow for a TSV—interposer realizing through holes down to a diameter of 10 m. The fabrication of interconnect is carried out as a through-hole connection. In contrast to the blind hole via integration schemes, the TSVs are etched through to an etch-stop layer. Thus, no grinding, polishing, or etch back processes have to be applied later as it is required in blind hole via integration schemes. Since the fabrication aims at interposer fabrication, no active devices and thus, no restrictions in the thermal budget have to be considered. The complete process flow consists of the following steps and is schematically pictured in Fig. 2.1:

The copper electrochemical deposition (Cu-ECD) filling capability of high aspect ratio through silicon vias (HAR-TSVs) and homogeneity over 300 mm wafers were investigated on a film stack of thermal ALD (thALD) TaxNy barrier with thermal ALD Ru seed in comparison to TixNy barrier with a standard Cu i-PVD seed layer using a commercial 300 mm plating tool. As a first step, Cu-ECD was conducted on wafers with TSV blind holes with aspect ratios (AR) of 10 to 12. To achieve this, a thermal ALD film stack of approximately 6 nm TaxNy and 9 nm Ru (with a sheet resistance of [25.6 +/- 1.4] Omega/Upsilon) were deposited at 250 degrees C. The reactants for the barrier layer were (tert-butylimido)tris(diethylamino)tantalum(V) (TBTDET) and ammonia (NH3) as co-reactant. For the Ru seed layer deposition (ethylcyclopentadienyl)(pyrrolyl)ruthenium(II) (ECPR) and molecular oxygen as co-reactant were used supplemented by a hydrogen purge step after every third ALD cycle. The corresponding ALD growth was observed during the entire process by in-situ real-time spectroscopic ellipsometry (irisE). Blister-free deposition and satisfactory film stack adhesion with no delamination was verified ex situ by scanning electron microscopy (SEM). The deposited copper inside the TSVs was analyzed by focused ion beam (FIB) imaging and X-ray tomography. The Cu ECD filling capability in HAR-TSVs was shown on a film stack of thALD TaxNy thALD Ru seed using a commercial industry standard 300 mm plating tool. A novel blister-free ultra-thin Ru ALD film having good adhesion properties and unique advantages, e. g. high conformity in high-aspect-ratio through-silicon vias large-scale film uniformity over 300 mm wafers, as well as good reproducibility was developed.

A novel transistor with a graphene base embedded between two n-type silicon emitter and collector layers (graphene-base heterojunction transistor) is fabricated and characterized electrically. The base voltage controlled current of the device flows vertically from the emitter via graphene to the collector. Due to the extremely short transit time for electrons passing the ultimately thin graphene base, the device has a large potential for high-frequency RF applications. The transistor exhibits saturated output currents and a clear modulation of the collector current by means of the graphene base voltage. The vertical transfer current from the emitter via the graphene base to the collector is much lower than expected from device simulations. A comparison of the graphene-base transistor and a reference silicon n-p-n bipolar transistor is performed with respect to the main DC transistor characteristics. A common-emitter gain of larger than one has been achieved for the reference device while the graphene-base transistor so far exhibits a much lower gain.

The nucleation of TaCN films during plasma enhanced atomic layer deposition (PEALD) using pentakis-(dimethylamino)tantalum (PDMAT) in combination with H2/Ar plasma was investigated on several substrate surfaces by X-ray photoelectron spectroscopy (XPS) without vacuum break. A cluster tool combining a process reactor with a surface analysis unit under high vacuum conditions ensures a direct qualification and quantification of the chemical surface composition by XPS starting from the very first precursor pulse. Due to the high sensitivity of in vacuo XPS measurements, tantalum can be detected at the substrate surface already after the very first precursor pulse of the PEALD process. The amount of adsorbed tantalum precursor molecules on the silicon oxide surface is much higher compared to the H-terminated Si and low-k surfaces. The early cycles are characterized by the onset of TaO bonds. A TaO interface layer grows on the substrate surface until all the reactive OH-groups are consumed. This is followed by the emergence of TaC and TaN bonds when the homogenous growth mode begins. The PEALD nucleation of TaCN was also investigated on low-k substrates (SiCOH). The homogeneous film body on all substrates consist of Ta- carbide -nitride, and -oxide compounds. In summary, we obtained precise information about the initital tantalum precursor adsorption on several substrate materials and explored the capability to enhance the initial growth on low-k substrates. These examples demonstrate as well that in-vacuo XPS measurements are ideally suited for studying film growth nucleation.

So far, only CMOS compatible and scalable hafnia-zirconia (HZO) based ferroelectric (FE) n-FeFETs have been reported. To enable the full ferroelectric hierarchy [1] both p- and n-type devices should be available. Here we report a p-FeFET with a large memory window (MW) for the first time. Moreover, we propose different integration schemes comprising structures with and without internal gate resulting in metal-FE-insulator-Si (MFIS) and metal-FE-metal-insulator-Si (MFMIS) devices which could be used to tackle the problem of interface (IF) degradation and possibly decrease the power consumption of the devices.

Graphene has been proposed as the current controlling element of vertical transport in heterojunction transistors, as it could potentially achieve high operation frequencies due to its metallic character and 2D nature. Simulations of graphene acting as a thermionic barrier between the transport of two semiconductor layers have shown cut-off frequencies larger than 1 THz. Furthermore, the use of n-doped amorphous silicon, (n)-a-Si:H, as the semiconductor for this approach could enable flexible electronics with high cutoff frequencies. In this work, we fabricated a vertical structure on a rigid substrate where graphene is embedded between two differently doped (n)-a-Si:H layers deposited by very high frequency (140 MHz) plasma-enhanced chemical vapor deposition. The operation of this heterojunction structure is investigated by the two diode-like interfaces by means of temperature dependent current-voltage characterization, followed by the electrical characterization in a three-terminal configuration. We demonstrate that the vertical current between the (n)-a-Si:H layers is successfully controlled by the ultra-thin graphene base voltage. While current saturation is yet to be achieved, a transconductance of ~230 μ S was obtained, demonstrating a moderate modulation of the collector-emitter current by the ultra-thin graphene base voltage. These results show promising progress towards the application of graphene base heterojunction transistors.

Reconfigurable field effect transistors (RFET) have the ability to toggle polarity between n- and p- conductance at runtime [1], [2]. The here presented multiple independent gate (MIG) RFET expands the device functionality by offering additional logical inputs, valuable for e.g. efficient XOR or majority gate implementations [3], [4] or the here originally presented multiplexer circuit. Moreover,https://inspec.iet.org/ideas/#controlled-terms for the first time with a top-down RFET approach equal ON-currents are obtained for every configuration while requiring only one supply voltage (VDD).