Molybdenum disulfide (MoS 2 ) is one of several transition metal dichalcogenides consisting of a layer of transition atoms sandwiched between layers of chalcogens.[l] Interest in MoS 2 has been driven by the fact that it exhibits a 1.8 e V direct electronic band gap in monolayer form and retains a moderate electron mobility (>10 cm 2 /Vs) even when only ∽6.5 Å (three atoms) thick. [2] These properties offer potential for retaining or improving speed and efficiency in scaled electronic devices.
The finite-difference time-domain (FDTD) method is used to determine transmission in three-dimensional nanoscale transistors. Transmission through the channel of a transistor is found by initializing a waveform that represents a particle at the input to a channel and using the FDTD methodology to simulate the interaction of the particle through the channel. This can then used to calculate current of the channel for applications in determining performance capabilities in nanoscale transistors.
Inspired by the human brain, neuromorphic computation should be extremely efficient at very large scales due to inherent parallelism, scalability, and fault and failure tolerance. Spike- Timing-Dependent Plasticity (STDP) is one of the most biologically plausible synaptic learning behaviors. The proposed generic model of time-varying resistance, or R(t) elements in this work can produce STDP in electronic spiking neural networks with memristive synapses that is very similar to that observed in biology. Both pair-based and triplet-based STDP is verified with the proposed generic R(t) model.
The request for high-throughput NAND Flash memory systems for applications such as smart phones, tablets, and laptop PCs with solid-state drives (SSDs) is largely increasing. At the same time, NAND systems must meet strictly maximum power specifications. The power limit also changes depending on the specific application: for enterprise environments and for mobile solutions can be hugely different. Only the systems that have effective and adaptative power management architectures on board can guarantee the performance required by the market complying the max power limit. This paper describes the state of the art of power management architectures, discusses the open challenges in the field and outlines new solutions for the next generations of high-performance NAND systems.
This work explored the gold stud bump-based flip-chip metal-to-metal bonding for high-temperature (600°C) SiC IC integration and packaging. Gold stud bumps were created onto the dummy SiC chips using a standard wire bonder with one mil gold wires. Different substrate metal conductor materials, including electroplated gold, screen-printed gold, and sputtered thin-film gold, were used. The dummy chips with gold stud bumps were flip-chip bonded to the various substrates and subjected to a thermal aging process at 600°C for 2, 4, and 6 days. Die shear test was used to test the bonding reliability after days of the thermal aging process, which shows that the electroplated gold has the best bonding reliability for long-term high temperatures applications such as Venus surface explorations. 1 μm thick platinum conductors on the SiC host substrate warped and detached from the titanium adhesion layer after days of thermal aging, indicating that the platinum film must be thinner to service long-term high-temperature application purposes.
