State‐of‐the‐art memristors based on 2D transition metal dichalcogenide material as an active area formed by vertical or lateral structures are promising devices for emulating artificial synaptic behavior. They owe their switching ability to the defects of said active area. Such layers prepared by chemical vapor deposition are the most employed since they contain vacancies and grain boundaries. However, not much is said about the exfoliated active areas. In this work, we demonstrate vertical memristors based on exfoliated molybdenum disulfide, which reveals a gradual resistive switching mechanism based on Schottky barrier modulation. The devices operate without a forming step and show a gradual resistive switching behavior. The mechanism is attributed to charge trapping/detrapping, which modulates the Schottky barrier at the MoS 2 /metal interface. Furthermore, the device demonstrates key synaptic functions including potentiation, depression, and spike‐amplitude‐dependent plasticity, highlighting its potential as a synaptic building block for analog neuromorphic computing systems.

State-of-the-art memristors based on 2D transition metal dichalcogenide material as an active area formed by vertical or lateral structures are promising devices for emulating artificial synaptic behavior. They owe their switching ability to the defects of said active area. Such layers prepared by chemical vapor deposition are the most employed since they contain vacancies and grain boundaries. However, not much is said about the exfoliated active areas. In this work, we demonstrate vertical memristors based on exfoliated molybdenum disulfide, which reveals a gradual resistive switching mechanism based on Schottky barrier modulation. The devices operate without a forming step and show a gradual resistive switching behavior. The mechanism is attributed to charge trapping/detrapping, which modulates the Schottky barrier at the MoS2/metal interface. Furthermore, the device demonstrates key synaptic functions including potentiation, depression, and spike-amplitude-dependent plasticity, highlighting its potential as a synaptic building block for analog neuromorphic computing systems.

Graphene (Gr)-based hot-electron transistors (GHETs) offer high potential for high-frequency applications due to the extremely thin nature of graphene as a base material. For the first time we present GHETs with excellent DC device characteristics and gigahertz operation achieved by an optimization of the emitter-base (E/B) composition. The optimized E/B composition enables more efficient injection of hot electrons into the base, thereby improving charge transport and reducing scattering losses. As a result, a record-high measured common-emitter current gain beta of 42 was achieved using a SiO2/Gr E/B structure. Moreover, when using a MoS2/Gr E/B junction the maximum output current is increased to record values of approximately 2000 A/cm2, representing a significant improvement in performance over previous devices. Furthermore, cutoff frequencies of close to 1 GHz are determined for nonoptimized SiO2/Gr-based devices. The experimentally observed device characteristics are very promising for future high-speed nanoelectronics.

Extensive research is directed towards neuromorphic computing, a hardware-based processing paradigm based on the human brain, to satisfy the need for more efficient computing. State-of-the-art resistive switching devices, also called memristors, use 2D transition metal dichalcogenide materials as a switching material and can potentially be used as next-generation neuromorphic devices. Chemical vapor deposition produced two-dimensional transition metal dichalcogenides are the most employed in resistive switching devices since the layers contain defects like vacancies and grain boundaries that can induce resistive switching effects. However, only a few studies have investigated resistive switches based on exfoliated layers and exploited the superior crystalline quality. In this work, a vertical memristor based on exfoliated molybdenum disulfide is demonstrated, which reveals a Schottky-barrier-height-modulation resistive switching mechanism. The devices exhibit a gradual, formingfree resistive switching characteristic. We attribute the switching mechanism to either the mobility of sulfur vacancies caused by a voltage bias applied to the device or charge trapping, which modulates the molybdenum disulfide/metal barrier. We present the characteristic quasi-static I-V behavior, synaptic potentiation and depression, demonstrating the potential of being a basic device to realize synapses for neuromorphic systems.

Schottky-barrier (SB) transistors show great potential as advanced transistors for meeting power, performance, area, and cost requirements. In this study, the dominant transport mechanisms of SB Si-nanowire (NW) transistors were investigated with respect to channel length for accurate performance estimation and to provide key insights for practical applications. Evaluations of the temperature-dependent drain current, transconductance, and activation energy from SB Si-NW transistors revealed that the SB-dominant thermionic effect competes with Si-NW channel-limited conduction when the initial SB height is relatively low. Moreover, the Si-NW channel length was sufficiently long to dominate the total resistance, overcoming resistance effects arising from the SB.

The development of high‐speed dual‐band photodetectors with high responsivity is important for several applications such as optical communication, biomedical imaging or spectroscopy. In this work, a phototransistor with ultra‐high responsivity is demonstrated, which potentially also allows for very high bandwidths. The device is called graphene adjustable‐barriers phototransistor and is potentially capable for dual‐band detection in the visible‐infrared (VIS‐IR) range. A material combination of intrinsic hydrogenated amorphous silicon, graphene, and n‐type germanium (n‐Ge) is used for the demonstrator. The device operation is based on the light induced modulation of the graphene Fermi energy level and Schottky barrier heights. For the first time, the functional mechanism of the device is successfully demonstrated in the VIS range with responsivities exceeding 10 7 A/W at a gate voltage of 20V. The bandwidth of the device is 1.2 kHz and is so far limited by the defective gate material hydrogenated amorphous silicon and relaxed feature sizes of the demonstrator. These results are an important step toward a new generation of high‐responsivity high‐speed photo detection devices.

The graphene adjustable-barriers phototransistor is an attractive novel device for potential high speed and high responsivity dual-band photodetection. In this device, graphene is embedded between the semiconductors silicon and germanium. Both n-type and p-type Schottky contacts between graphene and the semiconductors are required for this device. While n-type Schottky contacts are widely investigated, reports about p-type Schottky contacts between graphene and the two involved semiconductors are scarce. In this study, we demonstrate a p-type Schottky contact between graphene and p-germanium. A clear rectification with on–off ratios of close to 103 (±5 V) and a distinct photoresponse at telecommunication wavelengths in the infrared are achieved. Further, p-type silicon is transferred to or deposited on graphene, and we also observe rectification and photoresponse in the visible range for some of these p-type Schottky junctions. These results are an important step toward the realization of functional graphene adjustable-barrier phototransistors.

With classical scaling of CMOS transistors according to Dennard's scaling rules running out of steam, new possibilities to increase the functionality of an integrated circuit at a given footprint are becoming more and more desirable. Among these approaches the possibility to reconfigure the functionality of a transistor on the single devices level stand out, as by such an approach the same physical circuitry is enabled to perform different tasks in different configurations of the circuit. Reconfigurable transistors that allow the reconfiguration from a p-channel to an n-channel transistor and vice versa have emerged as an important example of such devices. The basic concepts required to built such devices have been proposed more then 20 years ago and the field has continuously developed ever since. In this article first the basic classification of reconfigurable field effect transistors is reviewed an described form a new angle. In the second part the important technology enablers to construct reconfigure field effect transistors are examined. Further the historical development, starting at the proposal of the main concepts up to the current status of device and circuit development are described. The most important additional features that have been introduced in the last years in order to even further increase the flexibility of the devices are discussed. Finally the application potential of reconfigurable transistors is described placing the spotlight on hardware security and neuromorphic applications.

As the dimensions of the transistor, the key element of silicon technology, are approaching their physical limits, developing semiconductor technology with novel concepts and materials has been the main focus of scientific research and industry. In recent years, emerging reconfigurable technologies that offer device-level run-time reconfigurability have been explored and shown the potential to enhance device and circuit functions. Two-dimensional (2D) materials possess exquisite electronic properties and provide a suitable platform for reconfigurable technology owing to their atomic-thin thickness and high sensitivity to external electrical fields. In this review, we present an intensive survey of 2D-material-based devices with diverse reconfigurability, including carrier polarity, threshold voltage control, as well as multifunctional configurations enabled by 2D heterostructures. We discuss the working principles for these devices in detail and highlight the important figures of merit for performance improvement. We further provide a forward-looking perspective on the opportunities and challenges of these reconfigurable devices based on 2D materials in the field of computing technologies.

Reconfigurable Field Effect Transistors can be electrostatically programmed to p- or n-type behavior. This device level reconfigurability is a promising way to enhance the functionality of digital circuits. Here, we present a Verilog-A based Germanium nanowire table model for the analysis of dynamically reconfigurable logic gates. The model is based on TCAD simulations of a nanowire transistor design with feature sizes compatible to a 14nm FinFET process. To showcase that our model enables digital circuit design for reconfigurable operation, performance and power consumption estimations for basic static as well as reconfigurable logic cells are given. Performance improvements over Silicon nanowire based designs are predicted, making Germanium RFETs a promising candidate for future co-integration into standard CMOS processes.

This paper presents a closed-form, physics-based compact model which is used to calculate the DC characteristics of double gate Schottky barrier field-effect transistors (SBFETs) and reconfigurable field-effect transistors (RFETs). Therefore, the model calculates the drain current which consists of field emission through the Schottky barrier and thermionic emission over the barrier. In order to validate the model, this paper shows results for the calculated current in SBFETs and RFETs compared to transfer characteristics of simulated devices and measurements, which show a good agreement.

Reconfigurable field-effect transistors come with an additional gate contact, which leads to challenges for compact modeling. In this work, a closed-form and physics-based DC model is derived for those devices, which combines the injection current over the Schottky barriers with the resistance-effects of partially ungated device channel segments or long channel devices. The model verification is done by comparing the results to TCAD simulations and measurements.

Many biomarkers including neurotransmitters are found in external body fluids, such as sweat or saliva, but at lower titration levels than they are present in blood. Efficient detection of such biomarkers thus requires, on the one hand, to use techniques offering high sensitivity, and, on the other hand, to use a miniaturized format to carry out diagnostics in a minimally invasive way. Here, we present the hybrid integration of bottom-up silicon-nanowire Schottky-junction FETs (SiNW SJ-FETs) with complementary-metal–oxide–semiconductor (CMOS) readout and amplification electronics to establish a robust biosensing platform with 32 × 32 aptasensor measurement sites at a 100 μm pitch. The applied hetero-junctions yield a selective biomolecular detection down to femtomolar concentrations. Selective and multi-site detection of dopamine is demonstrated at an outstanding sensitivity of ∼1 V/fM. The integrated platform offers great potential for detecting biomarkers at high dilution levels and could be applied, for example, to diagnosing neurodegenerative diseases or monitoring therapy progress based on patient samples, such as tear liquid, saliva, or eccrine sweat.

Here we present a highly scalable reconfigurable field effect transistor concept, which is capable of dynamically switching between p-type, n-type, and ambipolar operation modes by adaptively changing the applied back-bias. The devices are processed on full-scale 300 mm wafers and reach gate lengths down to 20 nm, integrable into a 22 nm FDSOI platform with only minor process modifications. We demonstrate symmetric IV characteristics of p- and n-program with $I_{ON}/I_{OFF}$ ratio up to 103 at a $V_{DD}$ of 0.8 V, and propose an exploitation in hardware security. In ambipolar mode, frequency multiplication requiring only a single transistor is experimentally demonstrated.

The integration of new materials such as high-k dielectrics or metals into advanced CMOS gate stacks has led to major developments in plasma etching. The authors present a study which is dedicated to the etching of amorphous hafnium zirconium oxide (HZO) and titanium nitride (TiN) layers with Ar/Cl 2 chemistry in one single step. By adjusting the gas ratio and the inductively coupled plasma power, the etching process is shown to have a slow and well controllable etch rate for HZO and TiN. Additionally, a high selectivity between both materials and SiO 2 can be achieved. Gate stack etching was successfully demonstrated and transmission electron microscopy-images revealed good anisotropic etching for HZO and TiN with an etch stop in SiO 2 without damaging the silicon underneath. The process is further applied for the fabrication of metal-ferroelectric-metal capacitors, here TiN-HZO-TiN, and the feasibility of the chosen material combination is proven by electrical characterization. The strategy of using low temperature plasma-enhanced atomic layer deposition for TiN-deposition and forming gas anneal after structuring leads to high remanent polarization-values.

The reconfigurable field-effect transistor (RFET), is an electronic device whose conduction mechanism can be reversibly reconfigured between n-type and p-type operation modes. To enable this functionality, those devices do not rely on chemical doping caused by impurities but rather on electrostatic doping, i.e. the generation of mobile carriers via an external potential. This functionality has been first concieved in the early 2000s to reduce the source-drain leakage in ambipolar thin film transistors. Over the years many different concepts have been developed employing different conduction mechanisms as well as channel materials, such as silicon nanowires, carbon nanotubes or two-dimensional layered materials. In addition the focus the research shifted more and more towards the circuit level, bringing the unique device characteristics to fruitation. In this work, we will give an historic overview of the main development phases including thier key-achievements starting from the earlier years reaching untill today. Further, we discuss the most interesting circuit properties arising from the device functionality and summarize the broad range of their potential future applications.

Here we present a highly scalable reconfigurable field effect transistor concept, which is capable of dynamically switching between p-type, n-type, and ambipolar operation modes by adaptively changing the applied back-bias. The devices are processed on full-scale 300 mm wafers and reach gate lengths down to 20 mn, integrable into a 22 nm FDSOI platform with only minor process.modifications. We demonstrate symmetric IV characteristics of p-and n-program with I-ON/I-OFF ratio up to 10(3) at a V(DD )of 0.8 V, and propose an exploitation in hardware security. hi ambipolar mode, frequency multiplication requiring only a single transistor is experimentally demonstrated.

The unique electrostatic properties of semiconductor nanowires enable the realization of novel transistor types by the possibility to use surround gate architectures resembling ideal gate electrostatic control. Nevertheless one fundamental issue of semiconducting nanowire channels is the reliable control of doping to adjust the charge carrier concentration. Indeed, as dimensions scale down the surrounding media and the interfaces become more important. In this study we experimentally investigate the role of surface depletion and dielectric mismatch on the electronic charge transport of highly arsenic doped and bottom-up grown silicon nanowires. Electrical characterization of silicon nanowires (SiNWs) synthesized by Au catalyzed vapour-liquid-solid (VLS) growth and in-situ arsine (AsH3) doping is reported for the first time. We demonstrate that high n-type doping is possible by adjusting the dopant precursor flow ratio during growth. Based on electrical measurements of individual nanowires, reproducible donor concentrations of up to 5.2 x 10(19) cm(-3) could be revealed. By measuring the electrical characteristics for individual nanowires in dependence of their radius, we show that the electrically active carrier density drastically reduces for small nanowires at radii much larger than those at which quantization or dopant surface segregation effects are expected to occur. Furthermore, enhancement of the contact transparency for small radii nanowires is demonstrated through dopant segregation upon metal silicidation. Size dependent measurement of electrical characteristics revealed improved contact resistivities as low as 1.4 x 10(-11) Omega m(2).

For use in flexible, printable, wearable electronics, Schottky-barrier field-effect transistors (SB-FETs) with various channel materials including low-dimensional nanomaterials have been considered so far due to their comparatively simple and cost-effective integration scheme free of junction and channel dopants. However, the electric conduction mechanism and the scaling properties underlying their performance differ significantly from those of conventional metal-oxide-semiconductor (MOS) field-effect transistors. Indeed, an understanding of channel length scaling and drain bias impact has not been elucidated sufficiently. Here, multiple ambipolar SB-FETs with different channel lengths have been fabricated on a single silicon nanowire ensuring a constant nanowire diameter. Their length scaling behavior is analyzed through drain current and transconductance contour maps, each depending on the drain and gate bias. The reduced gate control and extended drain field effect on Schottky junctions were observed in short channels. Activation energy measurements showed lower sensitive behavior of the Schottky barrier to gate bias in the short-channel device and confirmed the thinning of Schottky barrier width for electrons at the source interface with drain bias.